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Tutorial 2 FSM

This document describes a tutorial on finite state machines (FSMs). It includes examples of Moore and Mealy machines, converting between the two models, completing state transition tables, designing FSM controllers using logic gates and flip-flops, and implementing a one-shot circuit FSM using Karnaugh maps, D flip-flops, and T flip-flops. The tutorial contains figures depicting state diagrams and FSM designs, along with questions asking to analyze, convert, complete, and implement various FSM concepts.

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0% found this document useful (0 votes)
42 views

Tutorial 2 FSM

This document describes a tutorial on finite state machines (FSMs). It includes examples of Moore and Mealy machines, converting between the two models, completing state transition tables, designing FSM controllers using logic gates and flip-flops, and implementing a one-shot circuit FSM using Karnaugh maps, D flip-flops, and T flip-flops. The tutorial contains figures depicting state diagrams and FSM designs, along with questions asking to analyze, convert, complete, and implement various FSM concepts.

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01 PrOdUcTiOn
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© © All Rights Reserved
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BENG2413: DIGITAL SYSTEM

TUTORIAL 2: FSM

1. Figure Q1 below depicts a state transition diagram using the Finite State Machine (FSM) concept.

Reset
A B

S0 S1 S2
[0] [0] [1]
B'

A'
A' + B'

Figure Q1

(i) Based on the Figure Q2, Is this FSM a Moore or Mealy Machine?
(ii) With the same number of state, convert the state diagram in Figure Q1 above into an
opposite FSM model.

2. Convert the Mealy machine as in Figure Q2 to the Moore machine.

Figure Q2

1
3. Based on Figure Q3 below, you are required to complete the state transition table in Table Q3.

( N D  Re set ) / 0
Reset/0

S0

Reset/0 N /0

S1
D /0

N /0 ND/0

S2
D /1

[N+D] /1 ND/0

S3

Re set / 1

Figure Q3

Table Q3

Present state Inputs Next state Ouput Flip-flop inputs


Q1 Q0 D N Q1+ Q0+ Open D1 D0
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1

2
4. Based on the state diagram shown in Figure Q4(i), design a controller in Figure Q4(ii) using minimum
number of logic gates and D flip flops.

Async reset

X/CLEAR
s0

X/ADD
X/ADD,SHIFT

X/CLEAR

s3 s1

X/ADD,SHIFT

X/ADD

X/LD
s2
X/LD,ADD

Figure Q4(i)

LD
Input x
ADD
CLK Control
Unit CLEAR
Async reset SHIFT

Figure Q4(ii)

3
5. Figure Q5 shows the state diagram of a one shot circuit.

Keypressed’

s0 Keypressed s1
00 01 Output Oneshot

Keypressed’

Unused s2 Keypressed
10 11

Figure Q5

(i) Draw the Karnaugh-Map and write the Boolean equations for the next state circuit and output
circuit in order to implement the Finite State Machine (FSM).

[6 marks]

(ii) Design the FSM circuit by using D flip-flop as state memory.

[5 marks]

(iii) Redesign the FSM circuit by using T flip-flop as state memory.

[8 marks]

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