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Comarch Newtemplate

This 3-unit course on computer architecture covers the basic components and design of modern computers over 14 weeks. The course objectives are to understand computer hardware from the gate level up to assembly language and how components work together. Topics include processor fundamentals, memory organization, I/O, exceptions/interrupts, pipelining, caches and computer design. Assessment includes exams, quizzes, assignments, and a final integration project. The textbook is "Computer Organization & Design" and the instructor is Vanessa Pascual.

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105 views3 pages

Comarch Newtemplate

This 3-unit course on computer architecture covers the basic components and design of modern computers over 14 weeks. The course objectives are to understand computer hardware from the gate level up to assembly language and how components work together. Topics include processor fundamentals, memory organization, I/O, exceptions/interrupts, pipelining, caches and computer design. Assessment includes exams, quizzes, assignments, and a final integration project. The textbook is "Computer Organization & Design" and the instructor is Vanessa Pascual.

Uploaded by

Vanie Pascual
Copyright
© Attribution Non-Commercial (BY-NC)
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOC, PDF, TXT or read online on Scribd
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Araullo University PHINMA Education Network Syllabus

1. PEN Code:
PEN Subject Title: A. Subject Description: Computer Architecture

Credit: Prerequisite:

3 units NONE

The modern digital computer has existed for less than 50 years. During this time, much fine tuning of the design has occurred to speed up computers and to make them more efficient. Even so, the Basic Architecture has not changed significantly from the first computers that filled entire building to the small notebook computers we use today. The main changes have been in how fast they operate, how much memory they have, the resolution of the display, and the level of sophistication of the software. This course will look at the microcomputer chip architecture, and the computer bus architecture, and look at the various peripherals that are used allow the computer to interact with the world. We will examine how programs are written and how they make a computer do something useful.
B. Objectives:

At the end of this course, the student should be able to: 1. Identify the different hierarchical views of a computer (gates, microprogram, machine language, assembly language) 2. Write code in assembly language 3. Know the different devices and components of a computer system and how these components work together.
C. Subject Outline and Time Allotment: Chapters Topics 1. Introduction to Machine Architecture 2. What is Computer What is Compute Architecture What is Instruction Set Architecture (ISA) Factors Influencing Computer Architecture Integrated Circuit Complexity Logic and Memory Relative Performance Processor Speed Improvements Internal Organization Schedule

Chapter 1

June 14 to June 23

A very simple Processor Computer Memory Binary Notation Numbers: How to represent data in computers? Octal and Hexadecimal Number Systems Digital Representation of Numbers MU0 a very simple processor Logical view of MU0 July 21-22

Chapter 2

June 28 to July 19

PRELIM EXAM 3. Microprocessor Fundamentals How to make CPU faster? Modern CPU Design Main Memory Organization Von Neumann memory architechture Memory in Detail

July 26 to Aug 9

Chapter 3

4. Chapter 4 MIDTERM EXAM

Nibbles, Bytes, Words Byte and Word Addressing Byte addresses for words Different views of memory access: byte or word Internal Registers and Memory What are Memory locations used for? Memory addressing modes

Subroutines and Stacks Subroutines Nested Subroutines The Idea of a Stack Nester Subroutines using Stack Aug. 18 Aug. 11 to Aug. 16

5. Input/Output , Exceptions and Interrupts


Hardware for I/O Overview Servicing an I/O Device Polling and Interrupt Anatomy of an Interrupt exception Shadow Registers How are exceptions generated Exception Return Direct Memory Access vs Interrupt and Polling Techniques for Inputting a Block of Data: DMA Processor Organization What is Computer? Speeding up CPU execution Pipelining Branches and pipeline stalls

Aug. 23 to Sept. 1

Chapter 5

6.

Sept. 6 to Sept. 16

Chapter 6

SEMI-FINAL EXAM 7. Cache Memory SRAM DRAM Exploiting Memory Hierarchy Automatic memory transfer between levels of hierarchy Cache Terminology The Basics of Caches Direct Mapped Cache Cache Operation Cache data line Integration Project Designing your own computer

Sept. 20

Chapter 7

Sept. 22 to Oct. 6

8.

Oct. 11 to Oct. 18

FINAL EXAM D. Textbook

Oct. 20

Computer Organization & Design 2nd edition, Patterson & Hennessy 1998
Web Site

http://www2.ee.ic.ac.uk/t.clarke/arch/ http://faculty.weber.edu/justinjackson/ceet%201130/modules/module%2014.pdf
E. Course Requirements Requirements Project Presentation Case Study Submission F. Grading System: The Final Gradeis computed as follows: FG = 17%PG + 17%MG + 33%SFG + 33%TFG The Prelim Grade (PG), Midterm Grade (MG) and SemiFinal Grade (SFG) is computed as follows: Periodical Exam Class Standing Factors: Quizzes Recitation Research/ Homework/Assignment Discipline/ Respect and Values G. Contact Information Vanessa C. Pascual [email protected] 40% 30% 20% 5% 5% Due Date

______________________________ Deans signature over printed name H.

Date:_______________

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