Module 6
Module 6
X Y
0 1
1 0
NOT
X ~X ~~X = X
X ~X ~~X
0 1 0
1 0 1
AND Gate
Z = X & Y
OR Gate
• Only when all the inputs are LOW, the output will
be LOW.
OR Gate
OR
X Y Z
X 0 0 0
Z 0 1 1
Y 1 0 1
1 1 1
Z = X | Y
NAND Gate
Z = ~(X & Y)
nand(Z,X,Y)
NAND Gate
NOT-AND
X Y W Z
X 0 0 0 1
W 0 1 0 1
Z
1 0 0 1
Y 1 1 1 0
W = X & Y
Z = ~W = ~(X & Y)
NOR Gate
Z = ~W = ~(X | Y)
Exclusive-OR (Ex-OR) Gate
XOR X Y Z
X
Z 0 0 0
Y
0 1 1
Z = X ^ Y 1 0 1
xor(Z,X,Y)
1 1 0
Exclusive-NOR (Ex-NOR) Gate
XNOR X Y Z
X
Z 0 0 1
Y
0 1 0
Z = ~(X ^ Y) 1 0 0
Z = X ~^ Y
1 1 1
xnor(Z,X,Y)
Boolean Laws
A+B=B+A
A. B = B. A
A+(B+C) = (A+B) +C
A(BC) = (AB) C
A(B+C)= AB + AC
Digital Circuits
Combinational Circuit
Output at any time depends only on the input
values at that time.
eg. Adder, Subtractor, Decoder, Encoder,
Multiplexer, Demultiplexer
Sequential Circuit
Output at any time depends only on the present
input values as well as the past values.
Half Adder
A B SUM CARRY
0 0 0 0
0 1 1 0
1 0 1 0
1 1 0 1
Realisation of Half Adder
XOR
A 1
2
3
Sum
B
7486
AND
12
13
11
Carry
7408
Full Adder