OTIS DCSS 4 Basic Data - ImageShack
OTIS DCSS 4 Basic Data - ImageShack
PRODUCT Page : 1 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
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Document Revision:
Date Author Comment
17-March-1997 M. Barten Original document
30-Nov.-1998 M. Barten Extended to F version of DCSS 4 PCB
01-April-2003 P. Herkel update for GDA packages
Copyright 1997, OTIS GmbH BerlinNo part of this document may be copied or reproduced in any form or by any means without the prior written
consent of OTIS GmbH.
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
PRODUCT Page : 2 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
1 Scope
Subject of this document is the DCSS 4 drive system an unique hardware platform for
x DO2000
x HPDS-VF
x HSDS-VF
x DCDS
applications. The DCSS 4 is an element of the Modular Elevator Control System (MCS). It
either interfaces with the Motion Command Subsystem (MCSS) in an MCS311/411 configu-
ration or with the Limited Car Board (LCB) in a MCS310/312 configuration.
The advanced door drive represents a microprocessor controlled freqency inverter suitable
for AC motor as well as DC motor applications. The proposed 3-phase inverter is the power
interface between the µP system and the motor. Ultrafast switching technology using a six
pack module IGBT device leads to noiseless operation and low current ripple due to the
high switching frequency of above 15kHz. A suitable gear reduces the speed of the motor
shaft according to the requirements of the mechanical environment.
The control and profile generation are done by a microprocessor system. Position recogni-
tion and security functions are implemented. Furthermore it has to establish the communi-
cation via the serial link with the MCSS or via discrete information lines with the LCB, from
where it gets the door commands.
All In- and Outputs for signal use are optically insulated. Different signal levels can be
processed to fit all required system configurations.
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
2 Technical Overview
DCSS 4 Hardware-Configuration
All components are located on the PC board, no package internal wiring is necessary. The
enclosure is made of plastic material which is equipped at the inner side with a metal layer
in order to shield the electromagnetic dissipation caused by the frequency inverter.
The package is prepared to be fixed via double lock tape spots on every clean metal sur-
face where the tape spots could be glued on.
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
2.2 Ratings
Attention:
x In order to protect the traveling cable and the DCSS 4 box only automatic cut-off’s
with class C characteristic and a limit within the range of 2.5A...4A are permitted
x DCSS 4 requires a single phase 230V Ac supply. In case that a neutral is not avail-
able or the supply voltage is different from 230 Vac the elevator controller has to be
equipped with an additional transformer.
The DCSS 4 requires in D02000,HPDS-VF and HSDS an incremental speed encoder complying
to the following specification:
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
The DCSS 4 fulfills the EMC requirements given in PREN 12015/16 under condition that
the:
x enclosure is closed
x motor cable shield is connected to motor case and the cable gland of heat sink
panel
In order to avoid disturbances of the encoder signal lines apply only shielded encoder cables and con-
nect the shield to plug pin P3.5
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
PRODUCT Page : 6 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
3 Hardware Design
The inverter power stage consists of an ESD protection circuit (varistor and gas discharge
device), an input filter, an EMC reduction circuit (Print-Filter), an uncontrolled full-bridge
rectifier, the DC Link (buffer capacitor) and the 3 Phase Inverter stage.
Using PWM modulation techniques the requested (average) output values are obtained ac-
cording to the duty cycle of the bridge leg switching pattern. The power stage is able to
drive three phase AC motors as well as DC-motors. In DC-motor mode two half bridges
(U, V) are used for armature and the third (W) half bride is used for field control. The su-
pervising circuit will limitate each bridge leg current to it’s maximum of 8 A.
A supervising circuit will prevent the DC link current from beeing to high by interrupting the
inverter control.
Reverse motion can be achieved by PWM control. Braking mode is possible. However, the
recovered energy must be dissipated. The regained mechanical energy during braking will
be dissipated in the friction losses, motor losses (efficiency for small AC motors ca. 50%)
inverter losses and charging of the DC-Link capacitor. The max. voltage of the DC-Link ca-
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
pacitor has to be greater than 357 Vdc (nominal suply voltage +15 %) plus the max. volt-
age swing during the generative mode of the motor.
The DC Link Current Idcl of the inverter stage is observed with a shunt resistor RSdc. All
short-circuit- and overload-conditions lead to an according voltage drop on the resistor, ex-
cept ground faults to the positive DC bus bar. Under normal operation the induced voltage
will be 0V.
+----+
+ )--o-|Rdcl|-o-------o----------------| +
| +----+ | | | |
| | | Cdcl |
+---o/o--’ | + |
SWdcl : ===== | Inverter
+-+ | |
--|/|-- | |
+-+ | +----+ |
- )-------------------o-|RSdc|---------| -
+----+
| |
V V
An active “OCURR” signal stops immediately the transmission of the pulsepattern to the
power stage and activates a microprocessor interrupt . The “OCURR” is transmitted by an
opto-coupler to achieve full insulation between the power stage and the microprocessor
unit.
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
The DCSS 4 microprocesor system is designed to communicate with an host system in two
different ways depending on the connected elevator controller type:
x discrete I/O lines for NE300, 310/312 and MCS 220 controller
x (L)MCSS serial link for MCS311/321/411/421 controller
A second serial link is implemented for maintenance purpose using the Otis Service Tool.
A Customer specific ASIC (Elga) which mainly provides pulse width modulation controls the
3-phase power IGBT module. With this PWM-technique the frequency can be varied from 0
to 128 Hz (0.25 Hz solution) with a voltage range from 0 to 230V.
Flash Memory program control logic mainly located in a GAL 22V10 provides in co-
operation with a boot-up software kernel on board reprogramming of the Flash.
In order to guarantee a determined behaviour in case of a supply power failture the reset
logic observes the 5V microprocessor supply and activates the uP reset before the voltage
will reach the critical limit of 4.75 V. The reboot of the system caused by a reset or in
power up mode is checked by a microprocessor internal watchdog.
The microprocessor ready state is shown on the board with an Light Emitting Diode (LED).
Under normal conditions the “RUN” LED must be lit.
3.4Hardware Description
3.4.1Microcontroller 80C515A
The DCSS 4 board is controlled by an 80C515A microcontroller from SIEMENS. This one
chip microcomputer has integrated an internal RAM, serial interface, discrete I/O ports,
three timers, an Analog/Digital Converter and special capture and compare logic.
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
Asynchronous full duplex serial link, baudrate 9600 generated by internal baudrate gen-
erator
Analog Inputs
Input 0..5V
Timers
.lt;
Timer 0 programmed as 16 bit counter for speed encoder measuring
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
The table below presents the external I/O and data memory configuration:
.LT
+------------+----------+-----------+---------------+
| | Address | | CS-Signal |
| Device | Size | CS-Signal | Adr. Space |
+------------+----------+-----------+---------------+
| RAM | 8k x 8 | /A15 | 0000H - 7FFFH |
+------------+----------+-----------+---------------+
| EEPROM | 2k x 8 | /CSEEP | C000H - EFFFH |
+------------+----------+-----------+---------------+
| PBM4 | 32 x 8 | /CS0 | F000H - F0FFH |
+------------+----------+-----------+---------------+
| KS82C450 * | 8 x 8 | /CS4 | F400H - F4FFH |
+------------+----------+-----------+---------------+
| DAC ** | 6 x 8 | /CS1 | F100H - F1FFH |
|(interface) | | /CS2 | F200H - F2FFH |
| | | /CS3 | F300H - F3FFH |
+------------+----------+-----------+---------------+
.el
The CS-Signals are generated by the PBM4 IC.
.hl^*^&Program_ Memory\&\*
The EPROM program memory is selected by the /PSEN signal of the microcontroller
covering the complete address space. In this mode the /READ and /WRITE line are
not activated and no other memory can be selected.
The HPDS-VF program memory resides in up to 128k-byte of a 271001 EPROM.
The memory paging between the different blocks, where the program is
allocated, is done via the signal "page_mem" coming from the uP (P5.0)
at the address line A16.
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
PRODUCT Page : 12 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
.hl^*^&Data_ memory\&\*
The data memory is divided into three different types:
.list '-';
.le; internal RAM with 256 bytes from address 0 to FFH.
.le; external CMOS-RAM implemented with one 6164 LP (8k-byte). It is activated
by the address lines A0 to A14 and a /WR or /RD signal. This storage area is
used for temporary storage of data, flags, variables and errorlog informations.
.le; EEPROM implemented with one 2816 (2k byte). It is selected by the address
C000H to C07FFH. This storage area is used for permanent storage of
installation variables. These values can be modified by the service tool.
.b;
To protect the EEPROM against false writing during power up and power down,
the precision voltage comparator Z14 disables the internal EEPROM write
logic. In addition the output pin ENE2P of Z102 has to be programmed to
low level to enable EEPROM read/write operations.
.els;
.page
.hl^*^&Watchdog_ /_ Resetlogic\&\*
^*Watchdog:\*
.b2; The HPDS-VF has two watchdogs. An internal WD, which must be set and triggered
by the software and an external one, which is triggered by a hardware
signal.
.b; The internal watchdog is a free running timer which must be cleared by the
software at least every 65532 µsec to avoid an overflow, which causes a
reset. The disadvantage of this watchdog is, that it must be enabled by
the program. In case of wrong start up the watchdog is not initialized and
no reset would appear.
.b2; The external watchdog generates an oszillating signal if it is not
triggered in time. This guarantees that the processor will be reset
until the program has started up and generates the necessary
trigger pulses.
.b; The external watchdog is implemented with 3 retriggerable monoflops.
The first monoflop, realized by a 74LS123 is used only to hold the
output at high level, if no trigger impulses are received. This is
necessary to bring the WD in an oscillating mode.
If trigger impulses are received, the monoflops transmit these to the
trigger input of the 74LS123. This circuit is a dual retriggerable
monoflop with external R-C networks, which causes a pulse-width-
modulation signal of 15ms or 7ms respectively. In normal operation
section 1 is triggered every 12 ms by a software generated output pulse.
In case of no retriggering for more than 15 msec, output Q1 will go
low, resulting in a system reset. Section 2 will be triggered
simultaneously and the reset signal will oscillate until the software
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
3.5Discrete Inputs/Outputs
The different external input signals (30V and 110V) are converted to logic level by optically
insulated level converters located on the DCSS Inverter board.
30V Inputs:
To cover most applications, two different control methods for 30V operation can be real-
ized:
Pull-Up (+): Two inputs (DOB [P5/7] and DO [P5/8]) are activated by a
voltage of 30V (I~12mA) referring to HL2.
- Pull-Down (__): Two inputs (/SO [P5/4] and /NDG [P5/5]) are activated by
pulling the appropriate input to HL2 (I~-12mA). A supply of
+30V must be provided at P5/1.
Outputs:
Two output stages DOS and /DOL can switch +30V to connected devices. The supply con-
nected at +30V [P5/1] must be able to cover the requested power according to the con-
nected devices. The referring ground is HL2.
Recovery diodes prevent the transistors from overvoltage due to inductance at the output.
3.6Connector References:
- P1.1 L1
- P1.2 PE, note 1
- P1.3 N
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
P3.1 : +15V/200mA , output (power supply for position reference), Ref. P2.4
P3.2 : T1, input, note 3
P3.3 : T3, input, note 3
P3.4 : Gnd
P3.5 : Shield encoder cable
(L)MCSS Serial Link( RS485): 4 pin Wago (male, 5mm, pin 4 coded)
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
P6.1 : +5V
P6.2 : nc
P6.3 : TxB1
P6.4 : RxA1
P6.5 : Gnd
P6.6 : +5V
P6.7 : TxA1
P6.8 : RxB1
P6.9 : Gnd
PRODUCT Page : 17 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
4Quality Criteria
Current values:
Circuit Min. Typ. Max Unit
L1 Input Current < 0.1 1 6 Arms
VCC : without SV-Tool 0,4 0,5 0,6 Arms
VCC : with SV-Tool 0,8 0.9 1,0 Arms
V15 : (incr. encoder) 0.01 0.1 0.2 Arms
24V1, 24V2, 24V3 001 0.1 < 0.2 Arms
24V4 0.03 0.3 < 0.9 Arms
VBIAS 0.02 0.05 < 0.2 Arms
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
Current values: High -Level input current ( Vin = 110 Vrms): 8.5 mA
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
3.8.1 Input
Referencepoint: P4_2 (RXB0)
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
3.8.2 Output
Referencepoint: P4_3 (TXA0) (note)
note: set Z7/9 (ENTX0) = L-Level, Z7/8= H-Level in order to enable output driver
3.9.1 Input
Referencepoint: P6_8 (RXB1)
3.9.2 Output
Referencepoint: P6_7 (TXA1)
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
4 Interface Description
The controller must be set to “Door Operator=DO2000” (if not available: “9550”).
The Limited Car Board has no serial link. The communication between the systems is done
by the discrete signals only. These are the DO and /NDG signals which are interpreted by
the DCSS as a door command.
The reversal device signal DOB, LRD, EDP and the /DOL output of the DCSS are read by
a Remote Station Board.
These discrete signals are converted by the RSB into a serial information and are sent to
the LCB via the serial link.
Reopening for passenger protection is signaled to the operational controller at the DOB in-
put by the Door Open Signal (DOS) of the DCSS.
Nudging operation is provided as standard by the DCSS and may be selected by the
operational controller, e.g. with delayed car operation, EFS etc.
DOB, EDP and LRD commands are processed by the operational controller and may be
disabled in specific modes.
The Door Open Limit (/DOL) output of the DCSS signals correct door opening to the opera-
tional controller.
Emergency Door Stop (/EDS) deenergizes the door according to code requirements and
will be connected to the safety chain.
Top of Car Inspection (/TCI) input indicates the inspection mode. In this mode a door com-
mand can be entered by the Service Tool.
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
PRODUCT Page : 23 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
The MS/NE 300 system uses the same system structure as described for the
MCS120/220/310/312 system above.
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
The DCSS and the (L)MCSS are connected via the serial link for the data transmission and
by the discrete /Safe to Open signal /SO.
A 5-pole connector P4 with two twisted pair wires establishes the serial communication
between the (L)MCSS and the DCSS. It satisfies the RS 485 standard for differential data
transmission lines. Via this serial link commands and status information’s are transmitted.
The /Save to Open (/SO) input is connected to +30V via a 2.2k resistor and the photo cou-
pler on the DCSS. The MCSS has to pull down this input to HL2 to enable a door opening.
It can be enabled only, if the car is stopping in the door zone.
The /NDG input is re-assigned to be connected to an Electronic Door Protector (EDP). The
according output must be able to switch (+30V) to HL2 (=RTN on RS board).
The DO input is re-assigned to be connected to a Light Ray Device LRD. The according
output must be able to switch to +30V (supply of the RS boards).HL2 on P5.8 must be con-
nected to HL2(=RTN of the RS link).
The DOB input is assigned to be connected to the Door Open Button. It is switched to +30V
(supply of the RS boards). HL2 on P5.10 must be connected to HL2 (=RTN of the RS link).
With the Multidrop Serial Link 2*DCSS for front and alternate door and one loadweighing
device can be connected to the serial bus. To avoid an overload of the transmit driver on
the (L)MCSS board the impedance of the receiver of the DCSS can be adapted by setting
an electronic switch, operating as line terminator, during the installation routine. How the
line terminator has to be set depends on the configuration (see table):
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
To move a door from the top of car without additional tools (SVTOOL) the DCSS can be
commanded by the TDOS switch, located into the TCI box. The TDOS can be switched to
Top of car Door Opening Button (TDOB) for door opening or to Top of car Door Closing
Button (TDCB) for closing.
To enable the Top of Car Inspection operation the parameter 'TCI with BS7255', has to be
set in the sub-menu ‘CONFIG’ of the ‘SETUP’ menu (SVTOOL key sequence :3-3-1).
The connections to the DCSS differ between the serial, discrete and Relay Controller In-
terfaces (with additional Interface Box).
To operate the door system from top of the car, the elevator must be set into Inspection
mode (TCI) and the Service Tool must be disconnected e.g. the SVT has the higher prior-
ity. With three discrete signals the door operator can be controlled. One signal (NDG input)
to enable a door movement only in the door zone and two signals (DOB and /SO) to control
the opening and closing of the door.
- The doorzone signal will be set by the controller and is sent to the DCSS (P5.5)
via the Remote Station.
- The door close command (TDCB) is read by the Remote Station, transferred to
the LCB, which set the Door Close Management (DCM) via the RS17. This signal is
read by the DCSS at input P5.4.
- The door open command (TDOB) is read directly by the DCSS at DOB input P5.7
The door operator starts moving the door with a delay of 2 seconds with a low speed profile
during Top of Car Inspection.
If no discrete signal is activated, the door system will stay in the shut down mode.
The software of the LCB must be revised to set the NDG output if TCI is set into inspection
and the car is in the door zone.
Part : 4 - C9
OTIS BASIC DATA No. : GDA24350AW
Otis Engineering Center
Berlin Vintage: 01 / 1
PRODUCT Page : 28 / 30
DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
Safety
Chain DO Controller: "NDG" OR ("TCI" AND "Door Zone")
| | |
110V | | v
| | ,---------. ,-----------.
| | | RS18 | | RS17 |--- NDG --------.
| | |TDOB TDCB| | DOS DOL|--- DCM ---. |
| | `---------' `-----------' v v
o o | ^ ^ ^ ^ ,---------. .---------.
/ .TES | | | | | |/SO NDG | | |
o etc +------|-----|------|-------|------DO-->| | | |
| | | | | | | | DOOR |
| | | | | | +----+ MOTOR |
| +-----|------|-------|------DOB->| | | |
| | | | | | | | |
o----------------|-----|------|-------|-----/EDS->| D C S S | | |
| | | | | | (DO2000)| | |
| o o--------|-----|------|-------|--- -/TCI->| | .---------.
| TCI / | | | | | " BS " | | |
o-----o | | | | | | | |
| o o o-------|-----/DOS-<| +----+ SPEED |
| TDOB/ /TDCB /DOB | | | | ENCODER |
V o o o +-----/DOL-<| | | |
| | | ,------. `---------' `---------'
`-----`--o o---TCI--->| RS16 |
/ | |
o `------'
|
30V
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
(TDOB) and the 'LRD' input will be recognized as a "Close" command (TDCB). Due to the
code requirements a door movement from the top of the car without a Service Tool is al-
lowed only if the car is in the door-zone, recognized by the '/SO'- signal.
The door operator only provides a slow speed (initialize) during Top of Car Inspection.
If no discrete signal is activated, the door system will stay in the shut down mode.
Safety
Chain
|
|110V
|
|
o o ,---------. .---------.
/ TES ,--------------o-------------------DOB->| | | |
o etc. | | | | | |
| | | | | | DOOR |
| | ,--------|------o---------LRD=DO·>| +----+ MOTOR |
| | | | | | | | |
| | | | | | | | |
o-----------|-----|--------|------|-----------/EDS->| D C S S | | |
| | | | | | | | |
| | | | | | | | |
| TCI o o--|-----|--------|------|-----------/TCI->| | .---------.
| / | | | | | | | |
o-----o o o o o -----/SO->| +----+ SPEED |
| / / / / | | | ENCODER |
V o o o o --RS485-><| | | |
| | | | `---------' `---------'
`-----o--o o--o------'
TDOB TDCB / DOB LRD
o TCI
|
| +30 V
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DCSS 4
ADMINISTRATION Date : 30-Nov.-1998
During the first phase of the Emergency Firemen Service (EFS) a door reversal must be
disabled, to guarantee that the doors can be closed to drive the car to the EFS floor. Due to
the different kinds of controller interfaces there are different ways to indicated the EFS
mode.
- Discrete Interface:
To indicate the EFS mode the input '/SO' at plug P5.4 must be pulled down to
HL2 by the Remote Station output 'DCM' (Door Close Management). With this
information the internal Passenger Protection of the DCSS will be disabled.
- Serial Interface:
The door system will be informed of the EFS mode by receiving the respective
door command via the serial link. No additional actions are necessary.