FP6137

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fitipower integrated technology lnc.

FP6137F
3A BUS
TERMINATION REGULATOR

Description Features
The FP6137F linear regulator is designed to provide ● Peak 3A Source or Sink Current
the transient peaks up to 3A sourcing or sinking ● Power MOSFET Integrated
capability for DDR SDRAM bus termination ● Low Output Voltage Offset
application. The output voltage can track half of ● Built-in Soft-start
input power by two external voltage divider resistors. ● Current Limiting Protection
● Thermal Shutdown Protection
The FP6137F provides current limiting in both ● Adjustable Output by External Resistors
sourcing/sinking mode and thermal shutdown ● Shutdown for Standby or Suspend Mode
function which protects the excessive heating due to ● RoHS Compliant
high current and high junction temperature.

The FP6137F is available in SOP-8 (Exposed Pad) Applications


package.
● DDR-I, DDR-II, DDR-III ,and DDR-IIIL Bus
Termination Voltage
● SSTL-2 and SSTL-3 Termination
● Active Termination Buses

Pin Assignments Ordering Information


SP Package (SOP-8 Exposed Pad) FP6137F□□□
TR: Tape/Reel

VIN 1 8 NC
C: Green
GND 2 7 NC
GND
REFEN 3 6 VCNTL
VOUT 4 5 NC Package Type
SP: SOP-8 (Exposed Pad)

Figure 1. Pin Assignment of FP6137F (Top View)

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fitipower integrated technology lnc. FP6137F

Typical Application Circuit


1.35V/1.5V/1.8V/2.5V
VIN VCNTL
3.3V

RU VIN VCNTL
100K
FP6137F 0.675V/0.75V/0.9V/1.25V
REFEN VOUT VOUT
CIN
470µF CCNTL
RD CSS 47µF
1µF GND CVOUT
Q1 100K
EN 470µF

Figure 2. Typical Application Circuit of FP6137F with EC Capacitors

1.35V/1.5V/1.8V/2.5V
VIN VCNTL
3.3V

RU
100K VIN VCNTL
*A
FP6137F
0.675V/0.75V/0.9V/1.25V
REFEN VOUT VOUT
CIN
10µF CCNTL
RD CSS 1µF
1µF GND CVOUT
Q1 100K
EN *A 22µF

Note A: The recommend value of resistor is 10k~100k

Figure 3. Typical Application Circuit of FP6137F with MLCC Capacitors

Functional Pin Description


Pin Name Pin Function

Power input pin. VIN is the input power supply used to create the external reference voltage for regulating
VIN
VOUT. VIN sources current to VOUT by upper NMOS.

GND Common ground pin. The VOUT sinks current to GND by lower NMOS.

VCNTL Power input pin. The VCNTL power supplies the internal control circuitry and gate drive voltage.

Chip enable, and input reference voltage pin. The reference voltage is half of the VIN power by two external
REFEN
voltage divide resistors.

Regulator output pin. VOUT voltage tracks the REFEN voltage and is capable of sourcing or sinking current up
VOUT
to peak 3A.

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Block Diagram

VCNTL VIN

+
REFEN Soft Start
Error VOUT
Amp
-
Current Limit &
Thermal Shutdown

GND

Figure 4. Block Diagram of FP6137F

Absolute Maximum Ratings


● VIN to GND --------------------------------------------------------------------------------------- 6V
● VCNTL to GND ---------------------------------------------------------------------------------- 6V
● Power Dissipation @25°C (PD) SOP-8 (Exposed Pad) -------------------------------- 1.25W
● Package Thermal Resistance (θJA) SOP-8 (Exposed Pad) --------------------------- 80°C/W
● Junction Temperature -------------------------------------------------------------------------- 150°C
● Storage Temperature Range ----------------------------------------------------------------- -65°C to +150°C
● Lead Temperature (Soldering, 10sec.) ----------------------------------------------------- 260°C
Note 1:Stresses beyond those listed under “Absolute Maximum Ratings" may cause permanent damage to the device.

Recommended Operating Conditions


● Input Voltage (VIN) ------------------------------------------------------------------------------- (1.35V,1.5V,1.8V, 2.5V) ±5%
● Input Voltage (VCNTL) ---------------------------------------------------------------------------- (3.3V to 5.5V) ±5%
● Operating Temperature Range (TOPR) ------------------------------------------------------ -40ºC to +85ºC

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Electrical Characteristics
(VCNTL=3.3V, VIN=1.35V/1.5V/1.8V/2.5V, VREFEN=0.5*VIN, COUT=10μF, TA=25°C, unless otherwise specified)
Parameter Symbol Test Conditions Min Typ Max Units

INPUT
Operation Voltage Range
VCNTL 3.3 5.5 V
(DDRI /DDII/ DDR-III/ DDR-IIIL)
VCNTL Quiescent Current ICNTL No Load 1.5 3.0 mA

Shutdown Current ISD VREFEN<0.2V 5 30 μA

OUTPUT VOLTAGE

Output Offset Voltage VOS No Load , (VREFEN-VOUT) -20 0 20 mV

Load Regulation (Note2) IOUT = 0 to 2A 20


|  VLOAD | mV
(DDRI/DDII/DDR-III/ DDR-IIIL) IOUT = 0 to -2A 20
VCC=3.3V to 5.5V,
Line Regulation 1 20 mV
No Load
PROTECTION

Soft-Start Time TSS 400 μs

Current Limit ILIM 3.0 4.0 A

Thermal Shutdown Temperature TSD 170 °C


(Note3)
 TSD Hysteresis 35 °C

SHUTDOWN CONTROL

Enable High Level VREF-H 0.6 V

Shutdown Low Level VREF-L 0.2 V


Note 2:Load regulation is measured at a constant junction temperature by using a 20ms low duty cycle current pulse.
Note 3:Guarantee by design.

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Typical Performance Curves


Temperature vs. Vout Temperature vs. Vout
0.77 0.92

VCNTL=3.3V 0.915 VCNTL=3.3V


0.765
VIN =1.5V, VREFEN=0.75V VIN =1.8V, VREFEN=0.9V

0.76 0.91

VOUT(V)
VOUT(V)

0.755 0.905

0.75 0.9

0.745 0.895

0.74 0.89
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
Temperature(℃ ) Temperature(℃ )

Figure 5. Temperature vs. Vout Figure 6. Temperature vs. Vout

Temperature vs. Vout


Temperature vs. Quiescent
1.27 1.4
VCNTL=3.3V
1.265
VIN =2.5V, VREFEN=1.25V 1.3
Current(mA)

1.26
1.2
VOUT(V)

1.255
VCNTL=3.3V
1.1 VIN =1.5V, VREFEN=0.75V
1.25
1
1.245

1.24
0.9
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
Temperature(℃ )
Temperature( ℃)

Figure 7. Temperature vs. Vout Figure 8. Temperature vs. Quiescent Current

Temperature VS. Source Current limit Temperature VS. Sink Current limit
3.8 4.5
4.45
Source Current Limit(A)

3.75
Sink Current Limit(A)

VCNTL=3.3V
3.7 VIN =1.5V, VREFEN=0.75V 4.4
3.65 4.35
3.6 4.3
VCNTL=3.3V
3.55 4.25 VIN =1.5V, VREFEN=0.75V
3.5 4.2
3.45 4.15
3.4 4.1
3.35 4.05
3.3 4
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 -40 -30 -20 -10 0 10 20 30 40 50 60 70 80 90
Temperature(℃ ) Temperature(℃ )

Figure 9. Temperature vs. Source Current Limit Figure 10. Temperature vs. Sink Current Limit

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Typical Performance Curves (Continued)

VCNTL VCNTL=3.3V VCNTL=3.3V


VCNTL VIN=2.5V, VREFEN=1.25V
VIN =1.35V, VREFEN=0.675V
VIN Sink VIN Sink

VOUT VOUTL

IOUT IOUT

Figure11. Output Transient Response Figure12. Output Transient Response

VIN VCNTL=3.3V VIN VCNTL=3.3V


VIN =1.35V, VREFEN=0.675V VIN =2.5V, VREFEN=1.25V

VCNTL VCNTL Source


Source

VOUT
VOUT

IOUT IOUT

Figure13. Output Transient Response Figure14. Output Transient Response

VCNTL VCNTL=3.3V VCNTL VCNTL=3.3V


VIN =1.35V, VREFEN=0.675V VIN VIN =2.5V, VREFEN=1.25V
VIN VOUT

VOUT

IOUT IOUT

Figure15. Output Short-Circuit Protection Figure16. Output Short-Circuit Protection

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Outline Information
SOP-8 (Exposed Pad) Package (Unit: mm)

SYMBOLS DIMENSION IN MILLIMETER


UNIT MIN MAX
A 1.25 1.70
A1 0.00 0.15
A2 1.25 1.55
B 0.31 0.51
D 4.80 5.00
D1 3.04 3.50
E 3.80 4.00
E1 2.15 2.41
e 1.20 1.34
H 5.80 6.20
L 0.40 1.27

Note:Followed From JEDEC MO-012-E.

Carrier dimensions

Life Support Policy


Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.

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