MP & MC Chap3
MP & MC Chap3
Reset circuit
Microcontrollers contain memory units and I/O ports inside a chip in addition to
the CPU part.
Serial
I/O Port Timer COM Port
On chip On chip
data program No. of 16-bit No. of
Device Serial I/O
memory memory Timer/Counter Interrupts
(Byte) (Byte)
CPU
OSC Bus
4 I/O Ports Serial
Control
P0 P2 P1 P3 TXD RXD
Addr/Data
Reset Input
RST I High logic “1” on this pin for two machine cycles while the
oscillator is running will reset the device
Solution:
Solution:
1) Register banks
✓ There are four register banks from 00H to 1FH. On power-up, registers R0 to
R7 are located at 00H to 07H.
✓ However, this can be changed so that the register set points to any of the
other three banks (if you change to Bank 2, for example, R0 to R7 is now
located at 10H to 17H).
RS1 RS0
[PSW.4] [PSW.3]
BANK 0 0 0
BANK 1 0 1
BANK 2 1 0
BANK 3 1 1
✓ 80 bytes from 30H to 7FH locations are used for read and write storage; it is
called as scratch pad. These 80 locations RAM are widely used for the purpose of
storing data and parameters by 8051 programmers.
FF FF
INDIRECT DIRECT SPECIAL
UPPER
ADDRESSING ADDRESSING FUNCTION
128
FOR 8052
REGISTERS
80 80
7F
DIRECT/
LOWER
INDIRECT
128
ADDRESSI
NG
00
RAM
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Special Function Registers (SFRs)
The second 128 bytes are used to store Special Function Registers (SFR) that 8051
program can configure and control the ports, timer, interrupts, serial
communication, and other tasks.
Special Function Registers (SFRs) are used for running and monitoring the
operation of the microcontroller.
Each of these registers as well as each bit they include, has its name, address in
the scope of RAM and precisely defined purpose such as timer control, interrupt
control, serial communication control etc.
Even though there are 128 memory locations intended to be occupied by them,
the basic core, shared by all types of 8051 microcontrollers, has only 21 such
registers.
Each register of SFR has one byte address. Some of the registers are both byte and
bit addressable (The registers whose address ends with 0H or 8H are bit
addressable).
Example1 : Move 25H and 30H into the registers R0 and R1 of bank2.
✓ In order to select bank2 we need to make RS0=0 and RS1=1 i.e psw.3=0 and
psw.4=1
CLR PSW.3 ;CLR means clear psw.3 i.e RS0=0
SETB PSW.4 ;RS1=1, now bank2 is selected
MOV R0,#25H ;move 25H in R0
MOV R1,#30H ; move 30H in R1
Example2 : Move 10H and 12H into the registers R3 and R4 of bank3.
SETB RS0 ; PSW.3 =1
SETB RS1 ; PSW.4 =1, now bank3 have been selected
MOV R3,#10H ;move 10H in R3
MOV R4,#12H ; move 12H in R4
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8051 Internal Data Memory (RAM)
Register Banks:
Example3 : Move 02H and 12H into the registers R0 of Bank0 and R4 of bank2
respectively.
Program addresses higher than 0FFFH will automatically fetch code bytes from
external program memory
Ex:
SETB P1.0
MOV P1,#0xFF
In this input mode when '1' is written to the pin by the external device then it
reads fine.
But when '0' is written to the pin by the external device then the external source
must sink current due to internal pull-up.
If the external device is not able to sink the current the pin voltage may rise,
leading to a possible wrong reading.