DEJ 40033

PROGRAMMABLE LOGIC
CONTROLLER &
AUTOMATION

CHAPTER 4
PLC PROGRAMMING
 LEARNING OUTCOME

 4.1 Understand PLC programming system

4.1 .1 Explain PLC programming method:
a. Ladder Diagram
b. Mnemonic Code
c. Instruction Set
d. Sequential Function Chart (SFC)
e. Function Block Diagram (FBD)
f. Human Machine Interface (HMI)
g. Windows Based program

4.1.2 Use ladder diagram and mnemonic codes to solve

control system circuits.
 Ladder
Diagram

Human Windows
Machine Based
Interface Program

PLC
Programming
Method Sequential
Mnemonic
Function
Code
Chart

Function
Instruction
Block
Set
Diagram
 LADDER DIAGRAM

 A way of representing electrical sequences of operations.

 To represent hardwired logic circuits used to control machines or
equipment.
 It is a language which composes program using relay symbols as
a base in an image similar to a hard -wired relay sequence.
 In order to achieve an ef ficient data -processing program, ladder
diagram which are combinations of relay symbols and function
blocks are used.
 It indicative control circuit, display operation function and
combination of sequence operation for each branch in horizontal
line separately (refer Figure 1).
 LADDER DIAGRAM

Electrical Diagram Hardwired Diagram

 MNEMONIC CODE

 Consists of
Address Instruction Operand
 Address
 Instruction 00000 LD 00000
 Operand 00001 FUN 02 -
 Ladder diagram could not be 00002 LD 00001
read by Programming
Console. 00003 OUT 10000
 Hence, ladder diagram need 00004 FUN 03 -
to be convert to mnemonic
code. 00005 FUN 01 -
 Mnemonic code give same
information as ladder
diagram and can be typed
directly to the Programming
Console
 INSTRUCTION SET

 A low -level computer language used to construct the ladder logic

diagram by entering statements that specify the various
components, and relationships for each rung of the ladder
diagram.
 Example:

Command Comment
STR X1 Store input X1
AND X2 Input X2 in series
with X1
OUT Y Output Y
 SEQUENTIAL FUNCTION CHART (SFC)

 SFC graphically displays the sequential functions of an

automated system as a series of steps an transitions from one
state of the system to the next.
 The three main components of an SFC are steps, actions and
transitions.
 Steps: chunks of logic, i.e., a unit of programming logic that
accomplishes a particular control task.
 Actions: the individual aspects of that task.
 Transitions: the mechanisms used to move from one task to
another.
 Control logic for each Step, Action and Transition is programmed
in one of the other languages such as Ladder Diagram or
Structured Text.
 MOTOR
Step 1 (START)

Transition 1 Action
Step 2 MOTOR
(END)
Transition 2
Step 3
 FUNCTION BLOCK DIAGRAM (FBD)

 Is a graphical language that allows the user to program elements

in blocks.
 The blocks can then be wired together like electrical circuits.

SWITCH 1 OR
SWITCH 2 AND CYLINDER
OUT
LAMP ON
 HUMAN MACHINE INTERFACE (HMI)

 HMI communicate with PLC and input/output sensors to get and

display information for users to view.
 HMI screen can be used for a single function, like monitoring and
tracking, or for performing more sophisticated operations, like
switching machines of f or increasing production speed, depending
on how they are implemented.
 WINDOWS BASED PROGRAM

 A type of software program for a specific brand of PLC that is

developed by a company other than the manufacturer of that
PLC.
 These software programs can generally be used with most
personal computers in either a DOS® or Windows®
environment.
 It has Simulator which allows ladder program to be simulated
on a PC without purchasing the PLC.
 BASIC LADDER DIAGRAM

 The ladder diagram program is constructed by units called rung. A

rung is defined as one network which is connected each other.
 It comprises of one vertical line on the left and right called bus
bar and also horizontal line to the right called instruction lines.
 Along the instruction lines, there are combination of logic
conditions which will determine when and how the directions of
the most right will be executed.
 BASIC LADDER DIAGRAM

Instruction lines

Bus Conditions Bus

bar bar
BASIC LADDER DIAGRAM

Input Output
 There are 2 types of conditions:
 Normally Open (NO) - ladder logic symbol that allow logic flow if
input is logic is "1" (ON)
 Normally Closed (NC) - ladder logic symbol that will allow logic flow
if input is logic "0" (OFF)
Conditions Operand
bits
NO ON ON
OFF OFF
NC ON OFF
OFF ON
• Numbers at every conditions determine the operand bits for its
instruction.
• Each instruction inside a ladder diagram, either ON or OFF, depends
on operand bit status prior set by the programmer.
Operand bits

Instruction
executed when LD
00000 is ON

Instruction
executed when LD
00000 is OFF
 EXECUTION CONDITION

 Logic combination between ON and OFF conditions, forming a

set of instructions to be executed

 Instruction will be in Execution Conditions ON when: LD 00000

ON, LD 00001 OFF and LD 00002 ON
 OPERAND BITS

 Operand bits for every instruction c an consists of any bits from

memory areas IR, SR, HR, TC or TR.
 Its mean conditions in ladder diagram can be set by I/O bits, flags,
work bits, timers/counters and others.
 LOGIC BLOCK AND INSTRUCTION BLOCKS

 Logic Blocks : Any group of condition formed to produce one

logic outcome
 Instruction Blocks : Consists of all instructions exist within a
block
 LEARNING OUTCOME

 4.2 Apply the following basic logic instruction set

4.2.1 Show basic logic instruction, operation and
sequence timing chart:
a. Load/Load Not
b. And/And Not
c. Or/Or Not
d. AND load
e. OR load
f. Out
g. END
h. No operation
 LD
LD OR
NOT NOT
Basic Logic
Instruction

AND OR
AND
NOT
 LOAD (LD)

 It was to start something programmed line.

 It are used at first contactor in the normally open (NO) .
 LOAD NOT (LD NOT)

 It was to start something programmed line.

 Used at first contactor in the normally closed (NC) situation.

 Ladder diagram
Implementation State (Execution Conditions) for instruction in
right will ON when IR 00000 is OFF
 AND

 Connects an NO condition in series with the previous condition

 Implementation State (Execution Conditions) for instruction in
right will ON when IR 00000 and IR 00001 is ON.
 AND NOT

 Connects an NC condition in series with the previous condition

Information Ladder diagram

 Implementation State (Execution Conditions) for instruction in
right will ON when IR 00000 is ON and IR 00001 is OFF.
 OR

 Connects an NO condition in parallel with the previous condition.

 OR NOT

 Connects an NC condition in parallel with the previous condition.

 OUT

 Outputs the result of logic to a bit.

 END

 Act as the last instruction for every program.

 No one instruction will be written after END (01).
 Written as FUN 01 in the mnemonic code.
 If END (01) instruction is not written in the programming, hence
there is no instruction will be implemented and NO END LIST will
be stated in the PLC console screen.

Address Instruction Operand

00000 LD NOT 00000

00001 OUT 10000

00002 FUN(01) -
 NO OPERATION

 This instruction has no ladder diagram symbol and it will not be

doing any operation.
 When memory CLEAR, this instruction will be displayed on the
PLC console screen.
 OR LOAD

 Connection between 2 blocks which are connected in parallel

 Instruction with no physical relays device.

Block 1

Block 2
 AND LD

 Connection between 2 blocks which are connected in series.

 Instruction with no physical relays device.

Block 1 Block 2
COMBINATION OR LD & AND LD
 EXERCISE 1

Q: WRITE THE MNEMONIC CODE

Q1:

A1:
 EXERCISE 2

Q2:

A2:
2. Write mnemonic code for figure ( i) and figure (ii) below
EXERCISE 4

 Write mnemonic code for figure ( i ) figure ( ii ) below.

 LEARNING OUTCOME

 4.3 Apply special sequential instruction set

4.3.1 Show special sequential function, operation and
sequence timing chart:
a. Keep
b. Set/Reset
c. Jump
d. Interlock
e. Dif ferentiate Up/Down
 INTERLOCK [ IL ( 02 ) ] AND INTERLOCK
CLEAR [ ILC ( 03 ) ]
 Allow specific section to be control either to execute or not.
 Pair: Interlock and Interlock Clear
 For PLC 's set OMRON type - SYSMAC CQM1H:
 INTERLOCK: FUN 02
 INTERLOCK CLEAR: FUN 03
 When IL 02 is ON, all the output instructions between IL 02 and
ILC 03 will be executed accordingly. But, if IL 02 is OFF, the
output in between is also OFF even though there is supply to it.
 ILC 03 is use to reset the program.
 Address Instruction Operand
00000 LD 00000
00001 FUN 02 -
00002 LD 00001
00003 OUT 10000
00004 FUN 03 -
00005 FUN 01 -

Instruction LD 00000 Instruction LD 00001 Instruction OUT 10000

IL(02) (input) (output)

ON ON ON
OFF OFF
OFF ON OFF
OFF OFF
Table: Instruction set
 JUMP [JMP (04)] AND JUMP END [JME
(05)]
 A specific section of a program can be skipped according to the
execution.
 Pair:
 JUMP (04): jump starting point
 and JUMP END (05): jump direction
 For PLC 's set OMRON type - SYSMAC CQM1H:
 JUMP (04) : FUN 04
 JUMP END (05) : FUN 05
• When JMP (04) is ON = no jump occurred and the programs will perform
accordingly.
• When JMP (04) is OFF = the instruction will jump to JME (05) (which has the
same number). The instructions after JME (05) will be executed.
• JUMP and JUMP END can use numbers range from 00 to 99.
 skipped

Address Instruction Operand

00000 LD 00000
00001 FUN (04) 01
00002 LD 00001
00003 OUT 10000
00004 FUN (05) 01
00005 FUN (01) -
Instruction LD 00000 Instruction LD 00001 Instruction OUT
JMP(04) (input) 10000 (output)
ON ON ON
OFF OFF
OFF skipped skipped
Table : Instruction set
 EXERCISE 5
According to Table 1 , which output will ON when:
 JMP(04) is ON.
 JMP(04) is OFF.
Address Instruction Operand
00000 LD 00002
00001 FUN (04) 01
00002 LD 00003
00003 OUT 10004
00004 FUN (05) 01
00005 LD 00004
00006 OUT 10005
00007 FUN (01) -
Table 1
 EXERCISE
By referring to Table 2, complete Table 3. 6

Address Instruction Operand

00000 LD 00000
00001 FUN (02) -
00002 LD 00002
00003 OUT 10004
00004 LD 00003
00005 OUT 10005
00006 FUN (03) -
00007 FUN (01) -
Instruction Instruction Instruction Instruction Instruction
LD 00000 LD 00002 LD 00003 OUT 10004 OUT 10005
IL (02) (input) (input) (output) (output)
ON ON ON
OFF OFF
OFF ON ON
OFF OFF
 KEEP (11)

 To maintain the bit status operation based on two execution

condition.
 KEEP (11) operating such as Latching Relay which set by S
and reset by R.
 When S is ON, certain instruction operation will ON and
remain ON until reset regardless S is ON or OFF.
 For PLC 's set OMRON type - SYSMAC CQM1H:
 KEEP = FUN 11.
Address Instruction Operand
00000 LD 00002
00001 LD 00004
00002 FUN (11) HR 0000
00003 LD HR 0000
00004 OUT 10004
00005 FUN (01)

Figure : Ladder diagram for instruction KEEP

Instruction Instruction Instruction

LD 00004 LD 00002 OUT 10004
Reset Set OUTPUT
OFF ON ON
OFF ON
ON ON OFF
OFF OFF
Table : Instruction set for KEEP
 SET & RESET

 SET and Reset instructions only change the status of their operand
bits for ON execution condition.
 Neither instruction will ef fect the status of its operand bit when an
execution condition is OFF.
 SET :
 turn ON the operand bit when execution condition goes ON
 Will not turn OFF the operand bit when the execution condition goes
OFF.
 RESET:
 turn OFF the operand bit when the execution condition turn OFF
LADDER DIAGRAM FOR INSTRUCTION SET
& RESET

Address Instruction Operand

00000 LD 00000
00001 SET 10000
00002 LD 00001
00003 RESET 10000
 DIFFERENTIATE UP [ DIFU (13) ] AND
DIFFERENTIATE DOWN [ DIFD (14) ]
 DIFFERENTIATE UP : Turns ON a bit for one cycle when the
execution condition goes from OFF to ON
 DIFFERENTIATE DOWN: Turns ON a bit for one cycle when the
execution condition goes from ON to OFF.
 For PLC 's set OMRON type - SYSMAC CQM1H:
DIFU (13) = FUN 13
DIFD (14) = FUN 14
INPUT

DIF U

DIF D
Figure : Time diagram for DIFU and DIFD
DIFFERENTIATE UP [ DIFU (13) ]

Address Instruction Operand

00000 LD 00000
00001 FUN (13) 01000
00002 LD 01000
00003 OUT 10000
DIFFERENTIATE DOWN [ DIFD (14) ]

Address Instruction Operand

00000 LD 00000
00001 FUN (14) 01000
00002 LD 01000
00003 OUT 10000
 LEARNING OUTCOME

 4.4 Apply Timer and Counter instruction set

4.4.1 Show the timer instruction set, operation and
sequence timing chart
4.4.2 Show the counter instruction set, operation and
sequence timing chart
 TIMER - TIM

 A device that switches its output ON or OFF at a preset time

intervals.
 When the input signal is received, the timer waits the specified
delay time set in the set value, before switching ON or OFF the
output signal.
 The timer is RESET (output or relay is set back to its initial value)
by turning OFF the input signal
 Symbol

TIM N Operand/Definer
#SV Set value
 Operand/Definer: between 000 to 015
 The number can not be used twice in a single program
 When a timer number has been defined (e.g. TIM 000), it can
be used any amount of time as operator operand in other
instruction other than TIMER.
 Set value (SV): between 0000 to 9999
# 0001 = 0.1 sec
# 0050 = 50 x 0.1 sec = 5 sec
# 0100 = 100 x 0.1 sec = 10 sec
 EXAMPLE 1

Address Instruction Operand

00000 LD 00000
00001 TIM 000
# 0050
00002 LD TIM 000
00003 OUT 10000
00004 FUN 01 -
ON
INPUT OFF
(00000)
5 sec Figure: Timing Diagram
OUTPUT
 EXAMPLE 2

Address Instruction Operand

00000 LD 00000
00001 TIM 000
# 0050
00002 LD TIM 000
00003 OUT 10000
00004 LD NOT TIM 000
00005 OUT 10001
00006 FUN 01
ON

INPUT OFF
(00000) 5 sec
Figure : Timing Diagram
10000

10001
 EXAMPLE 3

Address Instruction Operand

00000 LD 00000
00001 TIM 000
# 0050
00002 LD TIM 000
00003 AND NOT TIM 001
00004 OUT 10000
00005 LD 10000
00006 TIM 001
#0030
ON 00008 FUN 01 -

INPUT OFF
(00000) 3 sec
Figure : Timing
5 sec
Diagram
OUTPUT
 EXERCISE

 Based on the Ladder diagram below,

 How long is the delay time that had been set in TIM 001?
 Write the mnemonic code.
 Draw the timing diagram.
 COUNTER - CNT

 A component used to count electrical pulses and store the results

of the counting procedure.
 Each time the count pulse (CP) goes from ON to OFF, it store on
pulse and count until it reaches the set value (SV).
 Once the SV is reach, the output will turn ON, and remain ON even
if the CP is turn OFF.
 To turn OFF the output, the Reset signal is given (zeroing the
counter).
 Can be counter up or down.
 Symbol

Input switch (CP) CNT N Operand/Definer

Reset (R) #SV Set value
 Operand/Definer: between 000 to 015
 The number can not be used twice in a single program
 When a counter number has been defined (e.g. CNT 000), it can be
used any amount of time as operator operand in other instruction
other than counter.
 Set value (SV): between 0000 to 9999
# 0010 = 10 pulse
# 0100 = 50 pulse
EXAMPLE

Address Instruction Operand

00000 LD 00000
00001 LD 00001
00002 CNT 000
#0010
00003 LD CNT 001
00004 OUT 10000
00005 FUN 01 -
 COUNTER & TIMER

 COUNTER AND TIMER operand number cannot be the identical

because both share the same data area in PLC memory.

Address Instruction Operand

00000 LD 00000
00001 LD 00001
00002 CNT 000
#0005
00003 LD CNT 000
00004 OUT 10000
00005 LD 10000
00006 TIM 001
#0050
00009 LD TIM 001
00010 OUT 10001
00011 FUN 01 -
 LEARNING OUTCOME

 4.6 Set-up simple/combined ladder diagram and instruction set.

4.6.1 Propose a translation of hardwired RLL to PLC
combined ladder logic based on section 2.4, 4.2, 4.3
and 4.4
4.6.2 Propose simple/combined ladder diagram
4.6.3 Propose combined ladder diagram and instruction set
based on section 4.2, 4.3, and 4.4 to solve
control/automation sequence system circuits.
 RELAY LADDER LOGIC (RLL)

 The primary programming language of PLC is ladder

logic/diagram. Since the PLC was developed to replace relay
logic control systems, it was only natural that the initial
language closely resembles the diagrams used to document
the relay logic. Relay Ladder Logic (RLL) can be converted or
translated to PLC ladder logic.
 EXAMPLE 1

 When input switch LS is ON, the output lamp L turned ON.

 Relay
24V coil 0V
K
LS

L
K

**Relay
contact
Equivalent Relay Ladder Logic Circuit

LS L

END

Equivalent PLC Ladder Logic

 EXAMPLE 2

 When input switches S1 and S2 are ON, the output lamp L

turned ON.

24V

24V
S1 24V S2

24V
K1 K2 K3
L
24V K1 0V
S1

K2
S2

S1 S2 L

K1 K2 K3

END

K3 L Equivalent PLC Ladder Logic

Equivalent Relay Ladder Logic Circuit