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Digital Electronics 2

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0% found this document useful (0 votes)
96 views4 pages

Digital Electronics 2

Uploaded by

tri anatha
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© © All Rights Reserved
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W12-60-1-6 JOMO KENYATTA UNIVERSITY OF AGRICULTURE AND TECHNOLOGY UNIVERSITY EXAMINATION 2021/2022 THIRD YEAR FIRST SEMESTER EXAMINATION FOR THE DEGREE OF BACHELOR OF SCIENCE IN TELECOMMUNICATION & INFORMATION ENGINEERING ETI 2209: DIGITAL ELECTRONICS II DATE: JULY/AUGUST 2022 TIME: 2 HOURS INSTRUCTIONS 1. This paper consists of FIVE questions. 2. Answer QUESTION ONE and ANY OTHER TWO questions. 3. All workings must be clearly shown and diagrams neatly drawn QUESTION ONE (30 MKS) COMPULSORY yr 6-bit R-2R ladder D/A converter has a reference voltage of 9.5V. It meets standard linearity. Find (4 marks) i The Resolution in Percent. The output voltage for the word 011100. b) List and explain four characteristics of digital ICs used to compute their performance. (4 marks) ROM ‘e number of PI ©) The capacity of 2K. x 16 PROM is to be expanded to 16 K x 16. Find the m emory. Implement the chips required and the number of address lines in the expanded memory. Imp! expanded memory (4marks) 3 a combination of 4) The below circuit fig 1d shows a CMOS logic gate implemented using a com! PMOS and NMOS MOSFETS. Fig. Qld 1 Explain the working of the circuit forall possible combinations of the inputs | A&B, choose appropriate value of + VDD for your explanation, (7 marks) Hi Draw a truth table that summarises the operation of this logic gate (1 mark) MOS devices are easily damaged by static charges, making them electrically delicate and hence precautions should be taken when working with these devices. List and explain four of such precautions (4 Marks) £) A microprocessor uses RAM chips of 1024%1 capacity. 1 1 How many chips will be requires connected to provide ea i How many chips will be required to obtain bytes? (3 marks) 2 a) The table below shows the sample value QUESTION TWO (20 MKS) sighal whose voltage range from -2V to 8.24V { Time (ms) jo Toor [0.02 j Sample value (WV) |-1.3 jis [27 Calculate a. Sampling frequency b. The number of quantization levels The value of each step ad. The nearest quantization number and the corres each sample b) Differentiate between static explain its operation. ) Distinguish be MKS) STION THREE, a) converter. b) Draw and explain the operatic elements as well as the load resistor. °°) J how many pacity of 1024 bytes. (3 marks) nf co a memory ofa (2 bits quantization Al and dynamic RAM. Draw tween ROM, PROM, EPROM, and EEPROM. With the help of a neat diagram, explain the workin: address lines will Be pacity of 166 DC for an analog (2 marks) (2 marks) (2 marks) ponding quantization voltage for (6 marks) the circuits of one cell of each and (4 Marks) (4 Marks) of a successive approximation A/D (8 marks) ofa NOR gate implemented using NMOS, label the logic (S marks) Draw and explain the operation of a TTL NAND gate with Totem pole outputs Q2r b U ‘OUR (20 MKS) to digital converters (Smarks) a) Describe the following terms as used with analogue i Discrete levels ii Resolution iii Quantization error ion level vy Aperture time b) Using Programmable Array Logic (PAL) design and implement a BCD to Gray Code Converter. (12 marks) «) List and explain three applications of Read Only Memory (ROM) (3 marks) JUESTION FIVE (24 ribe CMOS inverter and state three advantages of CMOS (6 marks) a) Using a circuit diagram dese b) Explain when and why a tristate device may be required and also the principle of operation of such a device. (6 marks) ¢) State the sampling theorem as applied in Analogue o digital conversion (2 marks) 4) Using a circuit diagram explain the operation of he flash memory (6 marks)

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