COMPUTER SYSTEM ARCHITECTURE

Dr Ganesan P, Professor / ECE

UNIT – II: Structure Of Computers:

Computer types, functional units, basic operational concepts, VonNeumann architecture,bus
structures, software, performance, multiprocessors andMulticomputer, data representation,
fixed and floating point and error detecting codes. Register Transfer and Micro Operations:
Register transfer language, register transfer, bus and memory transfers, arithmetic micro
operations, shift micro operations, arithmetic logic shiftunit.
Digital Computer
The digital computer is a digital system that performs various computational tasks. The word
digital implies that the information in the computer is represented by variables that take a limited
number of discrete values.

Computer Types
The different types of computers are
1. Personal computers: - This is the most common type found in homes, schools, Business
offices etc., It is the most common type of desk top computers with processing and storage units
along with various input and output devices.
2. Note book computers: - These are compact and portable versions of PC
3. Work stations: - workstation, a high-performance computer system that is basically designed
for a single user and has advanced graphics capabilities, large storage capacity, and a powerful
central processing unit. A workstation is more capable than a personal computer (PC) but is less
advanced than a server. These are used in engineering applications of interactive design work.
4. Enterprise systems: - These are used for business data processing in medium to large
corporations that require much more computing power and storage capacity than work stations.
Internet associated with servers have become a dominant worldwide source of all types of
information.
5. Super computers: - A supercomputer is a computer with a high level of performance as
compared to a general-purpose computer. The performance of a supercomputer is commonly
measured in floating-point operations per second instead of million instructions per second.
These are used for large scale numerical calculations required in the applications like weather
forecasting etc.
Basic Computer Model and Functional Units of a Computer
The model of a computer can be described by four basic units in high level abstraction. These
basic units are:
• Central Processor Unit
• Input Unit
• Output Unit
• Memory Unit

Central processor unit consists of two basic blocks:

The program control unit has a set of registers and control circuit to generate control signals.
The execution unit or data processing unit contains a set of registers for storing data and an
Arithmetic and Logic Unit (ALU) for execution of arithmetic and logical operations.

Most of the computer operators are executed in ALU of the processor like addition, subtraction,
division, multiplication, etc. the operands are brought into the ALU from memory and stored in
high speed storage elements called register. The control and the ALU are many times faster than
other devices connected to a computer system. This enables a single processor to control a
number of external devices such as key boards, displays, magnetic and optical disks, sensors and
other mechanical controllers.
Control unit: It effectively is the nerve center that sends signals to other units and senses their
states. The actual timing signals that govern the transfer of data between input unit, processor,
memory and output unit are generated by the control unit.

Input Unit: With the help of input unit data from outside can be supplied to the computer.
Program or data is read into main storage from input device or secondary storage under the
control of CPU input instruction. Example of input devices: Keyboard, Mouse, Hard disk,
Floppy disk, CD-ROM drive etc.

Output Unit: With the help of output unit computer results can be provided to the user or it can
be stored in storage device permanently for future use. Output data from main storage go to
output device under the control of CPU output instructions.
Example of output devices: Printer, Monitor, Plotter, Hard Disk, Floppy Disk etc.

Memory Unit: Memory unit is used to store the data and program. CPU can work with the
information stored in memory unit. This memory unit is termed as primary memory or main
memory module. These are basically semiconductor memories.

Basic Operational Concepts

To perform a given task an appropriate program consisting of a list of instructions is stored in
the memory. Individual instructions are brought from the memory into the processor, which
executes the specified operations. Data to be stored are also stored in the memory.

Example: - Add LOCA, R0

This instruction adds the operand at memory location LOCA, to operand in register R0 & places
the sum into register. This instruction requires the performance of several steps,
1. First the instruction is fetched from the memory into the processor.
2. The operand at LOCA is fetched and added to the contents of R0
3. Finally the resulting sum is stored in the register R0
The preceding add instruction combines a memory access operation with an ALU Operations. In
some other type of computers, these two types of operations are performed by separate
instructions for performance reasons.
Load LOCA, R1
Add R1, R0
Transfers between the memory and the processor are started by sending the address of the
memory location to be accessed to the memory unit and issuing the appropriate control signals.
The data are then transferred to or from the memory.
Von-Neumann Architecture (Model)
• Von-Neumann proposed his computer architecture design in 1945 which was later known
as Von-Neumann Architecture.
 • It consisted of a Control Unit, Arithmetic, and Logical Memory Unit (ALU), Registers
and Inputs/Outputs.
• Von Neumann architecture is based on the stored-program computer concept, where
instruction data and program data are stored in the same memory.This design is still
used in most computers produced today.
• A Von Neumann-based computer:
 Uses a single processor
 Uses one memory for both instructions and data.
 Executes programs following the fetch-decode-execute cycle

Components of Von-Neumann Model:

 Central Processing Unit
 Buses
 Memory Unit

Central Processing Unit

 The part of the Computer that performs the bulk of data processing operations is called
the Central Processing Unit and is referred to as the CPU.
 The Central Processing Unit can also be defined as an electric circuit responsible for
executing the instructions of a computer program.
 The CPU performs a variety of functions dictated by the type of instructions that are
incorporated in the computer.
 The major components of CPU are Arithmetic and Logic Unit (ALU), Control Unit
(CU) and a variety of registers.

Arithmetic and Logic Unit (ALU)

  The Arithmetic and Logic Unit (ALU) performs the required micro-operations for
executing the instructions.
 In simple words, ALU allows arithmetic (add, subtract, etc.) and logic (AND, OR, NOT,
etc.) operations to be carried out.

Control Unit
 The Control Unit of a computer system controls the operations of components like ALU,
memory and input/output devices.
 The Control Unit consists of a program counter that contains the address of the
instructions to be fetched and an instruction register into which instructions are fetched
from memory for execution.

Registers
 Registers refer to high-speed storage areas in the CPU. The data processed by the CPU
are fetched from the registers.

Following is the list of registers that plays a crucial role in data processing.

Buses

 Buses are the means by which information is shared between the registers in a multiple-
register configuration system.
 A bus structure consists of a set of common lines, one for each bit of a register, through
which binary information is transferred one at a time. Control signals determine which
register is selected by the bus during each particular register transfer.
  Von-Neumann Architecture comprised of three major bus systems for data transfer.

Memory Unit
 A memory unit is a collection of storage cells together with associated circuits needed to
transfer information in and out of the storage.
 The memory stores binary information in groups of bits called words.
 The internal structure of a memory unit is specified by the number of words it contains
and the number of bits in each word.

Bus Structure
 The simplest and most common way of interconnecting various parts of the computer.
 To achieve a reasonable speed of operation, a computer must be organized so that all its
units can handle one full word of data at a given time.
 A group of lines that serve as a connecting port for several devices is called a bus. In
addition to the lines that carry the data, the bus must have lines for address and control
purpose. Simplest way to interconnect is to use the single bus as shown below.
 • Since the bus can be used for only one transfer at a time, only two units can actively use
the bus at any given time. Bus control lines are used to arbitrate multiple requests for use
of one bus.
• Single bus structure is
 Low cost
 Very flexible for attaching peripheral devices
• Multiple bus structure certainly increases, the performance but also increases the cost
significantly.

All the interconnected devices are not of same speed & time, leads to a bit of a problem. This is
solved by using cache registers (i.e. buffer registers). These buffers are electronic registers of
small capacity when compared to the main memory but of comparable speed. The instructions
from the processor at once are loaded into these buffers and then the complete transfer of data at
a fast rate will take place.

Software
• Software is a set of programs, which is designed to perform a well-defined function.
A program is a sequence of instructions written to solve a particular problem.
• There are two types of software −
 System Software
 Application Software
System Software
• The system software is a collection of programs designed to operate, control, and
extend the processing capabilities of the computer itself.
• System software is generally prepared by the computer manufacturers.
• These software products comprise of programs written in low-level languages, which
interact with the hardware at a very basic level.
• System software serves as the interface between the hardware and the end users.
• Some examples of system software are Operating System, Compilers, Interpreter,
Assemblers, etc.
Here is a list of some of the most prominent features of a system software −
• Close to the system
• Fast in speed
• Difficult to design
• Difficult to understand
• Less interactive
• Smaller in size
• Difficult to manipulate
• Generally written in low-level language

Application Software

• Application software products are designed to satisfy a particular need of a particular

environment.
• All software applications prepared in the computer lab can come under the category of
Application software.
• Application software may consist of a single program, such as Microsoft's notepad for
writing and editing a simple text.
• It may also consist of a collection of programs, often called a software package,
which work together to accomplish a task, such as a spreadsheet package.
Examples of Application software are the following −
• Payroll Software
• Student Record Software
• Income Tax Software
• Railways Reservation Software
• Microsoft Office Suite Software
• Microsoft Word, Microsoft Excel, Microsoft PowerPoint

Features of application software are as follows −

• Close to the user
• Easy to design
• More interactive
• Slow in speed
• Generally written in high-level language
• Easy to understand
• Easy to manipulate and use
 • Bigger in size and requires large storage space

Performance
 The most important measure of the performance of a computer is how quickly it can
execute programs.
 The speed with which a computer executes program is affected by the design of its
hardware.
 Three factors affect performance:
o Hardware design
o Instruction set
o Compiler
 The total time required to execute the program is elapsed time is a measure of the
performance of the entire computer system. It is affected by the speed of the processor,
the disk and the printer.
 The time needed to execute an instruction is called the processor time. Just as the elapsed
time for the execution of a program depends on all units in a computer system, the
processor time depends on the hardware involved in the execution of individual machine
instructions. This hardware comprises the processor and the memory which are usually
connected by the bus.

Let us examine the flow of program instructions and data between the memory and the
processor. At the start of execution, all program instructions and the required data are stored in
the main memory. As the execution proceeds, instructions are fetched one by one over the bus
into the processor, and a copy is placed in the cache later if the same instruction or data item is
needed a second time, it is read directly from the cache. The processor and relatively small cache
memory can be fabricated on a single IC chip. A program will be executed faster if the
movement of instructions and data between the main memory and the processor is minimized,
which is achieved by using the cache.
For example: Suppose a number of instructions are executed repeatedly over a short period of
time as happens in a program loop. If these instructions are available in the cache, they can be
fetched quickly during the period of repeated use. The same applies to the data that are used
repeatedly.

Processor clock
Processor circuits are controlled by a timing signal called clock. The clock designer the regular
time intervals called clock cycles. To execute a machine instruction the processor divides the
action to be performed into a sequence of basic steps that each step can be completed in one
clock cycle. Processor used in today’s personal computer and work station have a clock rates that
range from a few hundred million to over a billion cycles per second.

Basic Performance Equation

T = (N × S)/R, this is often referred to as the basic performance equation.

T –processor time required to execute a program that has been prepared in high-level language
N –number of actual machine language instructions needed to complete the execution (note:
loop)
S –average number of basic steps needed to execute one machine instruction. Each step
completes in one clock cycle
R –clock rate

Increase clock rate (R) by

 Improving the integrated-circuit (IC) technology to make the circuits faster
 Reducing the amount of processing done in one basic step

Performancemeasurements
 It is very important to be able to access the performance of a computer, computer
designers use performance estimates to evaluate the effectiveness of new features.
 Hence measurement of computer performance using bench mark programs is done to
make comparisons possible, standardized programs must be used. The performance
measure is the time taken by the computer to execute a given bench mark.
 A non-profit organization called SPEC- system performance Evaluation Corporation
selects and publishes bench marks. The program selected range from game playing,
compiler, and data base applications to numerically intensive programs in astrophysics
and quantum chemistry.
 The ‘SPEC’ rating is computed as follows.

 If the SPEC rating = 50, means that the computer under test is 50 times as fast as bench
mark one.
 The overall SPEC rating for the computer is given by
 where ‘n’ = number of programs in suite.

Multiprocessor & Multicomputer

Multiprocessor computer
 Large computers that contain a number of processor units are called multiprocessor
system.
 A multiprocessor system is simply acomputer that has more than one CPU on
itsmotherboard
 Execute a number of different application tasks in parallel
 Execute subtasks of a single large task in parallel
 All processors have access to all of the memory –shared-memory multiprocessor
 Cost –processors, memory units, complex interconnection networks

Multicomputers
 A computer made up of severalcomputers. similar to parallelcomputing
 Each computer only have access to its own memory
 Exchange message via a communication network –message-passing multicomputers.

Data Representation

Binary Number Systems

• The modern computers do not process decimal number; they work with another number
system known as a binary number system which uses only two digits 0 and1.
• The base of binary number system is 2 because it has only two digit 0 and 1.The digital
electronic equipments are works on the binary number system and hence the decimal
number system is converted into binary system.
Characteristics
 Uses two digits, 0 and 1.
 Also called base 2 number system
 Each position in a binary number represents a 0 power of the base (2). Example:
20
 Last position in a binary number represents an x power of the base (2). Example:
2x where x represents the last position - 1.
Example
Binary Number: 101012
Calculating Decimal Equivalent −

Step Binary Number Decimal Number

Step 1 101012 ((1 × 24) + (0 × 23) + (1 × 22) + (0 × 21) + (1 × 20))10

Step 2 101012 (16 + 0 + 4 + 0 + 1)10

Step 3 101012 2110

Note: 101012 is normally written as 10101.

Representations of negative numbers using 1’s and 2’s complement and range
1s complement and 2s complement are way of representing the signed binary numbers.
In general, the binary number can be represented in two ways.
1. Unsigned Binary Numbers
2. Signed Binary Numbers

Unsigned Binary Numbers

Using unsigned binary number representation, only positive binary numbers can be represented.
For n-bit unsigned binary numbers, all n-bits are used to represent the magnitude of the number.
For example, if we represent decimal 12 in 5- bit unsigned number form then (12)10 = (01100)2.
Here all 5 bit are used to represent the magnitude of the number.
In unsigned binary number representation, using n-bits, we can represent the numbers from 0 to
2n – 1. For example, using 4 -bits we can represent the number from 0 to 15 in unsigned binary
number representation.

Signed Binary Numbers

Using signed binary number representation both positive and negative numbers can be
represented.
In signed binary number representation the most significant bit (MSB) of the number is a sign
bit. For positive numbers, the sign bit is 0 and for negative number, the sign bit is 1.
There are three different ways the signed binary numbers can be represented.
1. Signed Magnitude Form
2. 1’s Complement Form
3. 2’s Complement Form

Signed Magnitude Representation

In sign-magnitude representation, the Most Significant bit of the number is a sign bit and the
remaining bit represents the magnitude of the number in a true binary form. For example, if some
signed number is represented in the 8-bit sign-magnitude form then MSB is a sign bit and the
remaining 7 bits represent the magnitude of the number in a true binary form.
Here is the representation of + 34 and -34 in a 8-bit sign-magnitude form.

Since the magnitude of both numbers is the same, the first 7 bits in the representation are the
same for both numbers. For +34, the MSB is 0, and for -34,
34, the MSB or sign bit is 1.
In sign magnitude representations, there are two different representations for 0.

Using n-bits,
bits, the range of numbers that can be represented in Sign Magnitude Representation is
from – (2n-1 – 1) to (2n -1 – 1).

1’s Complement Representation

In 1’s complement representation, the representation of the positive number is same as the
negative number. But the representation of the negative number is different.
For example, if we want to represent -34 in 8-bit 1’s complement form, then first write the
positive number (+34). And invert all 1s in that number by 0s and 0s by 1s in that number. The
corresponding inverted number represents the -3434 in 1’s complement form. It is also called 1s
complement of the number +34.

Here is another example which shows how to represent -60 in 8-bit

bit 1’s complement form.
 bits, the range of numbers that can be represented in 1’s complement form is from – (2n-
Using n-bits,
1
– 1) to (2n -1 – 1).. For example, using 44-bits, it is possible to represent integers numbers from -7
to +7 in a 1’s complement form representation.
Similar to sign-magnitude
magnitude form, there are two different representations of 0 in 1’s complement
form representation.

2’s Complement Representation

In 2’s complement representation also, the representation of the positive number is same as1’s
complement and sign-magnitude
magnitude form.

But the representation of the negative number is different. For example, if we want to represent -
34 in 2’s complement form then
1. Write the number
mber corresponding to +34.
2. Starting from Least Significant Bit (LSB), just copy all the bits until the first 1 is
encountered in the number.
3. After the first ‘1’ is encountered, invert all the 1s in the number with 0s and 0s in the
number with 1s (including the sign bit)
4. The resultant number is 2’s complement representation of the number -34.34.
The same is shown below.
The second way of representing --34 in 2’s complement form is
1. Write the number corresponding to +34.
2. Find 1’s complement of +34
3. Add ‘1’ to the 1’s complement number
4. The resultant is 2’s complement representation of -34
The same is shown below.

bit number N, its 2’s complement is (2n – N). For example, the 2’s complement of +34 in
For n-bit
8-bit form is (28 – 34). In binary, it is 100000000 – 00100010
0010 = 11011110. That is a third way of
finding the 2’s complement.
Here is the representation of -6060 in sign
sign-magnitude
magnitude form, 1’s complement, and 2’s complement
form.
Using n-bits,
bits, the range of number which can be represented in 2’s complement form is from
fr –
n-1 n-1
(2 ) to 2 – 1. For example, using 44-bits,
bits, it is possible to represent numbers from -8 to +7.
Unlike 1’s complement and sign magnitude form, there is a unique way of representing 0 in this
2’s complement form.

Fixed-point
point representation
Binary representation of 41.6875 is 101001.1011
To store this number, we have to store two information,
-- the part before decimal point and
-- the part after decimal point.
This is known as fixed-point
point representation where the position of decimal point is fixed and
number of bits before and after decimal point are also predefined.
If we use 16 bits before decimal point and 8 bits after decimal point, in signed magnitude form,
form
One bit is required for sign information, so the total size of the number is 25 bits
( 1(sign) + 16(before decimal point) + 8(after decimal point) ).

Floating-point
point representation
In this representation, numbers are represented by a mantissa comprisi
comprising
ng the significant digits
and an exponent part of Radix R. The format is:

Numbers are often normalized, such that the decimal point is placed to the right of the first non-
non
zero digit. For example, the decimal number, 5236 is equivalent to
To store this number in floating point representation, we store 5236 in mantissa part and 3 in
exponent part.

IEEE has proposed two standard for representing floating

floating-point number:
● Single precision
● Double precision
Parity Checking of Error Detection
 It is the simplest technique for detecting and correcting errors. The MSB of an 8-bits word is used
as the parity bit and the remaining 7 bits are used as data or message bits. The parity of 8-bits
transmitted word can be either even parity or odd parity.

Even parity -- Even parity means the number of 1's in the given word including the parity bit should be
even (2,4,6,....).
Odd parity -- Odd parity means the number of 1's in the given word including the parity bit should be
odd (1,3,5,....).
Use of Parity Bit
 The parity bit can be set to 0 and 1 depending on the type of the parity required.
• For even parity, this bit is set to 1 or 0 such that the no. of "1 bits" in the entire word is even.
Shown in fig. (a).
• For odd parity, this bit is set to 1 or 0 such that the no. of "1 bits" in the entire word is odd.
Shown in fig. (b).

How Does Error Detection Take Place?

Parity checking at the receiver can detect the presence of an error if the parity of the receiver signal is
different from the expected parity. That means, if it is known that the parity of the transmitted signal is
always going to be "even" and if the received signal has an odd parity, then the receiver can conclude that
the received signal is not correct. If an error is detected, then the receiver will ignore the received byte
and request for retransmission of the same byte to the transmitter.

Register Transfer and Micro-operations

Register Transfer Language

• The symbolic notation used to describe the microoperation transfers among registers
is called a register transfer language.
• The term "register transfer" implies the availability of hardware logic circuits that can
perform a stated microoperation and transfer the result of the operation to the same
or another register.
Computer Registers
• Computer registers are high-speed memory storing units. It is an element of the
computer processor. It can carry any type of information including a bit sequence or
single data.
• A register may hold an instruction, a storage address, or any kind of data (such as a
bit sequence or individual characters). Some instructions specify registers as part of
the instruction. For example, an instruction may specify that the contents of two defined
registers be added together and then placed in a specified register.
• A register must be large enough to hold an instruction - for example, in a 64-
bit computer, a register must be 64 bits in length
• The operations executed on data stored in registers are called micro-operations.
• A microoperation is an elementary operation performed on the information stored in one
or more registers.Theresultoftheoperationmayreplacethepreviousbinary information of a
register or may be transferred to anotherregister.
Example: Shift, count, clear and load
Register Transfer
• Computer registers are designated by capital letters (sometimes followed by
numerals) to denote the function of the register. For example, the register that holds an
address for the memory unit is usually called a memory address register and is designated
by the name MR. Other designations for registers are PC (for program counter), IR (for
instruction register, and R1 (for processor register).
• The most common way to represent a register is by a rectangular box with the name
of the register inside.

• The basic symbols of the register transfer notation are listed in Table. Registers are
denoted by capital letters, and numerals may follow the letters. Parentheses are used to
denote a part of a register by specifying the range of bits or by giving a symbol name to a
portion of a register. The arrow denotes a transfer of information and the direction of
transfer. A comma is used to separate two or more operations that are executed at the
same time.
 • Information transfer from one register to another is designated in symbolic form by
means of a replacement operator.
• The statement R2← R1 denotes a transfer of the content of register R1 into register R2. It
designates a replacement of the content of R2 by the content of R1. By definition, the
content of the source register R 1 does not change after the transfer.
• If we want the transfer to occur only under a predetermined control condition then it can
be shown by an if-then statement. if (P=1) then R2← R1
Where P is the control signal generated by a control section.
• Figure shows the block diagram that depicts the transfer from R1 to R2

Bus and Memory Transfers

• A typical digital computer has many registers, and paths must be provided to transfer
information from one register toanother.
• The number of wires will be excessive if separate lines are used between each
register and all other registers in thesystem.
 • A more efficient scheme for transferring information between registers in a multiple-
register configuration is a Common Bus System.
• A common bus consists of a set of common lines, one for each bit of a register.
• Control signals determine which register is selected by the bus during each particular
register transfer.
• Different ways of constructing a Common Bus System
 Using Multiplexers
 Using Tri-state Buffers
Common bus system is with multiplexers:

 One way of constructing a common bus system is with multiplexers.

 Multiplexer is a combinational circuit that has maximum of 2n data inputs, ‘n’ selection
lines and single output line. One of these data inputs will be connected to the output
based on the values of selection lines.
 The block diagram of 4x1 Multiplexer is shown in the following figure. One of these 4
inputs will be connected to the output based on the combination of inputs present at these
two selection lines. Truth table of 4x1 Multiplexer is shown below.

 The multiplexers select the source register whose binary information is then placed
on the bus. The construction of a bus system for four registers is shown in below figure.
 The bus consists of four 4 x 1 multiplexers each having four data inputs, 0 through 3,
and two selection inputs, S1 and S0.
 For example, output 1 of register A is connected to input 0 of MUX 1 because this
input is labelled A1.
• The diagram shows that the bits in the same significant position in each register are
connected to the data inputs of one multiplexer to form one line of the bus.
• Thus MUX 0 multiplexes the four 0 bits of the registers, MUX 1 multiplexes the four 1
bits of the registers, and similarly for the other two bits.
• The two selection lines S1 and S0 are connected to the selection inputs of all four
multiplexers.
• The selection lines choose the four bits of one register and transfer them into the four-line
common bus.
• When S1S0 = 00, register A is selected. This causes the bus lines to receive the
content of register A since the outputs of this register are connected to the 0 data inputs
of the multiplexers.
• Similarly, register B is selected if S1S0 = 01, and so on.
• Table 4-2 shows the register that is selected by the bus for each of the four possible
binary value of the selection lines.
 • The symbolic statement for a bus transfer may mention the bus or its presence may be
implied in the statement.
Consider, BUS C, R1 BUS
• The content of register C is placed on the bus, and the content of the bus is loaded into
register R1 by activating its load control input. If the bus is known to exist in the system,
it may be convenient just to show the direct transfer.
R1 C
Three-State Bus Buffers:
A bus system can be constructed with three-state gates instead of multiplexers.
A three-state gate is a digital circuit that exhibits three states. Two of the states are
signals equivalent to logic 1 and 0 as in a conventional gate. The third state is a high-
impedance state.
The high-impedance state behaves like an open circuit, which means that the
output is disconnected and does not have logic significance.
Because of this feature, a large number of three-state gate outputs can be connected
with wires to form a common bus line without endangering loading effects.
The graphic symbol of a three-state buffer gate is shown in Fig.
 The control input determines the output state. When the control input is equal to 1, the
output is enabled and the gate behaves like any conventional buffer, with the output equal to
the normal input.
When the control input is 0, the output is disabled and the gate goes to a high-impedance state,
regardless of the value in the normal input.
The construction of a bus system with three-state buffers is shown in Fig. 4

• Decoder is a digital circuit that has ‘n’ input lines and maximum of 2n output lines.
One of these outputs will be active High based on the combination of inputs present,
when the decoder is enabled. Fig shows 2 to 4 decoder and its truth table.

The outputs of four buffers are connected together to form a single bus line.
The control inputs to the buffers determine which of the four normal inputs will
communicate with the bus line.
 No more than one buffer may be in the active state at any given time. The connected buffers
must be controlled so that only one three-state buffer has access to the bus line while all
other buffers are maintained in a high impedance state.
When the enable input of the decoder is 0, all of its four outputs are 0, and the bus line is in a
high-impedance state because all four buffers are disabled.
When the enable input is active, one of the three-state buffers will be active, depending on the
binary value in the select inputs of the decoder.

Memory Transfer
The transfer of information from a memory word to the outside environment is called a
read operation.
The transfer of new information to be stored into the memory is called a write operation.
The particular memory word or data (M) among the many available is selected by the
memory address during the transfer.
It is necessary to specify the address of M when writing memory transfer operations.
This will be done by enclosing the address in square brackets following the letter M.
Consider a memory unit that receives the address from a register, called the address
register (AR).
The data are transferred to another register, called the data register (DR).
The read operation can be stated as follows:
Read: DR<- M [AR]
This causes a transfer of information into DR from the memory word M selected by the
address in AR.
The write operation transfers the content of a data register to a memory word M selected
by the address. Assume that the input data are in register R1 and the address is in AR.
The write operation can be stated as follows:
Write: M [AR] <- R1
Types of Micro-operations:
Register Transfer Micro-operations: Transfer binary information from one register to
another.
Arithmetic Micro-operations: Perform arithmetic operation on numeric data stored in
registers.

Logical Micro-operations: Perform bit manipulation operations on data stored in registers.

Shift Micro-operations: Perform shift operations on data stored in registers.

Register Transfer Micro-operation doesn’t change the information content when the binary
information moves from source register to destination register. Other three types of micro-
operations change the information change the information content during the transfer.
Arithmetic Micro-operations
The basic arithmetic micro-operations are
o Addition
o Subtraction
o Increment
o Decrement
o Shift
The arithmetic Micro-operation defined by the statement below specifies the add micro-
operation.
R3 ← R1 + R2
It states that the contents of R1 are added to contents of R2 and sum is transferred to R3.
To implement this statement hardware requires 3 registers and digital component that
performs addition
Subtraction is most often implemented through complementation and addition.
The subtract operation is specified by the following statement
R3 ← R1 + R2 + 1
R2 is the symbol for the 1’s complement of R2 (instead of minus operator)
Adding 1 to 1’s complement produces 2’s complement
Adding the contents of R1 to the 2's complement of R2 is equivalent to R1-R2.
• List of arithmetic microoperations
Arithmetic Circuit:
• The arithmetic microoperations listed in Table can be implemented in one composite
arithmetic circuit.
• The basic component of an arithmetic circuit is the parallel adder.
• By controlling the data inputs to the adder, it is possible to obtain different types of
arithmetic operations.
• The diagram of a 4-bit arithmetic circuit is shown in Figure. It has four full-adder
circuits that constitute the 4-bit adder and four multiplexers for choosing different
operations. There are two 4-bit inputs A and B and a 4-bit output D.
• The four inputs from A go directly to the X inputs of the binary adder. Each of the
four inputs from B are connected to the data inputs of the multiplexers. The multiplexers
data inputs also receive the complement of B.

•
 • The other two data inputs are connected to logic-0 and logic-1.
• The four multiplexers are controlled by two selection inputs S1 and S0. The input
carry Cin, goes to the carry input of the FA in the least significant position. The other
carries are connected from one stage to the next.

• The output of the binary adder is calculated from the following arithmetic sum:
D = A + Y + Cin
where A is the 4-bit binary number at the X inputs and
Y is the 4-bit binary number at the Y inputs of the binary adder.
Cin is the input carry, which can be equal to 0 or 1.
Note that the symbol + in the equation above denotes an arithmetic plus. By controlling
the value of Y with the two selection inputs S1 and S0 and making Cin equal to 0 or 1, it
is possible to generate the eight arithmetic microoperations listed in Table.

Addition:
When S1S0= 00, the value of B is applied to the Y inputs of the adder.
If Cin, = 0, the output D =A+B.
If Cin = 1, output D=A+B + 1.
Both cases perform the add microoperation with or without adding the input carry.

Subtraction:
When S1S0 = 01, the complement of B is applied to the Y inputs of the adder.
If Cin = 1, then D = A + B + 1. This produces A plus the 2's complement of B, which
is equivalent to a subtraction of A -B.
When Cin = 0 then D = A + B. This is equivalent to a subtract with borrow, that is,
A-B-1.
Increment:
When S1S0 = 10, the inputs from B are neglected, and instead, all 0's are inserted into
the Y inputs. The output becomes D = A + 0 + Cin. This gives D = A when Cin = 0 and
D = A + 1 when Cin = 1.
In the first case we have a direct transfer from input A to output D.
In the second case, the value of A is incremented by 1.
Decrement:
When S1S0= 11, all l's are inserted into the Y inputs of the adder to produce the
decrement operation D = A -1 when Cin = 0.
This is because a number with all 1's is equal to the 2's complement of 1 (the 2's
complement of binary 0001 is 1111). Adding a number A to the 2's complement of 1
produces F = A + 2's complement of 1 = A — 1. When Cin = 1, then D = A -1 + 1=A,
which causes a direct transfer from input A to output D.

Logic Micro-operations:
Logic microoperations specify binary operations for strings of bits stored in registers. These
operations consider each bit of the register separately and treat them as binary variables.
For example, the exclusive-OR microoperation with the contents of two registers RI and R2
is symbolized by the statement

• There are 16 different logic operations that can be performed with two binary variables.
They can be determined from all possible truth tables obtained with two binary variables
as shown in Table. In this table, each of the 16 columns F0 through F15 represents a truth
table of one possible Boolean function for the two variables x and y.
 •

•
Hardware Implementation
• The hardware implementation of logic microoperations requires that logic gates for each
bit or pair of bits in the registers to perform the required logic function. Although there
are 16 logic microoperations, most computers use only four — AND, OR, XOR
(exclusive-OR), and complement from which all others can be derived. Figure shows one
stage of a circuit that generates the four basic logic microoperations. It consists of four
gates and a multiplexer. Each of the four logic operations is generated through a gate that
performs the required logic. The outputs of the gates are applied to the data inputs of the
 multiplexer. The two selection inputs S1 and S0 choose one of the data inputs of the
multiplexer and direct its value to the output.

Shift Microoperations:
Shift microoperations are used for serial transfer of data.
The contents of a register can be shifted to the left or the right.
During a shift-left operation the serial input transfers a bit into the rightmost position.
During a shift-right operation the serial input transfers a bit into the leftmost position.
There are three types of shifts: logical, circular, and arithmetic.
The symbolic notation for the shift microoperations is shown in Table.

.
Logical Shift
A logical shift is one that transfers 0 through the serial input.

Circular Shift
A circular shift (also known as a rotate operation) circulates the bits of the register around the
two ends without loss of information.
This is accomplished by connecting the serial output of the shift register to its serial input.

Arithmetic Shift
An arithmetic shift is a micro-operation that shifts a signed binary number to the left orright.
An arithmetic shift-left multiplies a signed binary number by2.
An arithmetic shift-right divides the number by2.

Hardware Implementation:
A combinational circuit shifter can be constructed with multiplexers as shown in Fig.
The 4-bit shifter has four data inputs, A0 through A3, and four data outputs, H0 through
H3.
There are two serial inputs, one for shift left (IL) and the other for shift right (IR).
When the selection input S=0 the input data are shifted right (down in the diagram).
When S = 1, the input data are shifted left (up in the diagram).
The function table in shows which input goes to each output after the shift.
A shifter with n data inputs and outputs requires n multiplexers.
The two serial inputs can be controlled by another multiplexer to provide the three
possible types of shifts.
Arithmetic Logic Shift Unit (ALU):
Instead of having individual registers performing the microoperations directly, computer
systems employ a number of storage registers connected to a common operational unit called
an arithmetic logic unit, abbreviated ALU.
The ALU is a combinational circuit so that the entire register transfer operation from the
source registers through the ALU and into the destination register can be performed during one
clock pulse period.
The shift microoperations are often performed in a separate unit, but sometimes the shift
unit is made part of the overall ALU.
The arithmetic, logic, and shift circuits introduced in previous sections can be combined
into one ALU with common selection variables. One stage of an arithmetic logic shift unit is
shown in Fig.

Particular microoperation is selected with inputs S1 and S0. A 4 x 1 multiplexer at the

output chooses between an arithmetic output in Di and a logic output in Ei.
The data in the multiplexer are selected with inputs S3 and S2. The other two data inputs
to the multiplexer receive inputs Ai-1 for the shift-right operation and Ai+1 for the shift-left
operation.
The circuit whose one stage is specified in Fig. provides eight arithmetic operation, four
logic operations, and two shift operations.
Each operation is selected with the five variables S3, S2, S1, S0 and Cin.
The input carry Cin is used for selecting an arithmetic operation only.

Table lists the 14 operations of the ALU. The first eight are arithmetic operations and are selected
with S3S2 = 00.
The next four are logic and are selected with S3S2 = 01.
The input carry has no effect during the logic operations and is marked with don't-care x’s.
The last two operations are shift operations and are selected with S3S2= 10 and 11.
The other three selection inputs have no effect on the shift.

Best Wishes

Dr Ganesan P, Professor / ECE

Vidya Jyothi Institute of Technology