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Interrupts and Interrupts Handling

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Interrupts and Interrupts Handling

Uploaded by

Waqar Roy
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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INTERRUPTS

An interrupt is a signal to the processor emitted by hardware or software


indicating an event that needs immediate attention. Whenever an interrupt
occurs, the controller completes the execution of the current instruction and
starts the execution of an Interrupt Service Routine (ISR) or Interrupt
Handler. ISR tells the processor or controller what to do when the interrupt
occurs. The interrupts can be either hardware interrupts or software
interrupts.

Hardware Interrupt
A hardware interrupt is an electronic alerting signal sent to the processor
from an external device, like a disk controller or an external peripheral. For
example, when we press a key on the keyboard or move the mouse, they
trigger hardware interrupts which cause the processor to read the keystroke
or mouse position.
Software Interrupt
A software interrupt is caused either by an exceptional condition or a special
instruction in the instruction set which causes an interrupt when it is
executed by the processor. For example, if the processor's arithmetic logic
unit runs a command to divide a number by zero, to cause a divide-by-zero
exception, thus causing the computer to abandon the calculation or display
an error message. Software interrupt instructions work similar to subroutine
calls.

Polling
The state of continuous monitoring is known as polling. The microcontroller
keeps checking the status of other devices; and while doing so, it does no
other operation and consumes all its processing time for monitoring. This
problem can be addressed by using interrupts.
In the interrupt method, the controller responds only when an interruption
occurs. Thus, the controller is not required to regularly monitor the status
(flags, signals etc.) of interfaced and inbuilt devices.

Interrupts v/s Polling


Here is an analogy that differentiates an interrupt from polling −
Interrupt Polling

An interrupt is like a shopkeeper. If The polling method is like a salesperson. The


one needs a service or product, he goes salesman goes from door to door while
to him and apprises him of his needs. In requesting to buy a product or service.
case of interrupts, when the flags or Similarly, the controller keeps monitoring the
signals are received, they notify the flags or signals one by one for all devices and
controller that they need to be serviced. provides service to whichever component
that needs its service.

Interrupt Service Routine


For every interrupt, there must be an interrupt service routine (ISR),
or interrupt handler. When an interrupt occurs, the microcontroller runs the
interrupt service routine. For every interrupt, there is a fixed location in
memory that holds the address of its interrupt service routine, ISR. The table
of memory locations set aside to hold the addresses of ISRs is called as the
Interrupt Vector Table.

Steps to Execute an Interrupt


When an interrupt gets active, the microcontroller goes through the
following steps −
 The microcontroller closes the currently executing instruction and
saves the address of the next instruction (PC) on the stack.
 It also saves the current status of all the interrupts internally (i.e., not
on the stack).
 It jumps to the memory location of the interrupt vector table that holds
the address of the interrupts service routine.
 The microcontroller gets the address of the ISR from the interrupt
vector table and jumps to it. It starts to execute the interrupt service
subroutine, which is RETI (return from interrupt).

 Upon executing the RETI instruction, the microcontroller returns to the


location where it was interrupted. First, it gets the program counter
(PC) address from the stack by popping the top bytes of the stack into
the PC. Then, it start to execute from that address

Enabling and Disabling an Interrupt


Upon Reset, all the interrupts are disabled even if they are activated. The
interrupts must be enabled using software in order for the microcontroller to
respond to those interrupts.
IE (interrupt enable) register is responsible for enabling and disabling the
interrupt. IE is a bit addressable register.

Interrupt inside Interrupt


What happens if the 8051 is executing an ISR that belongs to an interrupt and
another one gets active? In such cases, a high-priority interrupt can interrupt
a low-priority interrupt. This is known as interrupt inside interrupt. In
8051, a low-priority interrupt can be interrupted by a high-priority interrupt,
but not by any another low-priority interrupt.
BUSES
Bus Width, Bus Speed, and Bandwidth A bus is an electronic path over which
data can travel. There are buses inside the CPU, as well as on the
motherboard. You can picture a bus as a highway with several lanes; each
wire in the bus acts as a separate lane, transmitting one bit at a time. The
number of bits being transmitted at one time is dependent on the bus width
—the number of wires in the bus over which data can travel. Just as a wider
highway allows more cars to travel at one time, a wider bus allows more data
to be transferred at one time. The bus speed is also a very important factor
because the bus width and bus speed together determine the bus’s
bandwidth—that is, the amount of data that can be transferred via the bus in
a given time period; the amount of data actually transferred under real-life
conditions is called throughput.

Memory Bus
One relatively recent change in the bus architecture used with most personal
computers today is connecting the CPU directly to RAM. This change allows
for increased performance; the bus used to connect the CPU to RAM is
typically called the memory bus.
Front side Bus (FSB)
The front side bus (FSB) connects the CPU to the chipset—a set of chips that
connects the various buses together and connects the CPU to the rest of the
bus architecture. Because of the importance of the FSB connection, CPU
manufacturers typically use special high speed technologies; for instance,
Intel uses its Quick Path Interconnect (QPI) technology and AMD uses its
Hyper Transport Technology.
USB Bus
One of the more versatile bus architectures is the Universal Serial Bus (USB).
The USB standard allows 127 different devices to connect to a computer via a
single USB port on the computer’s system unit. At 12 Mbps (millions of bits
per second), the original USB 1.0 standard is slow. However, the newer USB
2.0 standard supports data transfer rates of 480 Mbps and the newest 4.8
Gbps USB 3.0 standard (also called SuperSpeed USB) is about 10 times as fast
as USB 2.0. The convenience and universal support of USB have made it one
of the most widely used standards for connecting peripherals (such as
keyboards, mice, printers, digital cameras, and storage devices) today.
Fire Wire Bus
FireWire (also known as IEEE 1394) is a high-speed bus standard developed
by Apple for connecting devices—particularly multimedia devices like digital
video cameras—to a computer. Like USB, FireWire can connect multiple
external devices via a single port.
Types of Computer Bus
There are a variety of buses found inside the computer.
Data Bus: 
The data bus allows data to travel back and forth between
the microprocessor (CPU) and memory (RAM).
Address Bus: 
The address bus carries information about the location of data in memory.
Control Bus:
The control bus carries the control signals that make sure everything is
flowing smoothly from place to place.

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