UEC 2302 Digital System Design
L T P C
3 0 2 4
PREAMBLE:
The digital system design is the basic foundation to understand the building blocks involved
in designing any digital system. Digital systems find its applications in various areas such as
Communication, Business transactions, Traffic control, Space guidance, Medical treatment,
Weather monitoring, Internet, and many other commercial, industrial, and scientific
enterprises. In this course, the functioning of basic building blocks for digital systems are
studied and designed.
OBJECTIVES:
● To introduce the important basic parameters and theoretical aspects of Boolean algebra
● To design combinational & sequential logic circuits and verify its functionality using
VHDL
UNIT I DIGITAL FUNDAMENTALS 9
Analog versus Digital, Fan-In, Fan-Out, propagation delay, power dissipation, Noise Margin,
Number systems: Binary, Octal, Decimal, Hexadecimal, Number-Base Conversions,
Complements of Number, Binary Codes, Boolean Algebra: Switching algebra, axioms and
theorems, Logic gates: AND, OR, NOT, NAND, NOR, EXOR, EXNOR, Canonical and
Standard Forms.
UNIT II COMBINATIONAL CIRCUIT DESIGN 9
Logic minimization using Karnaugh’s map: 3 variables, 4 variables and 5 variables, Logic
minimization using Quine Mc-Cluskey method, Arithmetic operations: Half adder, full adder,
ripple carry adder, lookahead adder, subtractor, binary multiplier, Selection logic:
Multiplexer, De-multiplexer, decoder, encoder, priority encoder, magnitude comparator.
UNIT III SYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN 9
Latches and Flip flops: SR, JK, T and D, excitation tables and excitation equations, Counters:
Ripple counters, ring counters, modulo counters, Shift registers: SISO, SIPO, PISO, PIPO,
Universal shift registers, Analysis of clocked sequential circuits, Synchronous FSM: Mealy
and Moore Models, Design procedure, Design of sequence detector, counters.
UNIT IV ASYNCHRONOUS SEQUENTIAL CIRCUIT DESIGN 9
Asynchronous FSM: Analysis Procedure, Circuit with Latches, cycles and race conditions,
Design procedure, Reduction of Flow tables, Race free assignment, Hazards, Design
examples.
UNIT V HARDWARE DESCRIPTIVE LANGUAGE: VHDL 9
Introduction to VHDL, Design entry in VHDL: Entity, architecture, coding style (behavioral
and structural), Coding syntax: sequential statement, case, if statement, sensitivity list,
Behavioral design of combinational logic blocks: multibit adder, selection logic, encoder,
decoder, comparator, Behavioral design of sequential logic blocks: counters, shift registers,
finite state machines and sequence detector, Introduction to test bench.
LIST OF EXPERIMENTS 30 Periods
1. Design and implement an arithmetic unit which does atleast two operations using
combinational logic.
2. Design and implement combinational logic circuits that compare two numbers.
3. Design and implement an adder which adds two numbers of any lengths with minimal
components.
4. Design and implement a sequential circuit to detect the given sequence.
5. Design a 3-bit counter which counts in ascending order when mode control input is zero
and in gray code sequence otherwise.
6. Design and implement a finite string recognizer which has one input (X) and one output
(Z). The output is asserted whenever the input sequence …010… has been observed, as long
as the sequence 100 has never been seen.
7. Design and implement a BCD to Excess-3 code converter.
8. Design and implement a traffic light controller.
9. Design and implement a digital combinational lock.
10. Design and implement a vending machine
Note: Students have to do four experiments by choosing one from 1 to 3; two from 4 to 7 and
one from 8 to 10. Students should not repeat the same set of experiments in the coming years
TOTAL PERIODS: 75
OUTCOMES:
At the end of the course, the student should be able to:
CO1: Apply the knowledge of Boolean algebra and simplification of Boolean expressions to
deduce the digital circuits
CO2: Design combinatorial logic circuits including arithmetic logic, selection logic and code
conversion
CO3: Design synchronous and asynchronous sequential logic circuits
CO4: Design combinational and sequential logic circuits using VHDL
CO5: Evaluate relevance and use of engineering fundamentals in digital system design to
advanced industrial/societal applications or products
CO6: Communicate effectively through reflections, reports and presentations
TEXT BOOK:
1. M.Morris Mano and Michael D.Ciletti, Digital Design Pearson, 6th Edition, 2018. (Unit I
to V)
REFERENCE BOOKS:
1. Salivahanan S and Arivazhagan S, Digital Circuits and Design, Oxford University Press,
Fifth Edition, 2017.
2. John F. Wakerly, Digital Design Principles and Practices, Prentice Hall, Fourth Edition,
2012.
3. Charles H. Roth and Larry L. Kenney Fundamentals of Logic Design, Cengage learning,
Seventh Edition, 2018.
4. Donald D. Givone, “Digital Principles and Design”, Tata Mcgraw Hill, 2003.
5. Kenneth L. Short, VHDL for Engineers, Prentice Hall, 2009.
CO – PO AND PSO MAPPING
Course Program Outcomes Program Specific
Outcomes Outcomes
PO1 PO2 PO3 PO4 PO5 PO6 PO7 PO8 PO9 PO1 PO11 PO12 PSO PSO2 PSO3
0 1
CO1 3 3 2 2 3 1
CO2 3 3 3 3 1 3 2
CO3 3 3 3 3 1 3 2
CO4 3 3 3 3 3 3 2
CO5 3 3 3 3 3 2 1 3 2 1 3 2
CO6 3 3 1 2 1
