Answers

● ● 3 Logic gates and logic

circuits
1a OR gate
b NAND gate
c XOR gate [3 marks]
2
A B C X
0 0 0 0
0 0 1 0
0 1 0 0
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 0
1 1 1 1 [4 marks]

3a (A=1 AND B=1) OR (B=NOT 1 OR C=1)

(A AND B) OR (NOT B OR C)
–
(a.b) + (b + c) [3 marks]
b

A
B

C
[4 marks]

4a
●
A B X
●
0 0 0
● - 0 1 1
1 0 1
1 1 1 [2 marks]
●

●
b OR gate [1 mark]
●
c less expensive
faster development time [1 mark]
5a
A B C X
0 0 0 0
0 0 1 1
0 1 0 0
0 1 1 1
1 0 0 0
1 0 1 1
1 1 0 0
1 1 1 1 [4 marks]

b Input C only [1 mark]

4
Cambridge IGCSE Compueter Studies Workbook © David Watson and Helen Williams 2016
 Answers

6a c
A B C X T A P X

0 0 0 1 0 0 0 0

0 0 1 1 0 0 1 1

0 1 0 0 0 1 0 1
0 1 1 0 0 1 1 1
1 0 0 1 1 0 0 0
1 0 1 1 1 0 1 1
1 1 0 0 1 1 0 0
1 1 1 1 1 1 1 1
[4 marks] [4 marks]

9a ((A=1 AND B=1) OR (A=NOT 1 AND C=1))

b AND gate [2 marks] OR (B=NOT 1 AND C=1)
7 a (A=1 AND B=NOT 1) AND (B=1 OR C=1) ((A AND B) OR (NOT A AND C)) OR
(A AND NOT B) AND (B OR C) (NOT B AND C)
¯
(a. b). (b + c) [3 marks] (a.b + –a.c) + (b.c)
¯
b A
B
A
B

X
C

C
[7 marks]
[4 marks]

8a ((T=NOT 1 AND A=1) OR (T=1 AND P=1)) b

OR (A=NOT 1 AND P=1) A B C X

((NOT T AND A) OR (T AND P)) OR (NOT 0 0 0 0

A AND P) 0 0 1 1
– –
(T.A + T.P) + (A.P) [3 marks] 0 1 0 0

b 0 1 1 1
1 0 0 0
T
1 0 1 1
1 1 0 1
A 1 1 1 1
[4 marks]

c
X Y Z Q
X
0 0 0 0
0 0 1 0
P 0 1 0 0
0 1 1 1
1 0 0 0
[7 marks]
1 0 1 0
1 1 0 1
1 1 1 1
[4 marks]

5
Cambridge IGCSE Computer Studies Workbook © David Watson and Helen Williams 2016