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Intel 8086

The 8086 microprocessor chip designed by Intel in the late 1970s established the x86 architecture. It had a 16-bit external data bus and 20-bit address bus, providing up to 1MB of physical memory. While having 16-bit internals, it maintained compatibility with software written for Intel's previous 8-bit processors. The 8086 was successful and launched Intel's most profitable line of processors, with subsequent chips like the 80286 and 80386 being developed under the x86 architecture.

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0% found this document useful (0 votes)
82 views4 pages

Intel 8086

The 8086 microprocessor chip designed by Intel in the late 1970s established the x86 architecture. It had a 16-bit external data bus and 20-bit address bus, providing up to 1MB of physical memory. While having 16-bit internals, it maintained compatibility with software written for Intel's previous 8-bit processors. The 8086 was successful and launched Intel's most profitable line of processors, with subsequent chips like the 80286 and 80386 being developed under the x86 architecture.

Uploaded by

Shishir Yalburgi
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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The 8086[2] (also called iAPX 86)[3] is a 16-bit microprocessor chip designed by

Intel between early 1976 and June 8, 1978, when it was released. The Intel 8088,
released July 1, 1979,[4] is a slightly modified chip with an external 8-bit data
bus (allowing the use of cheaper and fewer supporting ICs),[note 1] and is notable
as the processor used in the original IBM PC design.

The 8086 gave rise to the x86 architecture, which eventually became Intel's most
successful line of processors. On June 5, 2018, Intel released a limited-edition
CPU celebrating the 40th anniversary of the Intel 8086, called the Intel Core i7-
8086K.[4]

Contents
1 History
1.1 Background
1.2 The first x86 design
2 Details
2.1 Buses and operation
2.2 Hardware modes of 8086
2.3 Registers and instruction
2.4 Flags
2.5 Segmentation
2.5.1 Porting older software
2.6 Example code
2.7 Performance
2.8 Floating point
3 Chip versions
3.1 List of Intel 8086
3.2 Derivatives and clones
4 Support chips
5 Microcomputers using the 8086
6 See also
7 Notes
8 References
9 External links
History
Background
In 1972, Intel launched the 8008, the first 8-bit microprocessor.[note 2] It
implemented an instruction set designed by Datapoint Corporation with programmable
CRT terminals in mind, which also proved to be fairly general-purpose. The device
needed several additional ICs to produce a functional computer, in part due to it
being packaged in a small 18-pin "memory package", which ruled out the use of a
separate address bus (Intel was primarily a DRAM manufacturer at the time).

Two years later, Intel launched the 8080,[note 3] employing the new 40-pin DIL
packages originally developed for calculator ICs to enable a separate address bus.
It has an extended instruction set that is source-compatible (not binary
compatible) with the 8008[5] and also includes some 16-bit instructions to make
programming easier. The 8080 device was eventually replaced by the depletion-load-
based 8085 (1977), which sufficed with a single +5 V power supply instead of the
three different operating voltages of earlier chips.[note 4] Other well known 8-bit
microprocessors that emerged during these years are Motorola 6800 (1974), General
Instrument PIC16X (1975), MOS Technology 6502 (1975), Zilog Z80 (1976), and
Motorola 6809 (1978).

The first x86 design

Intel 8086 CPU die image


The 8086 project started in May 1976 and was originally intended as a temporary
substitute for the ambitious and delayed iAPX 432 project. It was an attempt to
draw attention from the less-delayed 16-bit and 32-bit processors of other
manufacturers — Motorola, Zilog, and National Semiconductor.

Whereas the 8086 was a 16-bit microprocessor, it used the same microarchitecture as
Intel's 8-bit microprocessors (8008, 8080, and 8085). This allowed assembly
language programs written in 8-bit to seamlessly migrate.[6] New instructions and
features — such as signed integers, base+offset addressing, and self-repeating
operations — were added. Instructions were added to assist source code compilation
of nested functions in the ALGOL-family of languages, including Pascal and PL/M.
According to principal architect Stephen P. Morse, this was a result of a more
software-centric approach. Other enhancements included microcode instructions for
the multiply and divide assembly language instructions. Designers also anticipated
coprocessors, such as 8087 and 8089, so the bus structure was designed to be
flexible.

The first revision of the instruction set and high level architecture was ready
after about three months,[note 5] and as almost no CAD tools were used, four
engineers and 12 layout people were simultaneously working on the chip.[note 6] The
8086 took a little more than two years from idea to working product, which was
considered rather fast for a complex design in 1976–1978.

The 8086 was sequenced[note 7] using a mixture of random logic[7] and microcode and
was implemented using depletion-load nMOS circuitry with approximately 20,000
active transistors (29,000 counting all ROM and PLA sites). It was soon moved to a
new refined nMOS manufacturing process called HMOS (for High performance MOS) that
Intel originally developed for manufacturing of fast static RAM products.[note 8]
This was followed by HMOS-II, HMOS-III versions, and, eventually, a fully static
CMOS version for battery powered devices, manufactured using Intel's CHMOS
processes.[note 9] The original chip measured 33 mm² and minimum feature size was
3.2 μm.

The architecture was defined by Stephen P. Morse with some help from Bruce Ravenel
(the architect of the 8087) in refining the final revisions. Logic designer Jim
McKevitt and John Bayliss were the lead engineers of the hardware-level development
team[note 10] and Bill Pohlman the manager for the project. The legacy of the 8086
is enduring in the basic instruction set of today's personal computers and servers;
the 8086 also lent its last two digits to later extended versions of the design,
such as the Intel 286 and the Intel 386, all of which eventually became known as
the x86 family. (Another reference is that the PCI Vendor ID for Intel devices is
8086h.)

Details

The 8086 pin assignments in min and max mode


Buses and operation
All internal registers, as well as internal and external data buses, are 16 bits
wide, which firmly established the "16-bit microprocessor" identity of the 8086. A
20-bit external address bus provides a 1 MB physical address space (220 = 1,048,576
x 1 byte). This address space is addressed by means of internal memory
"segmentation". The data bus is multiplexed with the address bus in order to fit
all of the control lines into a standard 40-pin dual in-line package. It provides a
16-bit I/O address bus, supporting 64 KB of separate I/O space. The maximum linear
address space is limited to 64 KB, simply because internal address/index registers
are only 16 bits wide. Programming over 64 KB memory boundaries involves adjusting
the segment registers (see below); this difficulty existed until the 80386
architecture introduced wider (32-bit) registers (the memory management hardware in
the 80286 did not help in this regard, as its registers are still only 16 bits
wide).
Hardware modes of 8086
Some of the control pins, which carry essential signals for all external
operations, have more than one function depending upon whether the device is
operated in min or max mode. The former mode is intended for small single-processor
systems, while the latter is for medium or large systems using more than one
processor (a kind of multiprocessor mode). Maximum mode is required when using an
8087 or 8089 coprocessor. The voltage on pin 33 (MN/MX) determines the mode.
Changing the state of pin 33 changes the function of certain other pins, most of
which have to do with how the CPU handles the (local) bus.[note 11] The mode is
usually hardwired into the circuit and therefore cannot be changed by software. The
workings of these modes are described in terms of timing diagrams in Intel
datasheets and manuals. In minimum mode, all control signals are generated by the
8086 itself.

Registers and instruction


Intel 8086 registers
19 18 17 16 15 14 13 12 11 10 09 08 07 06
05 04 03 02 01 00 (bit position)
Main registers
AH AL AX (primary accumulator)
0 0 0 0 BH BL BX (base, accumulator)
CH CL CX (counter, accumulator)
DH DL DX (accumulator, extended acc)
Index registers
0 0 0 0 SI Source Index
0 0 0 0 DI Destination Index
0 0 0 0 BP Base Pointer
0 0 0 0 SP Stack Pointer
Program counter
0 0 0 0 IP Instruction Pointer
Segment registers
CS 0 0 0 0 Code Segment
DS 0 0 0 0 Data Segment
ES 0 0 0 0 Extra Segment
SS 0 0 0 0 Stack Segment
Status register
- - - - O D I T S Z - A -
P - C Flags
The 8086 has eight more or less general 16-bit registers (including the stack
pointer but excluding the instruction pointer, flag register and segment
registers). Four of them, AX, BX, CX, DX, can also be accessed as twice as many 8-
bit registers (see figure) while the other four, SI, DI, BP, SP, are 16-bit only.

Due to a compact encoding inspired by 8-bit processors, most instructions are one-
address or two-address operations, which means that the result is stored in one of
the operands. At most one of the operands can be in memory, but this memory operand
can also be the destination, while the other operand, the source, can be either
register or immediate. A single memory location can also often be used as both
source and destination which, among other factors, further contributes to a code
density comparable to (and often better than) most eight-bit machines at the time.

The degree of generality of most registers is much greater than in the 8080 or
8085. However, 8086 registers were more specialized than in most contemporary
minicomputers and are also used implicitly by some instructions. While perfectly
sensible for the assembly programmer, this makes register allocation for compilers
more complicated compared to more orthogonal 16-bit and 32-bit processors of the
time such as the PDP-11, VAX, 68000, 32016, etc. On the other hand, being more
regular than the rather minimalistic but ubiquitous 8-bit microprocessors such as
the 6502, 6800, 6809, 8085, MCS-48, 8051, and other contemporary accumulator-based
machines, it is significantly easier to construct an efficient code generator for
the 8086 architecture.

Another factor for this is that the 8086 also introduced some new instructions (not
present in the 8080 and 8085) to better support stack-based high-level programming
languages such as Pascal and PL/M; some of the more useful instructions are push
mem-op, and ret size, supporting the "Pascal calling convention" directly. (Several
others, such as push immed and enter, were added in the subsequent 80186, 80286,
and 80386 processors.)

A 64 KB (one segment) stack growing towards lower addresses is supported in


hardware; 16-bit words are pushed onto the stack, and the top of the stack is
pointed to by SS:SP. There are 256 interrupts, which can be invoked by both
hardware and software. The interrupts can cascade, using the stack to store the
return addresses.

The 8086 has 64 K of 8-bit (or alternatively 32 K of 16-bit word) I/O port space.

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