EEE 410 - Microprocessors I: Fall 05/06 - Lecture Notes # 13 Outline of The Lecture
EEE 410 - Microprocessors I: Fall 05/06 - Lecture Notes # 13 Outline of The Lecture
¾ Until now we have seen unsigned numbers where entire 8-bit or 16-bit operand was used for the
magnitude.
¾ In order to represent positive and negative numbers signed numbers have been introduced. The
representation of signed numbers:
♦ The MSB is set aside for the sign (+ or –) and the rest of the bits are used
for the magnitude.
♦ The sign is represented by 0 for positive (+) numbers and 1 for (–)
negative numbers.
Signed byte operands:
D7 D6 D5 D4 D3 D2 D1 D0
sign
Positive Numbers:
The range of positive numbers that can be represented as a signed byte operand is 0 to +127.
Negative Numbers:
For negative signed numbers D7=1, but the magnitude operand is represented in 2’s complement.
Although the assembler does the conversion, it is important to understand how the conversion works.
To convert to negative number representation (2’s complement) follow the steps:
1. Write the magnitude of the number in 8-bit binary (no sign)
2. Invert each bit
3. Add 1 to it
sign
+ 96 0110 0000
+ 70 0100 0110
+166 1010 0110 According to the CPU this is –90, which is wrong.(OF=1, SF=1, CF=0)
2
As defined before max positive signed number for an 8-bit register is +127. Because +166 is greater
than +127 the problem is arising. The overflow flag is set to inform the programmer that there is erroneous
result from the signed number operation above.
1. There is a carry out from D6 to D7, but no carry out from D7 (CF=0).
2. There is a carry out from D7 (CF=1), but no carry out from D6 to D7.
According to the CPU, the result is +126, which is wrong. The error is indicated by the fact that
OF=1.
-2 1111 1110
+ -5 1111 1011
-7 1111 1001 OF=0, SF=1 (negatieve) , CF=1 : The result is correct since OF=0.
+7 0000 0111
+ +18 0001 0010
+25 0001 1001 OF=0, SF=0 (positive) , CF=0 : The result is correct since OF=0.
OF in 16-bit operations
In 16-bit signed number operations, OF is set to 1 in either of the cases:
1. There is a carry out from D14 to D15, but no carry out from D15 (CF=0).
2. There is a carry out from D15 (CF=1), but no carry out from D14 to D15.
3
Avoiding erroneous results in signed number operations
¾ In order to avoid the problem of signed number operations we can sign extend the operand. Sign
extension copies the sign bit (D7) of the lower byte of a register to the upper byte bits of of the register,
or copies the sign bit of a 16-bit register into another register.
¾ There are two commands used for sign extension.
Lets give an example program which takes into consideration of correction of signed byte addition
operation.
Ex: DATA1 DB +96
DATA2 DB +70
RESULT DW ?
…
MOV AH,0 ;AH=0
MOV AL,DATA1 ;get operand 1
MOV BL,DATA2 ;get operand 2
ADD AL,BL ;add them
JNO OVER ;jump if there is no overflow (OF=0) to OVER
MOV AL,DATA2 ;otherwise get operand 2 to
CBW ;sign extend it
MOV BX,AX
MOV AL,DATA1 ; get back operand 1 to
CBW ;sign extend it
ADD AX,BX ;add them
OVER: MOV RESULT,AX ;save the result