MIDTERM-MODULE 1

LOGIC CIRCUITS
AND DESIGN
(CpE 301)

LOGIC GATES

Wish You Luck

Prepared by: Engr. Jhon Paul A. Gervacio

Reference: (Please refer to the course syllabus for the reference)

 Module : Logic Gates
Module Objectives
Upon successful completion of this module, students should be able to:
 Describe the operation of the AND, OR, and NOT gates.
 Describe the operation of the NAND gate and the NOR gate.
 Construct simple discrete circuits using the following basic gates:
AND, OR, NAND and NOR.
 Use logic gates in simple applications.

Module Contents:

Topic Page No.

2.1 Introduction 3
2.2 Logic States 3
2.3 Universal Logic Gates 13
2.4 Classroom Activity: Logic Gate Symbols 15
2.5 Lab Activity 1 17
2.6 Lab Activity 2 19
2.7 Lab Activity 3 21
2.8 Lab Activity 4 24
2.9 Review Exercises 27

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2.1 INTRODUCTION

Logic gates are the building blocks of any digital circuit which is the building
block of modern digital systems. Therefore it is important to study the logical
operation, application, and troubleshooting of logic gates.
A Logic gate has one or more inputs and only one output; it is defined as an
electronic circuit or device which makes logical decisions. The output logical
decision is a fundamental property of a logic gate and it is a result of certain
input combinations.
The logic gates AND, OR, and NOT are referred to as Basic Logic Gates. The
basic gates combine to form more complex logic circuits called Combinational
Logic Gates. The available combinational logic gates are: NAND, NOR, XOR,
and XNOR.

2.2 Logic States

In digital systems there are only two possible states represented by two
voltage levels. The two states or voltage-levels are:
 HIGH and it represents  Closed switches, Lights ON, or Logic-1
 LOW and it represents  Open switches, Lights OFF, or Logic-0

Suppose the two level voltages are

+5V HIGH
+5V and 0V (Figure 1), then we
designate the two states as follows:
0V LOW
 HIGH  +5V  Logic-1.
Figure 1: Logic two States
 LOW  0V  Logic-0.

Logic State switch Light Voltage Level

Binary-0 Open OFF LOW (0V)

Binary-1 Closed ON HIGH (≥+5V)

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Basic Logic Gates
The three basic logic gates are:
1) AND
2) OR
3) NOT

2.2.1 Series Switching Circuit

Consider the Series Switching

Circuit shown in Figure 2. The
series-connected switches, S1 and
S2 represent the inputs, while the S1 S2
lamp L represents the output. This
Lamp
circuit behaves as follows: VDC
(L)
 The light L turns ON only if the
switches S1 AND S2 are
CLOSED.
Figure 2: Series Switching Circuit
 The light L turns OFF if any one
of the switches is OPEN.

Series Switching Circuit Operation

INPUTS OUTPUT
The logical operation of a series switching circuit S1 S2 L
of Figure 2 is illustrated in Table 1 as follows: Open Open OFF
 When both S1 and S2 are open  L is OFF. Open Closed OFF

 When S1 is open and S2 is closed  L is OFF. Closed Open OFF

 When S1 is closed and S2 is open  L is OFF. Closed Closed ON

 When both S1 and S2 are closed  L is ON. Table 1: The logical

operation of a series
switching circuit

Such a series switching circuit is also known as AND Switching Circuit

because the lamp is ON only if both, S1 AND S2 are CLOSED.

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2.2.2 AND Logic Gate

The digital circuit which can act exactly like an AND switching circuit is
known as AND logic gate. Therefore the AND gate can be defined as a
logic device that has two or more inputs and a single output such that its
output is High only if all of its inputs are High.

Logic Symbol

The logic symbol of an AND logic gate with

two inputs (A & B) and a single output (X) is A
AND X
shown in Figure 3. The AND logic gate can B
have a maximum number of 8-inputs but
only one output. Figure 3: AND logic symbol

Logic Operation and Truth Table

The logical operation of the AND Gate is such that INPUTS OUTPUT
the output is HIGH only when all of the inputs are A B X
HIGH. When any one of the inputs is LOW, the
0 0 0
output is LOW.
0 1 0
We generally express the logical operation of a gate
1 0 0
with a table. The table that lists all input
1 1 1
combinations and the corresponding outputs is
Table 2: Truth table
called the truth table and is illustrated in Table 2.
for 2-input AND gate

Boolean Expression

The two variables expression “X = A AND B” is called the AND Boolean

Expression and is represented in another format as follows:

X = A  B; or simply, X = A B; and they mean the following:

 If A = High AND B = High then X = High. Otherwise X = Low.

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2.2.3 Number of Input Combinations

The number of all possible combinations 0f 1 and 0 values for n-inputs is

given by 2n.
Example-1:
a) For 2-input logic gate  Number of input-combinations = 2n = 22 = 4.
b) For 3-input logic gate  Number of input-combinations = 2n = 23 = 8.

Exercise-1:

Switches Output Input Output

Table 3a illustrates the
S1 S2 S3 Lamp A B C X
truth table of 2-inputs
OFF OFF OFF OFF
series switching circuit. OFF OFF ON OFF
a) Rewrite this truth table OFF ON OFF OFF
in terms of 0's and 1's. OFF ON ON OFF

b) Draw the AND symbol ON OFF OFF OFF

and the switching ON OFF ON OFF

ON ON OFF OFF
circuit which represent
ON ON ON ON
the truth tables of
Table 3a: Truth Table Table 3b: Truth
Table (3a and 3b). for the series switching Table in terms of 0's
circuit and 1's

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c) Write the Boolean expression for a 3-input AND gate.

d) Find the number of input-combinations for a 4-input logic gate.

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2.2.4 Parallel Switching Circuit

Consider the Parallel Switching

Circuit shown in Figure 4. The
Parallel-connected switches, S1 S1
and S2 represent the inputs, while
the lamp L represents the output. S2
Lamp
This circuit behaves as follows: VDC
L
 If either, S1 OR S2 OR both are
CLOSED, then L turns ON.
 The light turns OFF if both the
Figure 4: Parallel Switching Circuit
switches are OPENED.

Parallel Switching Circuit Operation

INPUTS OUTPUT
The logical operation of a Parallel switching
S1 S2 L
circuit of Figure 4 is illustrated in Table 4 and can
Open Open OFF
be explained as follows:
Open Closed ON
 When both S1 and S2 are open  L is OFF.
Closed Open ON
 When S1 is open and S2 is closed  L is ON.
Closed Closed ON
 When S1 is closed and S2 is open  L is ON.
Table 4: The logical
 When both A and B are closed  L is ON. operation of a parallel
switching circuit

Such a parallel switching circuit is also known as OR Switching Circuit

because the lamp is ON if S1 OR S2 OR both are CLOSED.

2.2.5 OR Logic Gate

The digital circuit which can act exactly like an OR switching circuit is known
as OR logic gate. Therefore the OR gate can be defined as a logic device
that has two or more inputs and a single output such that its output is High
if any one of its inputs is High.

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Logic Symbol

The logic symbol of an OR logic gate with

two inputs (A & B) and a single output (X) A
OR X
is shown in Figure 5. The OR logic gate can
B
have a maximum number of 8-inputs but
only one output. Figure 5: OR logic symbol

Logic Operation and Truth Table

INPUTS OUTPUT
The logic operation of the OR Gate is such that the
output is HIGH when any one of the inputs is A B X

HIGH. When all the inputs are LOW, the output is 0 0 0

LOW. 0 1 1

The truth table of an OR gate is shown in Table 5; 1 0 1

it illustrates all the inputs combinations and the 1 1 1
corresponding outputs. Table 5: Truth table
for 2-inputs OR gate

OR Boolean Expression

The two variables expression “X = A OR B” is called the OR Boolean

expression and is represented by a + between the variables as follows:

 X = A + B; and it means the following:

 If either, A OR B = High, OR A = B = High, then X = High.
 If both are Low (A = B = 0), then X = Low.

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Exercise-2:

Switches Output Input Output

Table 6a illustrates the S1 S2 S3 Lamp A B C X
truth table of a 3-input OFF OFF OFF OFF
OFF OFF ON ON
parallel switching circuit.
OFF ON OFF ON
a) Rewrite this truth table
OFF ON ON ON
in terms of 0's and 1's.
ON OFF OFF ON
b) Draw the switching
ON OFF ON ON
circuit that represents ON ON OFF ON
Table 6a. ON ON ON ON
Table 6a: Truth Table Table 6b: Truth
for parallel switching Table in terms of 0's
circuit and 1's

c) Write the Boolean expression for a 3-input OR gate.

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2.2.6 Inverter Switching Circuit

Consider the Inverter Circuit shown

in Figure 6. The Parallel-connected
switch S in series with a resistor R,
R
represents the inputs, while the lamp
L represents the output. This circuit Lamp
VDC S
behaves as follows: L
 If S is CLOSED, all the current will
flow through R and the lamp L will
turn OFF.
Figure 6: Inverter Circuit
 The lamp L turns ON if the switch
S is OPENED.

Inverter Circuit Operation

INPUTS OUTPUT
The logical operation of an inverter circuit of S L
Figure 6 is illustrated in Table 7 as follows: Open ON
 When S is open  L is ON. Closed OFF
 When S is closed  L is OFF. Table 7: The logical
operation of an inverter
circuit

Such an Inverting Switching circuit is also known as NOT Circuit because

the lamp is ON if S is NOT closed.

2.2.7 NOT Logic Gate

The digital circuit which can act exactly like a NOT switching circuit is known
as NOT logic gate. Therefore, the NOT gate can be defined as a logic
device that has one input and a single output such that its output is HIGH if
its input is LOW.

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Logic Symbol

The logic symbol of a NOT logic gate is

A X
shown in Figure 7. The NOT gate, unlike
other gates, has only one input.
Figure 7: NOT logic symbol

Boolean Expression

The Logical expression “X = NOT A” is called the NOT Boolean expression

and is represented by a bar over the variables as follows:
 X = A ; and it means the following:
 where A is the complement or the inverse of A;
 A is read “A bar” or “Not A”;
 so if A = 1, then X = A = 0; and if A = 0, then X = A = 1.

Timing Diagram

The timing diagram which represents Table 7 is in shown in Figure 8. The

output waveform is exactly opposite to the input (inverted) at each point.

1
Input (A) 
0

1
 (X) Output
0

Figure 8: NOT gate operation

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2.3 Universal Logic Gates
2.3.1 The NAND Gate

The NAND gate is a very popular logic gate and is called a universal gate;
because it can be used to construct all basic gates or any combination of
these gates.

Logic Symbol

The term NAND is a short form of NOT-AND and means an AND function
with inverted output. A standard logic symbol for a two-input NAND gate
and its equivalent to an AND gate followed by a NOT gate (inverter), are
shown in Figures 9 and 10, with the inputs labeled A and B and the output
labeled X. The bubble indicate an inverted output.

A A
Q NAND X
AND NOT X  B
B
Figure 10: NAND Logic
Figure 9: NAND Equivalent Logic Circuit
Symbol

Logic Operation and Truth Table

AND NOT
The logical operation of the NAND gate is such
A B Q X= Q
that a LOW output occurs only when all inputs are
0 0 0 1
HIGH. When any of the inputs are LOW, the output
0 1 0 1
will be HIGH. The truth table illustrating the logical
1 0 0 1
operation of a two inputs NAND gate for all input 1 1 1 0
combinations is shown in Table 8. Table 8: Truth table
for NAND gate

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Boolean Expression

The Boolean expression for a two input NAND gate is given by “ X  A  B ”.

By referring to Figure 9 we can explain the NAND Function as follows:
 Q = A  B; but X  Q ;

 then X  A  B , and read as:

 X = NOT (A AND B) or (A B bar)

2.3.2 The NOR Gate

The NOR gate, like the NAND gate, is a very useful logic gate because of its
universal properties which can be used to construct all basic gates or any
combination of these gates.

Logic Symbol

The term NOR is a short form of NOT-OR and is equivalent to an OR

function with inverted output. The standard logic symbol for a two-inputs
NOR gate, and its equivalent to an OR gate followed by a NOT gate
(inverter), are shown in Figures 11 and 12 respectively, with the inputs
labeled A and B and the output labeled X. The bubble indicates an inverted
output.

A Q A
OR NOT X
B  NOR X
B
Figure 11: NOR Equivalent Logic
Figure 12: NOR Logic Symbol
Circuit

14 Module 2: Basic Logic Gates

Logical Operation and Truth Table

OR NOT
The logical operation of the NOR gate is such that
A B Q X= Q
a LOW output occurs when any of its inputs are
0 0 0 1
HIGH. Only when all inputs are LOW, the output
0 1 1 0
will be HIGH. The truth table illustrating the logical
1 0 1 0
operation of a two input NOR gate for all input 1 1 1 0
combinations is shown in Table 9. Table 9: Truth table
for NOR gate

Boolean Expression

The Boolean expression for a two input NOR gate is given by “ X  A  B ”. By

referring to Figure 11, we can explain the NOR Function as follows:
 Q = A + B; but X  Q ;

 then, X  A  B and read as:

 X = NOT (A + B) or [(A + B) bar]

2.4 Classroom Activity: Logic Gate Symbols

The IEEE standard provides two different types of symbols for logic gates.
a) Distinctive-shape symbols: These are the symbols used in this module
since they represent the most commonly used symbols.
b) Rectangular-shape symbols: Where all the gates use the same shape,
along with an internal label to identify the type of gate.

Complete the table below based on what you have learned in this
module. Use the internet to search for rectangular-shape symbols for
the different logic gates.

15 Module 2: Basic Logic Gates

Gate Distinctive-shape Rectangular-shape

AND

OR

NOT

NAND

NOR

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2.5 Lab Activity 1:

OBJECTIVES: EQUIPMENT
To verify the truth table of the AND  Logic Tutor LT345 Mk2
gate.  Power Supply 5V

PROCEDURE
a) Make the connections as shown in the patching diagram of Figure 13.
To clearly understand these connections shown, the circuit is redrawn in
Figure 14.
b) Switch the dip switches A and B (ON/OFF) to form the combination
given in Table 10.

Figure 13: Patching Diagram (AND-gate Circuit)

+5VDC 0VDC

ON OFF LP1
A

X
AND
ON OFF B

Figure 14: Logic Circuit of AND gate

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OBSERVATIONS
For each switching combination of A and B note Switches Output
the corresponding output state of (LP1) in Table A B LP1
10. OFF OFF
OFF ON
ON OFF
ON ON
Table 10: LP1 State
RESULT
Switches Output
 Rewrite your observation in Table 11 using 1’s
A B X (LP1)
and 0’s format.
 Note that (OFF  0) while (ON  1).

Table 11: LP1 State

VERIFICATION
Compare Table 11 with the truth table of AND gate and note your remarks.

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2.6 Lab Activity 2:
OBJECTIVES: EQUIPMENT
To verify the truth table of the OR  Logic Tutor LT345 Mk2
gate.  Power Supply 5V

PROCEDURE
a) Make the connections as shown in the patching diagram of Figure 15.
To clearly understand these connections, the circuit is redrawn in Figure
16.
b) Switch the dip switches A and B (ON/OFF) to form the combination
given in Table 12.

Figure 15: Patching Diagram (OR-gate Circuit)

+5VDC 0VDC

ON OFF A LP1

X
OR
ON OFF B

Figure 16: Logic Circuit of OR gate

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OBSERVATIONS
For each switching combination of A and B note Switches Output
the corresponding output state of (LP1) in Table A B LP1
12. OFF OFF
OFF ON
ON OFF
ON ON
Table 12: LP1 State

RESULT
Switches Output
 Rewrite your observation in Table 13 using 1’s
A B X (LP1)
and 0’s format.
 Note that (OFF  0) while (ON  1).

Table 13: LP1 State

VERIFICATION
Compare Table 13 with the truth table of OR gate and note your remarks.

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2.7 Lab Activity 3:

OBJECTIVES: EQUIPMENT
 Logic Tutor LT345 Mk2
To verify the truth table of NAND gate.
 Power Supply 5V

PROCEDURE
a) Make the connections as shown in the patching diagram of Figure 17.
To clearly understand these connections, the circuit is redrawn in Figure
18.
b) Switch the dip switches A and B (ON/OFF) to form the combination
given in Table 14.

PATCHING DIAGRAM

Figure 17: Patching Diagram (NAND-gate Circuit)

+5VDC 0VDC

ON OFF A LP1

ON OFF B
X
ON OFF NAND
C

ON OFF D

Figure 18: Logic Circuit of NAND gate

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OBSERVATIONS
A B C LP1
For each switching combination of A and
OFF OFF OFF
B note the corresponding output state of OFF OFF ON
(LP1) in Table 14. OFF ON OFF
OFF ON ON
ON OFF OFF
ON OFF ON
ON ON OFF
ON ON ON
OFF OFF OFF
OFF OFF ON
OFF ON OFF
OFF ON ON
ON OFF OFF
ON OFF ON
ON ON OFF
ON ON ON
Table 14: LP1 State

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RESULT

A B C X (LP1)
 Rewrite your observation in Table
15 using 1’s and 0’s format.
 Note that (OFF  0) while (ON  1).

Table 15: LP1 State

VERIFICATION
Compare Table 15 with the truth table of OR gate and note your remarks.

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2.8 Lab Activity 4:

OBJECTIVES: EQUIPMENT
To verify the truth table of the NOR-  Logic Tutor LT345 Mk2
gate.  Power Supply 5V

PROCEDURE
a) Make the connections as shown in the patching diagram of Figure 19.
To clearly understand these connections, the circuit is redrawn in Figure
20.
b) Switch the dip switches A and B (ON/OFF) to form the combination
given in Table 16.

PATCHING DIAGRAM

Figure 19: Patching Diagram (NOR-gate Circuit)

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 +5VDC 0VDC

ON OFF A
LP1

ON OFF B
X
ON OFF C NOR

ON OFF D

Figure 20: Logic Circuit of NOR gate

OBSERVATIONS
A B C LP1
For each switching combination of A and
OFF OFF OFF
B note the corresponding output state of OFF OFF ON
(LP1) in Table 16. OFF ON OFF
OFF ON ON
ON OFF OFF
ON OFF ON
ON ON OFF
ON ON ON
OFF OFF OFF
OFF OFF ON
OFF ON OFF
OFF ON ON
ON OFF OFF
ON OFF ON
ON ON OFF
ON ON ON
Table 16: LP1 State

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RESULT

A B C X (LP1)
 Rewrite your observation in Table
17 using 1’s and 0’s format.
 Note that (OFF  0) while (ON  1).

Table 17: LP1 State

VERIFICATION
Compare Table10 with the truth table of NOR gate and note your remarks.

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2.9 Review Exercises
1) Complete the AND logic table and symbol seen below.

2) Complete the OR logic table and symbol seen below.

3) Complete the INVERTER logic table and symbol seen below.

4) What is the function of an INVERTER GATE?

…………………………………………………………………………………………………………………………

5) Complete the NAND logic table and symbol seen below.

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6) How does the NAND gate differ from an AND gate?
…………………………………………………………………………………………………………………………
…………………………………………………………………………………………………………………………

7) Complete the NOR logic table and symbol seen below.

8) How does the NOR gate differ from an OR gate?

…………………………………………………………………………………………………………………………
…………………………………………………………………………………………………………………………

9) From the Truth Tables of all gates we note that for n inputs, there are 2n
combinations of inputs. Fill in the missing answers below:
if we have 1 input, there are 21 combinations, ____ combinations.
if we have 2 inputs, there are ___ combinations, 4 combinations.
if we have ___ inputs, there are 24 combinations, ____ combinations.

if we have ___ inputs, there are 26 combinations, 64 combinations.

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10) From the following three circuits, draw the truth tables and explain what
happens when you change the state of the input.

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11) A car manufacturing firm wants to introduce a Seat Belt Alarm. When the
engine is on and the Seat belt is not properly in place, an alarm is
sounded. Produce a logic circuit to represent this situation.

12) For the circuit shown below write the input states and the Boolean
expression.

A B

Inputs Inputs

Boolean Boolean
Expression Expression

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13) A student is given a merit certificate if he gets a pass in all subjects or
obtains an overall average of 60 in his annual exam.
a) Draw a logic circuit that would allow a computer to decide which student
should get a merit certificate.
b) Produce the truth table for this circuit.

a) b)

14) Determine the outputs of the following example logic circuits using their
truth table and function.

a) …………………………………………… b) ……………………………………………

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15) Determine the output when the LDR is in darkness, and then when exposed to
light.

…………………………………………………………………………………………………………………………

16) For the 4-input gate shown in the figure below, determine the output.

…………………………………………………………………………………………………………………………

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