MODULE II

CANONICAL AND STANDARD FORMS

Lesson 1 lntroduction to
Canonical and Standard
Forms

Lesson 2 Representation of
Boolean Function using
Logic Circuits

Lesson 3 The Map Method

Lesson 4 NAND and NOR

lmplementation

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MODULE II

CANONICAL AND STANDARD FORMS

INTRODUCTION

Because binary togic is used in atl of today's digital computers and

devices, the cost of the circuits that implement it is an important factor
addressed by designers-be they computer engineers, etectrica[ engineers,
or computer scientists. Finding simpter and cheaper, but equivalent,
realizations of a circuit can reap huge payoffs in reducing the overall cost of
the design. r\rlathematicat methods that simptify circuits rely primarity on
Boolean algebra. Therefore, this chapter provides a basic vocabulary and a
brief foundation in Bootean algebra that witl enable you to optimize simpte
circuits and to understand the purpose of algorithms used by software tools
to optimize complex circuits invotving miltions of logic gates.

(@) oBJEcrvEs

After studying the modute, you shoutd be abte to:

,|
Describe Canonical Forms and Standard Forms.
2 Use the map method to simptify Bootean expressions.
3 Formulate the NAND and NOR representation of a function and
imptement using logic gates

n
,l{
Pr/ DTRECTTONS/ MODULE ORGANTZER

There are four lessons in the modute. Read each tesson carefully then
answer the exercises/activities to find out how much you have benefited
from it. Work on these exercises carefutty and submit your output to your
instructor or to the COE office.

ln case you encounter difficutty, discuss this with your instructor

during the face-to-face meeting. lf not iontact your instructor.

Good tuck and happy reading!!l

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Lesson 1

lntroduction to
EE Canonical and
Standard Forms
A binary variabte may appear either in its normal form (x) or in its
comptement form (x'). Now consider two binary variabtes x and y combined
with an AND operation. Since each variable may appear in either form,
there are four possibte combinations: x'y', x'y, xy', and ry. Each of these
four AND terms is calted a minterm, or a standard product. ln a simitar
manner, n variables can be combined to form 2n minterms. The 2n different
minterms may be determined by a method simitar to the one shown in Tabte
2.3 for three variables. The binary numbers from 0 to 2n - 1 are tisted under
the n variabtes. Each minterm is obtained from an AND term of the n
variables, with each variabte being primed if the corresponding bit of the
binary number is a 0 and unprimed if a 1. A symbo[ for each minterm is also
shown in the tabte and is of the form m;, where the subscript j denotes the
decimal equivalent of the binary number of the minterm designated. ln a
simitar fashion, n variabtes forming an oR term, with each vahabte being
primed or unprimed, provide 2n possibte combinations, catted maxterms, or
standard sums. The eight maxterms for three variabtes, together with their
symbotic designations, are tisted in Tabte 2.3 . Any 2n maxterms for n
variables may be determined simitarty. lt is important to note that (1) each
maxterm is obtained from an OR term of the n variabtes, with each variable
being unprimed if the corresponding bit is a 0 and primed if a 1, and (2)
each maxterm is the comptement of its corresponding minterm and vice
versa.

A Boolean function can be expressed algebraically from a $ven truth

table by forming a minterm for each combination of the va*ables that
produces a 1 in the function and then taking the oR of all those terms.
For example, the fun_ction fl in Tabte 2.4 is determined by expressing the
combinations 001, 100, and 111 as x'v'*, xy'z', and ryz, reipectivety. iince
each one of these minterms resutts in f1 = 1, we have

f1 = x'y'z + xy'z' + ryz = m1 + m4 + m7

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Tablc 2.:l
Mintermt ond Moxterms for fhrce Binary Voriobles
Mlntermt Marterms
x y z lerm Deslgnatlon Term Deslgnatlon
0 0 0 x'y'z' .{+}+: Mo
0 0 x'y'z ,r + .t' * _' M1
0 0 x'yz' ,u2 .{+,1,:'+: M2
0 x'yi ,ll1 "r + r'+ :' M1
I 0 0 ry'z' .t' +.Y + ' M1
I I} ':
tl. , 5 .t' r-.y + i' Ms
t 0 rv.:' "r' + .v' + - M6
I I ,n1 r' + 1,' 1 -' M7

Lbh 2.4
Fun.tions ol fhrce vorioblet
! v r Functloo ft Fundlon f2
t) lt 0 0 0
t) {t I I t)
0 I 0 0 l)
tl I I t) I
0 t) I ()
0 I t) I
I o t) I

I I I I

Simitarty, it may be easity verified that

fz= x'yz + Ky'z + x!z' + yyy = m3 + m5 + m6 + m7

These examples demonstrate an important property of Boolean atgebra: Any

Boolean function can be expressed as a sum oi minterms
lwith ..sum;
meaning the ORing of terms). Now consider the complement of a Bootean
function. lt may be read from the truth table by forming a minterm for each
combination that produces a 0 in the function and thd ORing those terms.
The comptement of /r is read as

fi = x'y'z' + x'W' + x'yz + xy'z + n1z,

lf we take the complement of f ', we obtain the function /r:

ft = (x + y + z)(x + y' + z)(x' + y + z')(x', y, + z)

= lvlo. lvlz. lh. l 5. l,16

Simitarly, it is possibte to read the expression for flfrom the tabte:

f2=(x+y+z)(x+y+z')(x+y, + 2)(y, +y +2)
= l,lohlivlz*lq

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These examples demonstrate a second property of Bootean atgebra:

Any Bootean function can be expressed as a product of maxterms (with
"product" meaning the ANDing of terms). The procedure for obtaining the
product of maxterms directty from the truth tabte is as fottows: Form a
maxterm for each combination of the variabtes that produces a 0 in the
function, and then form the AND of att those maxterms. Boolean functions
expressed as a sum of minterms or product of maxterms are said to be in
canonical form.

Sum of Minterms
Previously, we stated that, for n binary variables, one can obtain 2n
distinct minterms and that any Boolean function can be expressed as a sum
of minterms. The minterms whose sum defines the Boolean function are
those which gve the 1's of the function in a truth table. Since the
function can be either 1 or 0 for each minterm, and since there are 2n
minterms, one can calculate a[[ the functions that can be formed with n
variabtes to be 2b. lt is sometimes convenient to express a Bootean function
in its sum-of-minterms form. lf the function is not in this form, it can be
made so by first expanding the expression into a sum of AND terms. Each
term is then inspected to see if it contains att the variables. lf it misses one
or more variables, it is ANDed with an expression zuch as x + x', where x is
one of the missing variables. The next example clarifies this procedure.

EXAMPLE 2.4
Express the Boolean function F: A - B'C asa sum of minterms Thc functi<m has
ihree variables: .A, 8. and C.The first rerm .A is missiog rwo variahles: therefore.
A:AlB-B')=AB+AB'
This function is still missing one variable. so
A=AB(C-C'l+AB'(C-C,\
L = ABC .t ABC' - AB'C * AB'C'
The sccond Iorm 8'C is missing one rariable: hence.
B'C = B'C(A + A')= AB'C - A'B'C
Combining all terms,we have
F=A'B'C
= ABC - ABC' - AB'C = AB'C' - A'O'C
Bur ,48'C appean ttvice,8lld according to theorem I (r + .g = .r). it is possibl. ro
remove one of those occurrences. Rearranging the minterms in ascending order, we
firally obtain
F = A,B'C + AB.c + AB,c . ABc, . ABC
=mt-m!-m5-m6-m7
a
When a Boolean function is in its zum-of-minterms form, it is
sometimes convenient to express the function in the foltowing brief
notation:
L
F(A, B, c) = Z(1, 4, 5, 6,7)
The summation symbot g stands for the ORing of terms; the numbers
fotlowing it are the indices of the minterms of the function. The letters in

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parentheses foltowing F form a list of the variables in the order taken when
the minterm is converted to an AND term.
An alternative procedure for deriving the minterms of a Boolean
function is to obtain the truth table of the function directly from the
algebraic expression and then read the minterms from the truth table.
Consider the Bootean function given in Example 2.4:

F=A+B'C
The truth tabte shown in Tabte 2.5 can be derived directty from the
atgebraic expression by tisting the eight binary combinations under variabtes
A, B, and C and inserting 1's under F for those combinations for which A = 1
and BC = 01 . From the truth table, we can then read the five minterms of
the function to be 'l , 4, 5, 6, and 7 .

Iable 2.5
TruthTobleforf=A+8C
ABCF
0 {l 0 0
0 () I I
() I 0 {l
0 I I 1)

ll o
l) I
I 0
I I

Product of Maxterms
Each of the 2to functions of n binary variables can be also
L expressed as a product of maxterms. To express a Boolean function as a
product of maxterms, it must first be brought into a form of OR terms. This
may.be done by using the distributive [aw, x + yz = lx + y)(x + z). Then any
missing variable x in each OR term is ORed with xx,. The procedure ii
ctarified in the fottowing example.

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^,lodute
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@
Express lhe Boolcan function F : ry + J'i as B product of maxterms. first. conyert
the function into OR terlm by using the distributivc law:
Itr:.r-r- + ,r,i : (.ry + lr,X.r.y .1-
I)
: (.r -.r,X-r +.r,X,r + :)tr, + :)
: (r' + y)(r + ix.r + z)
The function has threc variables: x.,y. and i. Each OR terrD is missin!! one variat e:
therefore.
.r, + -1, : *, +.y + i3, : (.r, +_v + ix,r, +-v + i,)
x + : = r + i +_y.v' : (x +,v + tx.r +,r.' + ;)
.V + i
: -y + ! + .rr' : (r , ,r' + ix.t' * r + i)
Comhining all the terms and rernoving the.€ which aplxsr more than once. rve finally
obtain
F: (x +y J- :)(.r +.y' + i)(r' +.1, + ix.r' +.v + :')
: MoMtMtMs

A convenient wav to exprcss this function is as follo\rs:

F("r. r. i) : [(0.2..1.5)
Thc product symbol,II. denotes the ANDing of mtxterms: the numbers are the indices
of the maxterms of the function.

{&

Conversion between Canonical Forms

The comptement of a function expressed as the sum of minterms
equals the sum of minterms missing from the originat function. This is
because the original function is expressed by those minterms which make
the function equal to l, whereas its complement is a i for those minterms
for which the function is a 0. As an exampte, consider the function

F(A, B, Cl = | (1, 4, 5, 6, 7)
This function has a complement that can be expressed as

F'(A, B, C) = I (0, 2,3) = nP + m2 + m3

Now, if we take the comptement of F_by DeA{organ,s theorem, we obtain F

in a different form:

F= (mo + mz+ fit)' = mo' . tnz' . mt' = lyloltlzl,lt = II (0, 2, 3)

The tast conversion fottows from the definition of minterms and maxterms
as shown in Tabte 2.3 . From the tabte, it is clear that the fottowing relation
holds:

mj' = lAi

That is, the maxterm with subscript j is a complement of the minterm

with the same subscript j and vice versa.

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The last exampte demonstrates the conversion between a function

expressed in sum-of-minterms form and its equivatent in
product-of-maxterms form. A simitar argument witl show that the conversion
between the product of maxterms and the sum of minterms is similar. We
now state a general conversion procedure: To convert from one canonical
form to another, interchange the symbots _ and _ and list those numbers
missing from the original form. ln order to find the missing terms, one must
reatize that the total number of minterms or maxterms is 2n, where n is the
number of binary variabtes in the function. A Bootean function can be
convertd from an algebraic expression to a product of maxterms by means
of a truth tabte and the canonical conversion procedure. Consider, for
example, the Boolean expression

F = xy + x'z

First, we derive the truth table of the function, as shown in Tabte 2.6 . The
1's under F in the tabte are determined from the combination of the
variables for which rY = 11 or n = 01. The minterms of the function are
L read from the truth table to be 1, 3, 6, and 7. The function expressed as a
sum of minterms is

F(x, y, zl = t(1 ,3, 6,7)

T.H. 2.5
Ttuth Toble fot F = xy + x'z
v z f
0 0 (l 0 Virrlcrm\
{} 0 I I
{) I 0 0
0 I I I
I 0 o 0
I 0 I ()

I I {) I Mar{ternrs
I I I I

Since there is a total of eight minterms or maxterms in a function of three

variabtes, we determine the missing terms to be 0, 2, 4, and 5. The function
expressed as a product of maxterms is

F(x, y, zl = ff(0, 2, 4, 5)

the same ansrver as obtained in Example 2.5.

Standard Forms
The two canonical forms of Bootean atgebra are basic forms that one
obtains from reading a given function from the truth table. These forms are
very setdom the ones with the least number of titerats, because each
minterm or maxterm must contain, by definition, o{l the variabtes, either
comptemented or uncomplemented. Another way to express Boolean
functions is in standard form. ln this configuration, [he terms that form the

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function may contain one, two, or any numhr of literats. There are two
types of standard forms: the sum of products and products of sums. The sum
of products is a Bootean expression containing AND terms, calted product
terms, with one or more literats each. The sum denotes the ORing of these
terms. An exampte of a function expressed as a sum of products is
F1 = y_+ ry + x)tz_

The expression has three product terms, with one, two, and three titerals.
Their sum is, in effect, an OR operation. The logic diagram of a
sum-of-products expression consists of a group of AND gates fotlowed by a
single OR gate. This configuration pattern is shown in Fig. 2.3 (a). Each
product term requires an AND gate, except for a term with a singte literal.
The logic sum is formed with an OR gate whose inputs are the outputs of the
AND gates and the singte literat. lt is assumed that the input variabtes are
directty availabte in their comptements, so inverters are not included in the
diagram. This circuit configuration is referred to as a two-level
implementation.

:,

v
z

{.) Sum of Prcduc15 (b) ftoduct ofSumi

FIGURf, 2,3

A
B
R L C
C
D
D f
E C
L
(r)rr+qD+E) IbI AB + CD + CE
rKUnE 2.4
Three- and two-level lmplementatloh

A product of sums is a Bootean expression containing OR terms, catled surn

terms. Each term may have any number of literats. The product denotes the
ANDing of these terms. An exampte of a function expressed as a product of
sums is

F2=x{y'+z[x'+y+z'\
This expression has three sum terms, with one, two, and three literats. The
product is an AND operation. The use of the words product and sum stems
from the simitarity of the AND operation to the arithmetic product
(muttiplication ) and the similarity of the OR operation to the arithmetic sum
(addition). The gate structure of the product-of'sums expression consists of
a group of OR gates for the sum terms (except for a singte titerat), fottowed

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by an AND gate, as shown in Fig. 2.3 (b). This standard type of expression
results in a two-level structure of gates.
A Bootean function may be expressed in a nonstandard form. For
exampte, the function

Ft=AB+C(D+fl
'is neither in sum-of-products nor in product-of-sums form. The
imptementation of this expression is shown in Fig. 2.4 (a) and requires two
AND gates and two OR gates. There are three levets of gating in this circuit.
It can be changed to a standard form by using the distributive law to remove
the parentheses:

Fz=AB+C(D+Q=AB+CD+CE
The sum-of-products expression is implemented in Fig. 2.4 (b). ln general, a
two-levet implementation is preferred because it produces the least amount
of detay through the gates when the signa[ propagates from the inputs to
the output. However, the number of inputs to a given gate might not be
practica[.

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Lesson 2

REPRESENTATION OF
BOOLEAN FUNCTINO USING
LOGIC GATES

When the binary operators AND and OR are placed between two
variables, x and y, they form two Bootean functions, x # y and x + y,
respectively. Previousty we stated that there are 2h functions for n binary
variabtes. Thus, for two variables, n = 2, and the number of possibte
Bootean functions is 16. Therefore, the AND and OR functions are onty 2 of a
total of 16 possibte functions formed with two binary variables. lt woutd be
instructive to find the other 14 functions and investigate their properties.
The truth tables for the 16 functions formed with two binary variabtes are
listed in Tabte 2.7. Each of the 16 columns, FO lo Fl5, represents a truth
tabte of one possibte function for the two variables, x and y. Note that the
functions are determined from the 16 binary combinations that can be
assigned to F. The 16 functions can be expressed atgebraicatty by means of
Bootean functions, as is shown in the first column of Tabte 2.8. T-he Bootean
expressions listed are simptified to their minimum number of literals.
Atthough each function can be expressed in terms of the Boolean operators
AND, OR, and NOT, there is no reason one cannot assign special operator
symbots for expressing the other functions. Such operatoi symbols are tisted
in the second cotumn of Tabte 2.8 . However, of att the new symbots shown,
onty the exclusive-OR symbot, O, is in common use by digitat designers.
Each of the functions in Table 2.8 is tisted with an accompanying
name and a comment that exptains the function in some way.t The t6
functions listed can be subdivided into three categories:
1 . Two functions that produce a constant O or 1 .
2. Four functions with unary operations: complement and transfer.
3. Ten functions with binary operators that define eight different
operations: AND, OR, NAND, NOR, exctusive-OR, equivalence,
inhibition, and implication.

fabb 2.7
fruth Tabl l6
for the Futrctions ol Two Binory Vodobles
t I FO F' F2 Fz h F5 F6 b Fe h Fro Fn h2 Ftt F I F J
0 0 00 o 0000 0 I I I I I I
0 I {)0 0 0tll I 0 0 0 0 I I
I 0 00 I l00l {) 0 I I 0 0
I I 0l 0 l0l0 0 I 0 I {) I

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T.bh 2.a
Soolean txprcttiont lor thc ,6 Functiont of fwo Vo.ioblet
Operator
Boolean [un(tion3 3ymbol Name Commentt
Frr=O Null Binary constant l)
Fl-rI .r ', AND r and.u
F:- rr-' lnhibition -r. bul nol r
Tram[er
Fa = r'-Y lDhihition y, but not n'
Fs=) Transfcr
r@y Exclusivc-OR ,! oa r'. bul rxrt tlolh
r+.y OR .t or .f
Fs:(r+y)' ,ly NOR Not-OR
F9: r-v + r'I' (.r O y) Equitderrce x equals -r,

I' Complcmenl Nol r

rcy Iolplication lf)', then .t
Corrplcment Nol -r
rly lmplicatioo lf.t, thcn r
FH: (r_v)' y NAND Not-AND
Fr=l 'l ldentity Binary c{rnslani I

Constants for binary functions can be equat to onty 1 or 0. The

complement _function produces the complement of each of the binary
variabtes. A function that is equal to an input variable has been given the
name transfer, because the variabte x or y is transferred through the gate
that forms the function without changing its value. Of the eight binary
operators, two (inhibition and implication) are used by togicians, but are
setdom used in computer togic. The AND and OR operaiors have been
mentioned in conjunction
with Bootean atgebra. The other four functions are used extensivety in the
design of digital systems.
The NOR function is the complement of the OR function, and its name
is an abbreviation of not-OR. Simitarty, NAND is the comptement of AND and
is an
abbreviation of not-AND. The exctusive-OR, abbreviated XOR, is simitar to
OR, but excludes the combination of both x and y being equat to 1; it hotds
only when x and y differ in vatue. (lt is sometimes refeired to as the binary
difference operator. ) Equivatence is a function that is'r when the two binary
variables are equal (i.e., when both are 0 or both are 1). The exctusive_OR
and equivatence functions are the complements of each other. This can be
easily verified by inspecting Tabte 2.7 : The truth tabte for exclusive-oR is
F6 and for equivatence is F9, and these two functions are the comptements
of each other. For this reason, the equivalence function is catted
exctusive-NOR, abbreviated XNOR.

Since Boolean functions are expressed in terms of AND, OR, and NOT
operations, it is easier to implement a Boolean function with these type of
gates. Stitl, the possibility of constructing gates for the other
. logic
operations is of practical interest. Factors to be weighed in considering i'he

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construction of other types of logic gates are (1) the feasibitity and economy
of producing the gate with physicat components, (2) the possibitity of
extending the gate to more than two inputs, (3) the basic properties of the
binary operator, such as commutativity and associativity, and (4) the abitity
of the gate to implement Bootean functions atone or in conjunction with
other gates.
Of the 16 functions defined in Tabte 2.8 , two are equat to a constant
and four are repeated. There are onty 10 functions left to be considered as
candidates for logic gates. Two-inhibition and implication-are not
commutative or associative and thus are impractical to use as standard logic
gates. The other eight-complement, transfer, AND, OR, NAND, NOR,
exctusive-OR, and equivalence-are used as standard gates in digitat design.
The graphic symbols and truth tabtes of the eight gates are shown in
Fig. 2.5 . Each gate has one or two binary input variables, designated by x
and y, and one binary output variable, designated by F. The AND, OR, and
inverter circuits were defined in Fig. 1.6. The inverter circuit inverts the
logic sense of a binary variable, producing the NOT, or comptement,
function. The smatl circle in the output of the graphic symbot of an inverter
(referred to as a bubble) designates the logic complement. The triangte
symbot by itself designates a buffer circuit. A buffer produces the transfer
function, but does not produce a logic operation, since the binary vatue of
the output is equal to the binary vatue of the input. This circuit is used for
power amptification of the signal and is equivatent to two inverters
connected in cascade.
The NAND function is the comptement of the AND function, as
indicated by a graphic symbot that consists of an AND graphic symboL
foltowed by a smatl circte. The NOR function is the comptement of the OR
function and uses an OR graphic symbol fottowed by a smatt circte. NAND
and NOR gates are used extensively as standard togic gates and are in fact
far more popular than the AND and OR gates. This is because NAND and NOR
gates are easily constructed with transistor circuits and because digitat
circuits can be easily imptemented with them.
The exctusive-OR gate has a graphic symbot simitar to that of the OR
gate, except for the additional curved tine on the input side. The
equivatence, or exclusive-NoR, gate is the complement of the exctusive-OR,
as indicated by the small circle on the output side of the graphic symbot.

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 40

(i r.1- 11 I'L.l'
\r-n,r :!r,:.,:

r rl ,
A\ t) I I tt 00
0l
l0
tt :

,
()R r ---l F l' t.t o0
I
ot
l0
ll
,l F
t:It --+-
0l I
rl0
li
'.
tlt

f--\
lD- f F-{r!t
--{ )
I'
I

t t'i ,
\()it I f f -(r+y1
I
I :

rt I
I r..!!.t- (lA
\(1;l :il>-' F -ry -31
rI! !
00
0t
l0
tt
l

I
I r.l:arr \()R
:il F-tr-rt
ir .;,! j'
c0
ot
l0
tl
RCUnt 2.5
Dbntd bq!l{ g.ter

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Lesson 3

THE MAP METHOD

ln previous discussions, we have simptified the Boolean functions using

Bootean postulates and theorems. lt is a time consuming process and we
have to re-write the simplified expressions after each step.
To overcome this difficutty, Karnaugh introduced a method for
simptification of Bootean functions in an easy way. This method is known as
Karnaugh map method or X-map method. lt is a graphical method, which
consists of 2n cetts for 'n' variabtes. The adjacent cetls are differed only in
single bit position.

K-filapsfor 2 to 5 Variables
K-lrlap method is most suitabte for minimizing Boolean functions of 2
variabtes to 5 variables. Now, let us discuss about the K-A,taps for 2 to 5
variabtes one by one.

2 Variabte K-Map
The number of celts in 2 variabte K-map is four, since the number of
variables is two. The fotlowing figure shows 2 variable K-itap.

z
01
Yz
0 tng II11 00 01 11 10

1 Ir2 lll3 or ITl g t'n 1 fi'l : ITl2

. There is onty one possibitity of grouping 4 adjacent min terms.

. The possibte combinations of grouping 2 adjacent min terms are
[(mo, m1), (mz, m:), (mo, mz) and (mr, m:)].
3 Variabte K-Map
The number of cetls in 3 variabte K-map is eight, since the number of
variables is three. The foltowing figure shows 3 virlable K-Arlap.

YZ
Y 00 01 11 10

0 lll q fflt lTl3 lll2

1 ff|4 ITl5 ft}7 lr6

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 42

. There is onty one possibitity of grouping 8 adjacent min terms.

. The possibte combinations of grouping 4 adjacent min terms are
[(mo, rnr, ]Tl:, II'lz), (m+, m5, tl'lz, ]To), (lrlo, mr, Irla, Irls), (Irl1, lrt3, ITt5,
m7), (ITlr, tftz, fft7, m6) and (mz, mo, mo, ma)].
. The possibte combinations of grouping 2 adjacent min terms are
{(mo, mr;, (mrr m3), (ffi:, mz), (rnz, mo), (rn+, ms), (ms, mz), (mz, mo),
(mo, m+), (mo, ma), (mr, ms), (mr, mz) and (mz, mo)].
. lf x=0, then 3 variabte K-map becomes 2 variabte K-map.

4 Variabte K-lrtap
The number of cetls in 4 variabte K-map is sixteen, since the number of
variables is four. The fottowing figure shows 4 variable K-Map.

WX 00 01 11 10

00 lTl6 IT1 1 Ir3 IT)2

01 II14 IYl 5 fIIT IT16

11 III rZ ffit: II'l rS ffir.+

10 n1g lTlg lTltt trlto

. There is onty one possibitity of grouping 16 adjacent min terms.

. Let Rr, Rz, Rr and & represents the min terms of first row, second
row, third row and fourth row respectivety. simitarty, ct, cz, c: and
c+ r€pres€nts the min terms of first cotumn, second cotumn, third
column and fourth cotumn respectivety. The possibte combinations
of grouping 8 adjacent min terms are {(Rr, Rz), (Rz, R:), (R:, p,4), (R4,
Rr), (Cr, Cz), (Cz, Cr), (C:, Cc), (Cr, Cr)].
. If w=0, then 4 variabte K-map becomes 3 variabte K-map.

5 Variabte K-trlap
The number of cetts in 5 variable K-map is thirty-two, since the number of
variabtes is 5. The fottowing figure shows 5 variable K-Map.

EEAC 109 tv'todute ll

 43

V=0 V=1
YZ YZ
WX 00 01 11 10
WX 00 01 11 10

00 fi6 ff|1 m3 lTl2 00 mte mt: ITI r9 tr te

01 m4 Ir5 $17 rT16 01 frzo ITIZt lTl Z: lllZZ

11 ITItZ tll t: nlrs ffitq 11 mze meg ffi3t Irgo

10 lrg l*, filtr lll rO 10 fiz+ mas frzl ffizo

. There is only one possibitity of grouping 32 adjacent min terms.

. There are two possibitities of grouping 16 adjacent min terms. i.e.,
grouping of min terms from mo to mls and firo to tTt:r.
. lf v=0, then 5 variabte K-map becomes 4 variable K-map.
ln the above all K-maps, we used exctusively the min terms notation.
Simitarty, you can use exclusivety the A,lax terms notation.

l inimizotion of Booleon Functions using K-l aps

lf we consider the combination of inputs for which the Boolean function is
'1', then we witl get the Bootean function, which is in standard sum of
products form after simptifying the K-map.
Simitarty, if we consider the combination of inputs for which the Boolean
function is '0', then we witl get the Boolean function, which is in standard
product of sums form after simptifying the K-map.
Follow these rules for simplifying K-maps in order to get standard sum of
products form.
. Setect the respective K-map based on the number of variabtes
present in the Bootean function.
. lf the Boolean function is given as sum of min terms form, then place
the ones at respective min term cetts in the K-map. lf the Bootean
function is given as sum of products form, then ptace the ones in atl
possibte celts of K-map for which the given product terms are vatid.
. Check for the possibilities of grouping maximum number of adjacent
ones. lt shoutd be powers of two. Start from highest power of two
and upto least power of two. Highest power is {uat tb the number
of variabtes considered in K-map and [east power is zero.
. Each grouping will give either a titeral or one product term. lt is
known as prime implicant. The prime impiicant is said to
be essential prime implicant, if atleast singte ,1 , is not covered
with any other groupings but onty that grouping covers.

EEAC 109 llodute

 44

. Note down att the prime impticants and essential prime implicants.
The simptified Bootean function contains atl essential prime
impticants and onty the required prime impticants.
Note 1 - !f outputs are not defined for some combination of inputs, then
those output vatues witt be represented with don't care symbol .x,. That
means, we can consider them as either '0' or '1'.
Note 2 - lf don't care terms atso present, then ptace don't cares ,x, in the
respective cetts of K-map. consider onty the don't cares 'x' that are helpfut
for grouping maximum number of adjacent ones. ln those cases, treat the
dontt care value as '1'.

Exampte
Let us simplify the fottowing Bootean function, fW,X,y,ZW,X,y,Z= W)(,y, +
WY + W'YZ'using K-map.
The given Bootean function is in sum of products form. lt is having 4
variabtes w, X, Y & z. so, we require 4 variable K-map. The 4 variable K-
map with ones corresponding to the given product terms is shown in the
fotlowing figure.

Y7
WX ss sI 11 10
00 1

01 1

11 1 1

10 1 1 1 1

Here, 1s are placed in the fotlowing cetts of K-map.

. The cetts, which are common to the intersection of Row 4 and
columns 1 & 2 are corresponding to the product term, U/X,y,.
. The celts, which are common to the intersection of Rows 3 & 4 and
cotumns 3 & 4 are corresponding to the product term, Wy.
. The cetls, which are common to the intersection of Rows 1 & 2 and
cotumn 4 are corresponding to the product term, W,yZ,.
There are no possibilities of grouping either 16 adjacent ones or g adjacent
ones. There are three possibitities of grouping a adjacent ones. Afteithese
tfree groupings, there is no single one teft as ungrouped. So, we no n""o io
c.heck for grouping of 2 adjacent ones. The 4 variiote K-map with these
three groupings is shown in the fottowing figure.

t
I
L
I
I
t- EEAC l09lvbdute ll
 45

YZ
00 01 11
III
WX 10

00
tr it YZ'

01

11
IIIl
IIEIillEliE 1
1

it WY

wX' '" io' 1 tl

III
fl fl
-t

Here, we got th ree prime impticants WX', WY & YZ'. A[1 these prime
implicants are essential because of fottowing reasons.
. Two ones (m8 & me) of fourth row grouping are not covered by any
other groupings. Onty fourth row grouping covers those two ones.
. Singte one (mrs) of square shape grouping is not covered by any other
groupings. Onty the square shape grouping covers that one.
. Two ones (m2 & m6) of fourth cotumn grouping are not covered by
any other groupings. Only fourth column grouping covers those two
ones.
Therefore, the simplified Boolean function is
f=WX'+Wy+yZ,
Foltow these rules for slmplifylng K-maps in order to get standard product
of sums form.
. Setect the respective K-map based on the number of variables
present in the Bootean function.
. lf theBoolean function is given as product of A,lax terms form, then
place the zeroes at respective Max term ce[s in the K-map. lf the
Bootean function is given as product of sums form, then ptace the
zeroes in att possibte cetts of K-map for which the given sum terms
are valid.
. Check for the possibitities of grouping maximum number of adjacent
zeroes. lt shoutd be powers of two. Start from highest power of two
and upto least power of two. Highest power is equal to the number
of variables considered in K-map and least power is zero.
. Each grouping witt give either a literal or one sum term. lt is known
as prlme implicant. The prime implicant is said to be essential
prime lmplicant, if atteast singte '0' is not covered with any other
groupings but only that grouping covers.
. Note down all the prime implicants and essentia[ prime implicants.
The simptified Eoolean function contains all essential prime
implicants and only the required prime impticants.

EEAC 109 t\,lodute ll

 46

Note- lf don't care terms also present, then ptace don't cares 'x' in the
respective cetts of K-map. Consider onty the don't cares 'x' that are helpful
for grouping maximum number of adjacent zeroes. ln those cases, treat the
don't care vatue as '0'.
Exampte
Let us simplifu the fottowing Bootean
function, f(X,Y,Z)=IIM(0, 1,2,4)f(X,Y,z)=IIM(0,1,2,4) using K-map.
The given Boolean function is in product of Max terms form. lt is having 3
variables X, Y & Z. So, we require 3 variable K-map. The given Max terms
are L,lo, Mr, lrt, & 4 4. The 3 variable K-map with zeroes coresponding to
the given Max terms is shown in the fotlowing figure.

YZ
X 00 01 11 10

0 0 0 0

1 0
III
There are no possibitities of grouping either 8 adjacent zeroes or 4
adjacent zeroes. There are three possibilities of grouping 2 adjacent
zeroes. After these three groupings, there is no single zero left as
ungrouped. The 3 variable K-map with these three grouping is shown in
the fottowing figure.

X+Y
YZ
X 00.01 11 10

0 0 0
'Z+X
L 1 0

Y+Z
Here, we got three prime implicantsX + Y, Y + Z & Z + X. Att these prime
implicants are essential because one zero in each grouping is not covered
by any other groupings except with their individuat groupings.
Therefore, the simplified Boolean function is
f = )(+f{+f .f +lY +Z.Z+XZ+X
ln this way, we can easity simptify the Bootean functions up to 5 variabtes
using K-map method. For more than 5 variabtes, it is difficutt to simptify
the functions using K-AAaps. Because, the number of cells in K-map
gets doubled by inctuding a new variable.

EEAC 109 l odute ll

 47

Lesson 4

NAND AND NOR

IMPLEMENTATION

Two-Level lmplementation using NOR Gate

Two-tevel implementation means that

any path from input to output
levets of
contains maximum two gates hence the name two-tevet for the two
gates.
tmplementing Two-Level logic using NOR gote requires the Bootean

(POS) form'
expression to be in Product of Sum
gate is oR gate and 2"a levet of the
ln Product of sum form, 1* tevet of the
gate is AND gate.
gate' there are basicalty three
To imptement a Boofean function using NOR

step;
Product of Sum Form
for the
First, you need to have a simptified Product of Sum expression
function you need to imptement.
Karnaugh Nhp (K-
Simptified Product of Sum expression can be made using
map) by combining the '0's and then inverting the output function'
Suppose we have simptified POS expression.

F = (A+B)(C+D)
Draw its schematic using AND'OR NOT gates as shown in the figure given
betow.
A

B
F
c
D

Mixed Notation
Next step is to draw the above-mentioned schematic using OR-lnvert and
lnvert-AND gates. OR-lnvert shoutd replace OR gates and invert-AND
replaces AND gates. This schematic is said to be in mixed notation and its
schematic is given below.

EEAC 109 r\,lodu te ll

 48

B
r
c
D

A bubbte means comptement. Two bubbtes atong a line mean doubte

comptementation and they cancet each other. However, a singte bubbte
along a line should be compensated by inserting an lnverter in that tine or if
it is an input line then you can atso feed a complemented input if available.
NOR Gate Conversion
The last step is to
redraw the whote schematic replacing OR-lnvert and
lnvert-AND gate symhl by NOR gate symbol because OR-lnvert and lnvert-
AND are equivalent to NOR gate. The finat schematic is shown in the figure
given betow.

B
F
C

Example of having single bubble in a line:

F = (A+B)(B+C)D
This function is in simptified Product of Sum form. First, we need to draw its
OR-AND schematic.
A

B
l'

C
D

Now we convert the above-given schematic into mixed notation by

converting OR gate into OR-INVERT and AND gate into INVERT-AND.

EEAC 109 Alodute ll

L
 49

lnput line D to the input of AND gate has a single bubble.To compensate this
bubbte we need to either insert an inverter in this line or comptement the
input D if available.
Now replace anery OR-lnvert and lnvert-AND with NOR gate as shown in the
L figure given betow.
A

L B
I
L
C

D
L Multi-level lmplementation using NOR Gate

L Schematic having more than two tevets of gates is known as a mutti-tevet

schematic.
We can imptement multi-levet POS expression using NOR gate. The
L
conversion of multi-level expression into NOR gate has the same method as
two-level implementation.
L The multi-tevet expression can be converted into two-tevel express.ion but
for the sake of realization, we witl implement a multi-levet expression.
L Suppose a 4-teve[ function:
F = (A+B(C+D))(B+D,)
L First, we witl draw its schematic using AND, OR, NOT gates.
C

L B

a
D
L M!ltj"lov.l l{OR Gato lmptem.oratior

Notice the OR-AND pattern like two-level imptementation. lt can be easily

L converted since the bubbte cancels each other.
Now we witl convert it into mixed notation for NOR.
I c
L
D
B-

L B r
D

EEAC 109 itodute ll

L
 50

The two bubbtes atong a singte line cancel each other. However, there is a
singte bubbte at the 2,'d [eve[ gate's input. so we witl comptement the input
L
B to compensate the bubble.
Now redraw the whote schematic replacing OR-lnvert and lnvert-AND lvith
NOR gate symbol as shown in the figure betow.
c
l)
8-

L tr

3-Level lmplementation & Example using NOR Gate

A 3-[evel imptementation using NOR gate's Exampte is given below;
P = (AB'+CD')(A'+B)
First, we witt draw its schematic using AND,OR,NOT gates as given in the
figure betow.

C
t'
b

I
B

3.LDvel NOR Gato lmplsmonlaiion

Now we wi[[ convert it into mixed notation for NOR.

L T
B

L d
r
D

I
B

The singte bubbtes at the input tine of att first tevet gates need an inverter
or the inputs to be complimented. The two bubb]es atong the same line
cance[ each other.
Now that att the bubbtes have been accounted for, we witt redraw this
schematic by reptacing OR-lnvert and lnvert-AND with NOR gates as shown in
the figure betow.

EEAC 109 l,todute ll

 51

I
B

c
F
D

r
o

lntroduction to NAND Gate & lts lmplementation

NAND Gate is a universal logic gate which means any Bootean logic can be
implemented using NAND gate including individuat logic gates. ln other
words, any kind of Boolean function can be imptemented using onty NAND
gates.
NAND gate is commerciatty used because it atlows the access to wired logic
which is a togic function formed by connecting the outputs of NAND gates.
Wired logic does not consist of a physical gate but the wires behave as a
logic function. The other reason for commercia[ usage of NAND gate is that
it can be easily fabricated and has a low fabrication cost. lt atso shrinks the
schematic by decreasing the number of gates, which resutts in sma[[ size
and as matl detay, fast speed and Low power consumption.
Aswe know a typical Bootean function imptementation consists of AND, OR
and NOT gates. To imptement a whote Bootean function using NAND gate
first, we need to convert these gates into NAND gate.

NOT GATE
NOT gate ( lnverter ) comptements its input into the output. A singte input
NAND gate also complements it input into output. Singte input NAND gate
means that the inputs of z-input NAND gates are combined together into a
single input line as shown in the figure given below.

AND GATE
NAND gate is negative ANDgate. ln fact, NAND and AND are inverse to each
other. To achieve AND gate operation need two NAND gates. The second

EEAC 109 l,lodute ll

 52

NAND gate witl be used as an lnverter to comptement (lnvert) the output of

first NAND gate into AND gate.
A
{-B
B

OR GATE
OR gate operation needs three NAND gates. Two NAND gates are used as
inverter at the input of the 3'd NAND gate. The two NAND gates invert the
input and then the inverted input is fed to the 3" NAND gate, which resutts
in OR function as shown in figure betow;
(A'.B') = A+B DE AAorgan's law

{+B

To convert a Bootean function from NOT, AND, OR gates to NAND gates, we

need to convert the schematic into NAND equivatent schematic. NAND
equivatent schematic contains NAND equivatent gates. These equivalent
gates need alternative symbols to represent; these atternative gates are
discussed below;

AND-INVERT
AND-INVERT means INVERTER (NOT gate) connected to the output of AND
gate. As we have discussed before that inverting the output of an AND gate
makes it a NAND gate. AND-INVERT symbol represent NAND gate and it is
given betow;

B tEETr
c
L AND-INVERT symbol consists of AND gate foltowed by smatt bubbte for
complementing the output.
INVERT-OR
INVERT-OR means lnverter (NOT gate) connectd to the input of OR gate.
According to DE A/lorgan's [aw, lnverting the inputs to the OR gate makes it a
NAND gate. So INVERT-OR symbol represents NAND gate and it is given in the
figure betow.

EEAC 109 l,todute ll

 53

A
B A+B+C
C IIET)
INVERT-OR symbol consists of OR gate with sma[[ circles (bubble) at the
input for inversion.
These both symbots are used for converting a schematic into NAND gates.
When both of these symbots are used in a schematic the circuit is known to
be in mixed notation.

Two-Level lmplementation uslng NAND Gate

Two-levet imptementation means that any path from input to output

contains maximum two gates hence the name two-teve[ for the two levets of
gates.
lmplementing a two-ls/el schematic with NAND gates require the expression
to be in Sum of Product (SOP) form. ln Sum of Product form, the 1" level of
the gate is AND gate and the 2d [eve[ of the gate is OR gate. lt can be easity
converted into NAND gates. To convert any function into two-telel NAND
schematic there are 3 steps;
Sum of Product Form
First, you need to have simplified Sum of Product (SOP) form for the
Boolean function. Karnaugh map (K-map) or Boolean atgebraic theorems can
be used to get a Simptified SOP expression.
Suppose an SOP function F = A B + C D
This SOP function is in Simptified SOP form and its AND-OR schematic is
given betow.

D
F
c
D

rwo-L€vcrrmpremenration

Mixed Notation
2' step is to convert the AND-OR schematic into mixed notation. ln mixed
notation for NAND gate, AND gate is converted into AND-invert and OR gate
is converted into INVERT-OR. Mixed notation design for the above function is
given betow.

EEAC 1O9 /Uodule ll

 54

B
r
C

Mlred Notatlo. tor NANO G.te

Notice the bubbte in a single [ine. A single bubbte means a complement

(inversion). Two bubbtes on the same line mean doubte complementation
which cancels each other. lf there was a single bubbte on a line then we
have to insert an inverter in that tine. We witt discuss that in another
exampte.

NAND Gate Conversion & Example

The third step is to convert the AND-INVERT and INVERT-OR qymbols into its
equivalent NAND gate symbot. NAND gate schematic of above function is
given betow.

B
r
c

Example
Supposea function F =A B + B C + D to beimplemented using NAND gates
This function is in simplified Sum of Product form. First, we need to draw its
AND-OR schematic.

c
D

Now we convert the above-given schematic into mixed notation by

converting AND gate into AND-|NVERT and OR gate into TNVERT-OR.

EEAC 109

L
 55

Notice the single input D line to the OR gate. There is one bubble on this
line. To compensate this bubbte we need to either insert an inverter in this
line or complement the input D if avaitabte. Then convert AND-INVERT and
INVERT-OR symbol into I'IAND symbot as shown in the figure given

o
below;
The inverter used here is atso a single input NAND gate.

MULTI.LEVEL lmplementation using NAND Gate

Schematic having more than two levels of gates is known as a mutti-]evet

schematic.
We can imptement mutti-level SOP expression using NAND gate. The
conversion of multi-level expression into NAND gate has the same method as
two-tevet imptementation.
The mutti-level expression can be converted into two-level expression but
for the sake of realization, we witl implement a mutti-tevel expression.
Suppose a multi-[s/e[ function be;
F=A(B+CD)+BD'
This is a four-level function
First, we witl draw its AND-OR schematic

Notice the AND-oR pattern. so

it can be easity converted into NAND gates.
Now we witl convert this into mixed notation i.e. AND gate witt be
converted into AND-INVERT and oR wi[[ be converted into INVERT-oR as
shown in the figure given betow.

EEAC 109 i,todute ll

 56

Remember doubte bubbtes along a single line cancel each other, and a
singte bubble along a line should be compensated by inserting an inverter in
that [ine.
Notice the 3. line of input B, there is a single bubbte. To compensate this
bubbte, either an inverter should be added or the input B should be
comp[imented.
Then redraw the whote schematic using atl NAND gates by reptacing AND-
INVERT and INVERT-OR with NAND gates as shown in the figure betow.
c
D
I
t

f,

MODULE SUMMARY

The product term or also calted minterm is a singte variabte or the

logicat product of several variables. The variabte may or may not be
complemented.
a The sumterm or also catted maxterm is a singte variabte or sum of
several variabtes. The variabtes may or may not be complemented.
The sum of product (SOP) expression is a product term or several
product terms Iogicalty added together.
The product of sum (POS) expression is the sumterm or several
sumterms togicatty muttiptied together.
a A truth tabte describes logic function by tisting alt possibte
combinations of input values and indicating for each combination the
output vatue.
The number of input combinations in the truth table is 2n where n is
the number of inputs.

EEAC 109 /i,todute ll

 57

Congratutations! You have just studied l'lodute ll. now you are ready
to evatuate how much you have benefited from your reading by answering
the summative test. Good Luck! !!

,6 SUMMATIVE TEST

1. Draw the logic diagrams of the foltowing Bootean functions:

a.ry+xY'
b. (x + y)(x + y')
c. xlz + x'y + xyz'
d. (A + B)'(A' + B')'
e. (a + b + c')(a'b' + c)
f. a'bc + abc'+ abc + a'bC'
2. List the truth table of the function: F = xy + xy' * y'z
3. Draw the togic diagrams to implement the fotlowing Bootean
expressions:
a. y=[(u+x'Xy'+z)]
b. y=(u Oy)'*x
c.Y=u(x@z)+y'

EEAC i,lodute ll