Scribd
Upload
65 views6 pages

21-Cp - 64 (Lab No 5)

1. The document is a lab report for a computer engineering course submitted by student Aafaaq Amir. 2. The lab experiment aimed to simplify Boolean functions using Karnaugh maps and implement the circuits using breadboards and simulation. 3. Two tasks were completed which involved simplifying Boolean expressions using K-maps and algebra to minimize the number of variables and verify the solutions through truth tables and simulation.

Uploaded by

Aafaaq Amir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
65 views6 pages

21-Cp - 64 (Lab No 5)

1. The document is a lab report for a computer engineering course submitted by student Aafaaq Amir. 2. The lab experiment aimed to simplify Boolean functions using Karnaugh maps and implement the circuits using breadboards and simulation. 3. Two tasks were completed which involved simplifying Boolean expressions using K-maps and algebra to minimize the number of variables and verify the solutions through truth tables and simulation.

Uploaded by

Aafaaq Amir
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
You are on page 1/ 6

UNIVERSITY OF ENGINEERING AND

TECHNOLOGY, TAXILA

DLD Lab Report


Lab no 5
Name: Aafaaq Amir

Reg No.: 21-CP-64

Section: omega

Department: Computer Engineering

Due Date: 28th May 28, 2022


Experiment # 05
Simplification of Boolean Function using K-Map
Objective:
To study the simplification of Boolean expression using K-Map and implementation on the breadboard.

Apparatus:
➢ Breadboard

➢ Heath-kit board

➢ Connecting wires

➢ Multisim 14.0 for simulation

➢ IC 7408, IC 7432, IC 7406, IC 7402×1

Procedure:
1. Check the components for their working.

2. Insert the appropriate IC into the IC base.

3. Make connections as shown in the circuit diagram.


4. Provide the input data via the input switches and observe the output-on-output LEDs.

5. Verify the Truth Tables of each logic gate

LAB TASKS:
TASK NO.01:

SOLUTION:
= ABC’(D+D’) +ABC(D+D’)+AB’C(D+D’)+AB’C’D
= ABC’+ABC+AB’C+AB’C’D
= AB(C’+C) +AB’C+AB’C’D
= AB+AB’(C+C’D)
= AB+AB’(C+D)
= AB+AB’C+AB’D
= A(B+B’C) +AB’D
= A(B+C)+AB’D
= AC+A(B+B’D)
= AC+A(B+D)
= AB+AC+AD
A B C D output
0 0 0 0 0
0 0 0 1 0
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 0
1 0 0 1 1
1 0 1 0 1
1 0 1 1 1
1 1 0 0 1
1 1 0 1 1
1 1 1 0 1
1 1 1 1 1

K-MAP:
Simulations:

TASK NO 2:

SOLUTION
= XZ’+Y+Z+XY
= (XZ’+Z) +Y+XY
= X+Z+(1+X) Y
= X+Y+Z

A B C OUTPUTS
0 0 0 0
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
1 0 1 1
1 1 0 1
1 1 1 1

Simulations:
Results:
The result is as same as the result of long expression but using the K-Map and algebra method we can
reduce the expression with the same outputs.
Conclusion:
After this experiment we can make a logic design and we can reduce it using different techniques and
reduce the cast of ICs.

You might also like