An5385 Open Load Detection With Stspin220 Stepper Driver Stmicroelectronics
An5385 Open Load Detection With Stspin220 Stepper Driver Stmicroelectronics
Application note
Introduction
The STSPIN220 is a stepper motor driver designed for battery powered applications. The device has an integrated power stage
with a complete set of protection features including overcurrent, overtemperature and short-circuit protection.
Some applications can be required to detect whether one or both phases of the motor are disconnected from the driver.
This document describes how to implement an external circuitry, in order to detect the open load condition.
The STSPIN220 power stage is composed of two full-bridges, one for each phase of the stepper motor. Each full-
bridge is driven by the internal logic in order to implement an independent PWM current control. When the current
in the motor phase reaches the target level, a decay sequence is performed (slow decay and then fast decay).
During normal operation, with a load connected, the output pins switch according to the PWM sequence: TON,
slow decay and fast decay (see Figure 1). In an open load condition instead, one high-side MOSFET and the
opposite low-side MOSFET are steady turned on: the absence of the load avoids the current flow, so the PWM
controller does not switch (Figure 2).
OUTx1
Vs
current
direction
Vs
OUTx1
expected Vs
current
direction
Vs
Figure 1 and Figure 2 show just one full-bridge: for this reason the out pins are generically indicated as OUTx1
and OUTx2, where x can refer to phase A or phase B. The figures depict the voltage for a given direction of the
current. Changing the direction of the current results in a swap between voltage on OUTx1 and OUTx2.
STSPIN220
OUTx1 STEPPER
MOTOR
Rp
Phase A
Phase B
Vf
To MCU
(ADC)
Rf Cf
Rp
OUTx2
The partition introduced by the resistors net, makes the signal suitable for a microcontroller, which in many cases
works at lower voltages than the STSPIN220 voltage supply. The capacitor Cf implements a low-pass filter, so the
signal Vf is proportional to the duty cycle of the sum of the PWM on the outputs. When the signal Vf reaches the
voltage corresponding to the 100% duty cycle, it means that the open load condition has occurred. Sampling the
Vf signal (for example with an ADC line of the microcontroller) it is possible to detect when the open load condition
occurs.
The capacitor Cf is mandatory, otherwise the open load detection is continuously triggered at each PWM cycle.
The circuit in Figure 3 represents the filter for one phase of the stepper motor. The same circuit must be replicated
on the other phase; as a matter of fact, the open load condition can occur on phase A, phase B or both, and must
be detected in all these cases.
Equation 3
(3)
RPRfCf Lm
τf < τm Rp + 2Rf
>R
m
where Lm is the phase inductance and Rm is the phase resistance of the stepper motor.
Anyway, the best way to optimize the trade-off between intervention time of the detector tDET and Vf signal filtering
is doing some specific bench test on the application.
Last parameter to be set is the threshold which triggers the detector. During normal operation the voltage Vf will
follow the envelope of the PWM duty cycle: it reaches the maximum value Vf,PWM_max in correspondence with the
maximum duty cycle. During open load condition instead, the voltage Vf increases up to its maximum value
Vf,open stated in Eq. (1).
The detection threshold Vf,th must be chosen in between Vf,PWM_max and Vf,open; refer to Figure 4 in Section 2.1
for further explanations related to signals and waveforms involved.
As described in the previous section, the implementation of the open load detector is composed of two identical
circuits, one for each phase, with a total components’ count of 6 resistors and 2 capacitors; moreover, 2 ADC
channels are required to detect the voltage threshold Vf,th, which triggers the open load condition.
According to this data, it is possible to select Rp = Rf = 12kΩ: the Vf,open is 1.67V as stated in Eq. (1).
Assuming a maximum intervention time of about 1.8ms, Eq. (2) provides the value of Cf, that is 150nF, besides
respecting what Eq. (3) states.
Testing this solution at bench results in the waveform reported in Figure 4. The driver works in the 32
microstepping mode: during normal operation, the current is a sinewave and the filtered voltage Vf has a rectified
sinewave envelope, with a maximum value Vf,PWM_max. In this example only phase A is represented and it is
disconnected “on the fly” in order to analyze the dynamic behavior of the filter. At load disconnection, the phase
current falls to zero, meanwhile the Vf voltage increases at the expected value of 1.67V. Since the measured
value Vf,PWM_max during normal operation is around 1.4V, the threshold Vf,th can be set at 1.55V.
Voltage level in
Load is
open-load
disconnected
here
condition
Voltage Vf Vf,open
Vf,PWM_max
Voltage level in
normal mode
Phase A Current
(microstepping)
When an open load is detected, the EN/FAULT pin goes low and the power stage is disabled for a time given by
RENCEN time constant. Then, the open load filter discharges and consequently the EN/FAULT pin is released. At
the end of the disable time, the power stage turns on and the open load condition is triggered again. Therefore,
the EN/FAULT pin toggles continuously as long as the load is disconnected. The microcontroller firmware should
manage the failure condition with a dedicated interrupt routine when the FAULT signal goes low.
The component sizing of this circuit should follow the rules already described previously: referring to the example
explained in Section 2.1 , we have the same values for Rp and Rf (both 12kΩ) and Cf (150nF). Since the
selected threshold is Vf,th around 1.55V, we can select R1 = 68 kΩ and R2 = 30 kΩ.
STSPIN220 VS VS VS
Dual open-drain
OUTA1 R1 comparator
(e.g. LM193)
Rp
Rp Rf Cf
Phase A
OUTA2
STEPPER
MOTOR
OUTB1 Phase B
Rp
Rp Rf Cf R2
OUTB2
VMCU
REN
EN/FAULT
CEN
To microcontroller
GND EN/FAULT management
Revision history
Contents
1 STSPIN220 basic operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1 Open load detector circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.2 Filter limitations and remarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Filter sizing and configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
List of tables
Table 1. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
List of figures
Figure 1. Output voltages in a normal operating condition (load connected) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Figure 2. Output voltages in an open load condition (load unconnected) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Figure 3. Basic open load detector filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Figure 4. Waveform acquisition for a dynamic open load condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 5. Open load circuit using comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6