ESS 102 Digital Design
ESS 102 Digital Design
X iMTech X CSE
M.Tech X ECE
M.Sc. Digital Society
Course Category Select one from the following:
(Place X appropriately)
Basic Sciences
X CSE Core
X ECE Core
CSE Branch Elective
ECE Branch Elective
Engineering Science and Skills
HSS/M
General
Course Pre-Requisites (Where applicable, state exact course code/name)
None
Legend: PO/PSO: Programme Outcomes / Programme Specific Outcomes; CL: Cognitive Level (from Revised
Bloom’s Taxonomy); KC: Knowledge Category (from Revised Bloom’s Taxonomy); Class (Hrs): Number of hours
of instruction; Tut (Hrs): Number of hours of tutorial session (where applicable)
Course Content
Importance and Introduction the term “Digital”; Number representations in computing (binary, octal, BCD,
hexadecimal); 2’s complement representation, addition and subtraction; Boolean logic theorem;
Simplification of logic expressions; Truth Tables; Karnaugh map; SOP and POS forms; Combinational
logic circuits and their Representations; Adders; Fast adders, Multiplexers; Decoders; Programmable logic;
Sequential circuits; Flip-flops; Memory sub-systems; Counters; Moore & Mealy machines (FSM): Logic
Gates; Noise Margin, Glitches; Basics of Semiconductors; Operation of Diodes and MOSFET/CMOS;
NAND/NOR using CMOS; Introduction to HDL programming specifically Verilog
Instruction Schedule
Week Topics
1 Importance and Introduction the term “Digital”
2-3 Number representations, 2’s complement representation, addition and subtraction
4-5 Boolean logic theorem, Simplification of logic expressions
6-7 Truth Tables, Karnaugh map, SOP and POS forms
8-9 Combinational logic circuits, Adders, Fast adders, Multipliers, Multiplexers, Decoders,
Programmable logic
10-11 Sequential circuits; Flip-flops; Memory sub-systems, Counters
12 Moore & Mealy machines (FSM)
13-14 Logic Gates, Noise Margin, Glitches, Basics of Semiconductors, Operation of Diodes and
MOSFET/CMOS, NAND/NOR using CMOS
15 Introduction to HDL programming specifically Verilog
Learning Resources
1. David M. Harris, Sarah Harris, Digital Design & Computer Architecture, 2nd Edition, Elsevier, 2013.
2. Morris Mano, Michael D. Ciletti, Digital Design- With an Introduction to the Verilog HDL, 5th edition,
Pearson, 2013.
3. An online simulation tool https://circuitverse.org/
4. Lecture Power Point Slides
Quizzes-03 25 (05+10+10)
Experiments and Writing Records of Results
**Structured Assignment 20
followed by Viva
Mid Semester Examination 20
Comprehensive Examination 35
Total: 100%
**Assignments are to be allotted to students in team of 2 students. Each team has to study, design,
implement, report and present the assignment. This shall be followed by Viva.
Assignments / Projects
S. No. Focus of Assignment / Project CO Mapping
1 Logic simplification using Boolean Theorems CO3, CO6
2 Logic simplification using Karnaugh Maps CO6
3 Designing Combinational and Sequential Systems CO4
4 Applications of Design using Simulation tool CO4, CO6, CO7
Evaluation Procedures
Provide details of how evaluations will be done, how students can look at the evaluations. Generic
evaluation procedures included below. Add additional evaluation procedures / criteria as needed.
The course uses one or more of the following evaluation procedures as part of the course:
Manual evaluation of design problems in assignments, quizzes and exams
Manual evaluation of Circuitverse assignments and project.
Students are provided the opportunity to view the evaluations done either in person or online.
Academic Dishonesty/Plagiarism
As per institute policy