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JK Flip Flop

This document provides instructions for an experiment to simulate the logic of a JK flip-flop using a circuit kit. It includes a truth table showing the output states Q and Q-bar for different combinations of inputs J, K, and the clock signal over four clock cycles. It also includes a diagram of the circuit to be built with the kit along with labels for the power supply, inputs, outputs and clock.

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Shraavani Tople
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0% found this document useful (0 votes)
84 views1 page

JK Flip Flop

This document provides instructions for an experiment to simulate the logic of a JK flip-flop using a circuit kit. It includes a truth table showing the output states Q and Q-bar for different combinations of inputs J, K, and the clock signal over four clock cycles. It also includes a diagram of the circuit to be built with the kit along with labels for the power supply, inputs, outputs and clock.

Uploaded by

Shraavani Tople
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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9/30/22, 9:51 AM J K FLIP FLOP

INSTRUCTIONS

Experiment to perform logic of JK FLIP FLOP on kit

SUPPLY

Vcc: +5V

GND
K
R1: 330ohm R2: 330ohm
LED 1 LED 2
Q̅ Q
CLK

      TRUTH TABLE                    PRINT              Add       CLOCK DIAGRAM                                               


Serial
clock J K Q(n-1) Q̅ (n-1) Q Q̅ Remark
No.
Q̅ =1
1 1 0 0 0 1 0 1 No change
Q̅ =0
2 1 0 1 0 1 0 1 Reset
3 1 1 0 0 1 1 0 set Q=1
4 1 1 1 1 0 0 1 toggle Q=0
K=1
K=0
J=1
J=0
CLK=1
CLK=0

https://de-iitr.vlabs.ac.in/exp/truth-tables-flip-flops/simulation.html 1/1

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