Scribd
Upload
360 views3 pages

Blocking Non Blocking

This document discusses blocking and non-blocking assignment statements in Verilog. It explains that blocking statements execute sequentially in the order specified, while non-blocking statements execute concurrently at the end of the block. It demonstrates this using examples of swapping two numbers, showing that non-blocking assignments allow simultaneous swapping while blocking assignments do not. It also provides a third example using blocking assignments but temporary variables to successfully swap two values.

Uploaded by

shresthanagesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
360 views3 pages

Blocking Non Blocking

This document discusses blocking and non-blocking assignment statements in Verilog. It explains that blocking statements execute sequentially in the order specified, while non-blocking statements execute concurrently at the end of the block. It demonstrates this using examples of swapping two numbers, showing that non-blocking assignments allow simultaneous swapping while blocking assignments do not. It also provides a third example using blocking assignments but temporary variables to successfully swap two values.

Uploaded by

shresthanagesh
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 3

#evolvestreak Day 7 : Blocking and Non Blocking Assignment Statements in Verilog

Learnt blocking and non blocking statement through the example of swapping two numbers.
syntax :
variable_name = [delay_or_event_control] expression; //Blocking statement
variable_name <= [delay_or_event_control] expression; //Non-Blocking statement
Points remembered :
1. Procedural assignment statements can be used to update variables of types “reg”,
“integer”, “real” or “time”.
2. Blocking assignment: The blocking assignment statements are executed in the order
in which they are specified in a procedural block.
➢ Specified in procedural blocks ( always or initial blocks ).
➢ Since its specified in procedural blocks, LHS of the statement should not be
nets/wires. ( As the procedural blocks work in a loop manner, there needs
memory to store the previous content (thinking in terms of hardware), and
hence requires a register in LHS ).
➢ Blocks the execution of subsequent statements till it gets executed.
➢ Recommended style for modelling combinational logic.
➢ In the case of more than one procedural block, all the variables undergoing
blocking assignments are independent.
3. Non-Blocking assignment: The non-blocking statements are executed concurrently
without blocking the execution of statements that follow within the procedural block.
➢ The assignment to the targets scheduled for the end of the simulation cycle ( at
the end of procedural block).
➢ Suitable for modelling sequential logic.
Blocking Assignment Example: Swapping two numbers Try #1

module swap_1;
reg clk, a,b;
initial
begin
clk = 0; a = 0; b = 1;
forever #5 clk = ~clk;
end
always @ (posedge clk)
a=b;
always @ (posedge clk)
b=a;
initial
#100 $finish;
endmodule
“Either one of the values gets assigned to both variables based on the order of scheduling of
procedural block. No swapping occurs.”
Non Blocking Assignment Example: Swapping two numbers Try #2

module swap_1 ();


reg clk, a,b;
initial
begin
clk = 0; a = 0; b = 1;
forever #5 clk = ~clk;
end
always @ (posedge clk)
a<=b;
always @ (posedge clk)
b<=a;
initial
#100 $finish;
endmodule

“Here swapping occurs. Since the LHS gets assigned concurrently without blocking at the
onset of positive edge of clock.”
Swapping of two numbers with blocking statement: Try #3

module swap_1 ();


reg clk;
reg a,b;
reg ta, tb;
initial
begin
clk = 0; a = 0; b = 1; ta =0; tb = 0;
forever #5 clk = ~clk;
end
always @ (posedge clk)
begin
ta = a;
tb = b;
a = tb;
b = ta;
end
initial
#100 $finish;
endmodule

“Swapped two numbers with the help of temporary variables in blocking statements.”
Reference:
Hardware Modelling Using Verilog by Indranil Sengupta Sir. (NPTEL)

Document Prepared by Aswathy A. Contact: [email protected]. Please give


feedbacks. Thanks in advance.
Posted first on VLSI Chaps – VLSI group on Telegram.

You might also like