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    ECE216

    Uploaded by

    Abhishek Kumar
    The document contains 24 multiple choice questions about counters, shift registers, and sequential logic circuits. Counters use edge triggering and are applicable for counting pulses. Any divide-by-N counter can be formed using external gating to reset at a predetermined number. A 4-bit asynchronous up counter will output 10 after the fourth negative clock edge if initially set to 00. Shift registers can be used to delay a pulse train by a finite number of clock periods.

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    ECE216

    Uploaded by

    Abhishek Kumar
    16 views3 pages
    The document contains 24 multiple choice questions about counters, shift registers, and sequential logic circuits. Counters use edge triggering and are applicable for counting pulses. Any divide-by-N counter can be formed using external gating to reset at a predetermined number. A 4-bit asynchronous up counter will output 10 after the fourth negative clock edge if initially set to 00. Shift registers can be used to delay a pulse train by a finite number of clock periods.

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    The document contains 24 multiple choice questions about counters, shift registers, and sequential logic circuits. Counters use edge triggering and are applicable for counting pulses. Any divide-by-N counter can be formed using external gating to reset at a predetermined number. A 4-bit asynchronous up counter will output 10 after the fourth negative clock edge if initially set to 00. Shift registers can be used to delay a pulse train by a finite number of clock periods.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    16 views3 pages

    ECE216

    Uploaded by

    Abhishek Kumar
    The document contains 24 multiple choice questions about counters, shift registers, and sequential logic circuits. Counters use edge triggering and are applicable for counting pulses. Any divide-by-N counter can be formed using external gating to reset at a predetermined number. A 4-bit asynchronous up counter will output 10 after the fourth negative clock edge if initially set to 00. Shift registers can be used to delay a pulse train by a finite number of clock periods.

    Copyright:

    © All Rights Reserved
    Download as PDF, TXT or read online from Scribd
    Download as pdf or txt
    of 3

    ECE216

    1. Which type of triggering phenomenon is exhibited by counters?


    a. Edge
    b. level
    c. pulse
    d. All of the above
    2. Which sequential circuits are applicable for counting pulses?
    a. Counters
    b. Flip flops
    c. Registers
    d. Latches
    3. Any divide-by-N counter can be formed by using external gating to_______at a
    predermined number.
    a. Reset
    b. Low
    c. Preset
    d. High
    4. If the out of two-bit asynchronous binary up counter using T flip flop is ‘00’ at reset
    condition then what output will be generated after the fourth negative clock edge?
    a. 00
    b. 01
    c. 10
    d. 11
    5. The type of register in which we have access only to left most and right most flip flop
    is
    a. Siso
    b. Sipo
    c. Pipo
    d. Piso
    6. A pulse train can be delayed by a finite number of clock periods using a
    a. Serial in serial out shift register
    b. Serial in parallel out shift register
    c. Parallel in serial out shift register
    d. Parallel in parallel out shift register
    7. The shift register belong to be class of
    a. Sequential logic circuits
    b. Combinational logic curcuits
    c. Both(a) and (b)
    d. Neither (a) nor (b)
    8. How many ‘D’ flip flop will be required designing the synchronous counter for state
    digram show below?
    a. 2
    b. 3
    c. 5
    d. 7
    9. The output of up counter goes on increasing due to_________
    a. Transmission of clock pulses
    b. Reception of clock pulses
    c. Both a and b
    d. None of above
    10. The minimum number of flip flop required to construct a mod 64 ripple counter are
    a. 4
    b. 6
    c. 16
    d. 64
    11. Output frequency of decade counter which is clocked from 500 kilohertz signal is
    a. 5khz
    b. 50khz
    c. 500khz
    d. 5000khz
    12. The type of register in which data is into it only one bit at a time but has all data bits
    available as output is
    a. Siso
    b. Sipo
    c. Pipo
    d. Piso
    13. If the number of states in a counter are 2^n then the value of ‘n’ is________
    a. Less than number of flip flops
    b. Greater than number of flip flops
    c. Equal to the number of flip flops
    d. Unpredictable
    14. The BCD counter has
    a. 3 distinct states
    b. 8 distinct states
    c. 10 distinct states
    d. 16 distinct states
    15. The maximum count of a modulus-11 binary counter is________
    a. 1000
    b. 1100
    c. 1010
    d. 1011
    16. Shifting a binary data to he left by 1 bit position using shift register will show the
    a. Addition of 2
    b. Subtraction of 2
    c. Multiplication by 2
    d. Division by 2
    17. A flip flop changes its state during the
    a. Complete operation cycle
    b. Falling edge of the clock
    c. Rising edge of the clock
    d. Both b and c
    18. The maximum modulo number that can be obtained by ripple counter using 5 flip
    flop is
    a. 16
    b. 32
    c. 5
    d. 31
    19. One 7493 ic is used to design the_______counters
    a. 4-bit asynchronous
    b. 4-bit synchronous
    c. 5-bit asynchronous
    d. 5-bit synchronous
    20. How many numbers of MUX in ic74157 have
    a. 1
    b. 2
    c. 3
    d. 4
    21. Shift register are the type of circuits
    a. Synchronous
    b. Asynchronous
    c. Combinational
    d. None of the above
    22. An 8-bit serial in/serial out shift register is used whit a clock frequency of 4 MHz to
    achieve a time delay (td) of _________
    a. 16us
    b. 8us
    c. 4us
    d. 2us
    23. The group of bits 11001 is serially shifted (left-most bit first)
    into a 5-bit parallel output right shift register with an initial state 01010 after three
    clock pulses the register contains__________
    a. 00101
    b. 10001
    c. 01101
    d. 11001
    24. Shift register are highly suitable used for
    a. Rotating
    b. Shifting
    c. Adding
    d. Both A and B

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