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Tma Cit309

The document contains a 20 question multiple choice quiz about computer architecture topics like components of the CPU, memory, operating systems, and instruction execution. The questions cover things like what type of storage frequently accessed operands are stored in, the concept the Von Neumann architecture is based on, what a sequence of instructions is called, and components and processes involved in instruction execution through a processor's pipeline.

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1K views4 pages

Tma Cit309

The document contains a 20 question multiple choice quiz about computer architecture topics like components of the CPU, memory, operating systems, and instruction execution. The questions cover things like what type of storage frequently accessed operands are stored in, the concept the Von Neumann architecture is based on, what a sequence of instructions is called, and components and processes involved in instruction execution through a processor's pipeline.

Uploaded by

Vivienne Okafor
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as RTF, PDF, TXT or read online on Scribd
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CIT 309 - Computer Architecture

Tutor Marked Assignment 2022/1

1. Frequently accessed operands are stored in ______ storages


a) register
b) virtual memory
c) RAM
d) CPU

2. The Von Neumann computer architecture is based on the _____


a) Computer programming concept
b) Stored-program concept
c) Internet technology
d) Web-based concept

3. A sequence of instructions is known as ______


a) Firmware
b) Humanware
c) Hardware
d) Peopleware

4. A program in form of hardware is called ______


a) Hardware program
b) Hardwired program
c) Hardware coding
d) all of the options

5. ______ consists of repeating the process of instruction fetch and instruction execution
a) Processor activity
b) all of the options
c) Program execution
d) Process excecution

6. When the value of an operand is contained in a field in the instruction being executed, the
addressing mode is known as ______
a) Field addressing mode
b) Immediate addressing mode
c) I/O addressing mode
d) Processor addressing mode

7. ______ defines specific interruptible points and implement mechanisms for restarting an
instruction
a) Complex instruction set computer
b) Program counter
c) Interrupt handle
d) Hardware computers

8. ______ is not a main structural component of the computer


a) I/O
b) Internet
c) CPU
d) Main memory

9. ______ is not a component of the CPU


a) System interconnections
b) Arithmetic Logic Unit
c) CPU interconnections
d) Control Unit

10. Which of the following is not a defined state for a process?


a) New
b) Halted
c) Fetch
d) Ready

11. The signle data register contained in the processor is called ______
a) Memory address
b) Processor address
c) Program counter
d) Accumulator

12. The provision of graceful degradation influence of processor failure by operating system is called
______
a) Reliability and fault tolerance
b) Memory management
c) Scheduling
d) Synchronization

13. In ______ operating system, the user submits the job on cards or tape to a computer operator.
a) Multiprocessing operaing system
b) Batch operating system
c) Multitasking
d) Distributed

14. The following systems except ______ are provided to facilitate DMA transfers from I/O
processors
a) time sharing
b) addressing
c) abbreviation
d) simplicity

15. The following are methods of accessing units of data except ______
a) Hierarchical access
b) Associative access
c) Sequential access
d) Direct access

16. Computer ______ refers to the operational units and their interconnections that realize the
architectural specification
a) Organization
b) Operation
c) Architecture
d) Specification

17. The instruction location immediately following a branch is referred to as a ______


a) Continue branch
b) Conditional statement
c) Delay slot
d) Leader

18. The fundamental instruction set design issues include ______


a) data types
b) RAM/ROM
c) Hard disk
d) Internet

19. At the instruction execution stage of a pipeline, one of the following activities can occur except
______
a) if the instruction is a branch, the branch target virtual address is calculated and branch
conditions are checked
b) if the instruction is a register-to-register operation, the ALU performs the arithmetic/logic
operation
c) cache tag checks are performed for loads and stores
d) if the instruction is load/store, the data virtual address is calculated

20. The ______ pulse signals the start of each machine cycle from the control unit
a) Write control
b) IO/M
c) ALE
d) Print

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