This document discusses memory management concepts including:
- Paging allows mapping of a logical address space to a physical memory by dividing both spaces into pages and using page tables to store the mappings. This allows processes to access more memory than is physically available.
- Page tables can be stored in memory and cached using translation lookaside buffers (TLBs) to speed up virtual to physical address translation times.
- Memory allocation algorithms like first-fit and best-fit are used to determine how to allocate memory partitions to processes.
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Chapter3.1 - Main Memory - Question
This document discusses memory management concepts including:
- Paging allows mapping of a logical address space to a physical memory by dividing both spaces into pages and using page tables to store the mappings. This allows processes to access more memory than is physically available.
- Page tables can be stored in memory and cached using translation lookaside buffers (TLBs) to speed up virtual to physical address translation times.
- Memory allocation algorithms like first-fit and best-fit are used to determine how to allocate memory partitions to processes.
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Chapter 3: Memory Management
3.1: Main Memory
1. Consider a logical address space of 64 pages of 1,024 words each,
mapped onto a physical memory of 32 frames. a. How many bits are there in the logical address? b. How many bits are there in the physical address? 2. What is the effect of allowing two entries in a page table to point to the same page frame in memory? Explain how this effect could be used to decrease the amount of time needed to copy a large amount of memory fromone place to another.What effectwould updating some byte on one page have on the other page? 3. Given six memory partitions of 300 KB, 600 KB, 350 KB, 200 KB, 750 KB, and 125 KB (in order), how would the irst-it, best-it, and worst-it algorithms place processes of size 115 KB, 500 KB, 358 KB, 200 KB,and 375 KB (in order)? 4. Assuming a 1-KB page size, what are the page numbers and offsets for the following address references (provided as decimal numbers): a. 3085 b. 42095 c. 215201 d. 650000 e. 2000001 5. The BTV operating system has a 21-bit virtual address, yet on certain embedded devices, it has only a 16-bit physical address. It also has a 2-KB page size. How many entries are there in each of the following? a. Aconventional, single-level page table b. An inverted page table What is the maximumamount of physical memory in the BTV operating system? 6. Consider a logical address space of 256 pages with a 4-KB page size, mapped onto a physical memory of 64 frames. a. How many bits are required in the logical address? b. How many bits are required in the physical address? 7. Consider a computer systemwith a 32-bit logical address and 4-KB page size. The system supports up to 512MB of physical memory. How many entries are there in each of the following? a. Aconventional, single-level page table b. An inverted page table 8. Consider a paging system with the page table stored in memory. a. If a memory reference takes 50 nanoseconds, how long does a paged memory reference take? b. If we add TLBs, and if 75 percent of all page-table references are found in the TLBs, what is the effective memory reference time? (Assume that inding a page- table entry in the TLBs takes 2 nanoseconds, if the entry is present.) 9. Consider a logical address space of 256 pages with a 4-KB page size, mapped onto a physical memory of 64 frames. a. How many bits are required in the logical address? b. How many bits are required in the physical address? 10. Consider a computer systemwith a 32-bit logical address and 4-KB page size. The system supports up to 512MB of physical memory. How many entries are there in each of the following? a. Aconventional, single-level page table b. An inverted page table 11. Explain the difference between internal and external fragmentation. 12. Consider the following process for generating binaries. A compiler is used to generate the object code for individual modules, and a linker is used to combine multiple object modules into a single program binary. How does the linker change the binding of instructions and data to memory addresses? What information needs to be passed from the compiler to the linker to facilitate the memory-binding tasks of the linker? 13. Given six memory partitions of 100 MB, 170 MB,40 MB, 205 MB, 300 MB, and 185 MB (in order), how would the irst-it, best-it, and worst-it algorithms place processes of size 200 MB,15 MB, 185 MB,75 MB, 175MB,and80 MB (in order)? Indicate which—if any—requests cannot be satisied. Comment on how eficiently each of the algorithms manages memory. 14. Most systems allow a program to allocate more memory to its address space during execution. Allocation of data in the heap segments of programs is an example of such allocated memory. What is required to support dynamic memory allocation in the following schemes? a. Contiguous memory allocation b. Paging 15. Compare thememory organization schemes of contiguousmemory allo- cation and paging with respect to the following issues: a. External fragmentation b. Internal fragmentation c. Ability to share code across processes 16. On a system with paging, a process cannot access memory that it does not own. Why? How could the operating system allow access to addi- tional memory?Why should it or should it not? ………. 21. Assuming a 1-KB page size, what are the page numbers and offsets for the following address references (provided as decimal numbers)? a. 21205 b. 164250 c. 121357 d. 16479315 e. 27253187 22. The MPV operating system is designed for embedded systems and has a 24-bit virtual address, a 20-bit physical address, and a 4-KB page size. How many entries are there in each of the following? a. Aconventional, single-level page table b. An inverted page table What is the maximum amount of physicalmemory in the MPV operating system? 23. Consider a logical address space of 2,048 pages with a 4-KB page size, mapped onto a physical memory of 512 frames. a. How many bits are required in the logical address? b. How many bits are required in the physical address? 24. Consider a computer systemwith a 32-bit logical address and 8-KB page size. The system supports up to 1 GB of physical memory. How many entries are there in each of the following? a. Aconventional, single-level page table b. An inverted page table 25. Consider a paging system with the page table stored in memory. a. If a memory reference takes 50 nanoseconds, how long does a paged memory reference take? b. If we add TLBs, and if 75 percent of all page-table references are found in the TLBs, what is the effective memory reference time? (Assume that inding a page- table entry in the TLBstakes2 nanoseconds, if the entry is present.)