Date:

Ex.No: 01

VERIFICATION OFOHM'S LAW AND KIRCHOFF'S LAW

AIM:
verify ohm's law and
Costruct a given eircuit in low power bread board base to
kirchoff's voltage law and kirchoff's current law experimentalily.

APPARATUS:

S.No Name of the Item

RPS (0-10V)
2 Resistor 4.7k2, 470S2, 2202, 1k2
3
Bread board
4 A.C. Ammeter- 3 nos. (0-15 mA)
5 A.CVoltmeter -3nos.(0-30V)
Connecting wires
CIRCUIT DIAGRAM:

W
R -
R6 Ra R

R1-4702
R2-4.7KQ2
R3-3302
R4-4.7KQ
R5=2202
R6=1002
V= (0-10V) Variable voltage

1
THEORY:

OHM'S LAW:

At a constant temperature the potential difference across the tenminals is proportional

to current flowing through conductor.

KIRCHOFF'S LAW:

Kirchhoff's current law and voltage law, defined by Gustav Kirchhoff, describe the relation of
values of currents that flow through a junction point and voltages in an electrical circuit loop,
in an electrical circuit.

Kirchhoffs Current Law (KCL)

This is Kirchhoffs first law.

The sum of all currents that enter an electrical circuit junction is 0. When the currents enter
the junction has positive sign and the current that leave the junction have negative sign:

Another way to look at this law is that the sum of currents that enter a junetion is equal to the
sum of currents that leave the
junction:
Kirchhoff's Voltage Law (KVL)

This is Kirchhoff's second law.

The sum of all voltages or potential differences in an electrical circuit loop is 0.

Procedure:
1. Give the connections as per circuit diagram.
2. Measure the voltage and current across cach element.
3. Tabulate the result in the given table.
4. Measure the resistance of each element and enter them in the table.

2
Observation Table:

Ohm's Law

S.no Theorctical value Practical value

KVL

Theoretical value Practical value

S.no

KCL

S.no Theoretical value Practical

value

3
Calculations

RESULT:

Experimental verification of Ohm's law and Kirchoff's law is performed in close

matches with theoretical
background.

4
ENo:02
Date:

EXPERIMENTAL VERIFICATION OF SUPERPOSITION THEOREM

AIM:
a given circuit in loW power brecad board base to verify superposition
To construct
theorem experimentally.

STATEMENT:
network the response in any branch of circuit having
It states that "for a linear
the algebraic sum of the response caused by
more than one independent source cquals
source acting alone while
all other independent sources are replaced by
each independent
their intemal impedances".

APPARATUS REQUIRED:

S.No Name of the Item

RPS (0-10V)
2202
Resistor 4702, Ik2, 4.7k2,
Bread board
Ammeter (0-50)mAMC
Voltmeter (0-15)V MC
Connecting wires
CIRCUIT DIAGRAM:

470
1k 220

10V
4.7 k S4.7 k

Circuit 1: Respons? with both the sources V, and V;

R
W- WTWM
470 1k 220
10v 4.7 ka 4.7 k2

Circuit 2: Response with the source V # 10V and V, = 0

470 9
1k 220
4.7 k 4.7 kQ

Circuit 3: Response with the source V, 0 and V, 5V

OBSERVATION TABILE:

Case Practical value Theoretical value

Without 5v
Without 10v
Total
When both connected
Without 5v

PROCEDURE:
1. Give the connections as per the circuit
2. Set V1 10V and VI =5V, observe the
=
diagram.
ammeter reading connected to the load
resistor, RL= 1 kQ.
3. Now, set V2 0V and V1
= =
5V, observe the ammeter reading.
4. Above procedure in 3 is
5. Total response is
step repeated for V1 10V and V2 OV.
=
=

required at the load terminal which is obtained by sum of the

individual responses obtained in steps 3 and 4.
6. Observe that the
response obtained in step 2 is equal to the
step 5 proving superposition theorem. response obtained in
7. Repeat the
procedure for different values of VI and V2.

RESULT:
Experimental verification of superposition theorem was performed and 1S vau
alidated
through theoretical caleulation.
Ex.No: 03
Date:
EXPERIMENTAL VERIFICATION OF THEVENIN'S ANDNORTON'S
THEOREM
AIM:
To construct a given circuit in low power bread board base, to verify Thevenin's and
Norton's theorem experimentally

STATEMENT:

THEVENIN'S THEOREM:
It states that, "a linear network with an open circuit output terminals can be replaced by a
simple equivalent circuit consisting of a thevenin's voltage source (Vth) in series with the
hevenin's resistance (Rth) / impedance (Zth), where Vth is the open circuit voltage across
the output teminals and Rth is the cquivalent resistance (or impedance) across the output
teminals with all the voltage and current sources replaced by their internal impedances"

NORTON'S THEOREM:
It states that, "a lincar network with an open cireuit output terminals can be replaced by a
simpleequivalent circuit consisting of a Norton's current source (IN) in parallel with the
thevenin's resistance (Rth)/ impedance (Zth), where IN is the short circuit current through
the output terminals and Rth is the equivalent resistance (or impedance) across the output
terminals with all the voltage and current sources replaced by their intermal impedances".

APPARATUS REQUIRED:

S.No Name oftheItem

RPS(0-10V
Resistor lk2, 3.3k2, 2202
Bread board
Ammeter (0-15)mA MC
Voltmeter (0-10)V MC
Connecting wires
Multimeter

CIRCUIT DIAGRAM:

1k
IOV

1.
3.3k
2200 k

Circuit for the verication of Thevenin's and Norton's Theorem

TV NI i0UALENT (IRCUT NORION StQUVALNT C*CUI

OBSERVATION TABLE:

RTH K2) Vi=lLX R(V){mA)

VTH(V In(mA)
Theoretical
value
Practical
value
CALCULATIONS:

PROCEDURE:
1. Give the connection as per the circuit diagram.
and using ammeter measure the current (1L) through the
2. Apply suitable DC voltage
load resistor.
3. To find Thevenin's voltage:
a) Give the connection as per diagram.
the circuit

b) Remove the load resistance. measure the the open ended

voltage across
c) Apply suitable DC voltage and
terminals using multimeter.

4. To find Thevenin's resistance:

a) Give the connection as per
the circuit diagram.
internal resistance and open circuit the load.
b) Replace the supply by
mode measure the resistance
c) Using multimeter in resistance
5. To find Norton's current:
circuit diagram.
a) Give the connection as per the
an ammeter.
b) Remove the load resistor and connect
Switch on the supply and measure the Norton's current in ammeter.
c)

RESULT: and ae
theorems were done
Thus experimental verification of Thevenin's and Norton's
validated with theoretical calculations.

8
Ex.No: 044 Date:

FREQUENCY RESPONSE OF RLC SERIES RESONANCE CIRCuT

AIM: Ta obtain the resonance frequency of the given RLC series resonance circuit

APPARATUS REQUIRED

S.No Name of the Range Quantity

Apparatus
Function generator 0-2MHz
Resistor IKohm
Voltmeter (0-5)V
4. Capacitor uF
Breadboard
6. Decade inductance box (0-100)mH
Connecting wires ...
As
required

FORMULA USED:

Series resonance frequency F=1/(2nv(LC))

CIRCUIT DIAGRAM:

1.0uF
50 mH
m

L
C

Fa.gen( R1.00

45
TABULATION:
Frequencyin Hz VRin volts

PROCEDURE:
1. Connections as Per the Circuit Diagram
2. Vary the frequency of the function generator from 50 to 20KHz.
3. Measure the corresponding value of voltage across the resistor R for series RLC
circuit
Repeat the same procedure for different values of frequency.
Tabulate your observation
6. Note down then resonance frequency from the graph.

RESULT:
Thus the resonance frequency of series RLC series circuit is obtained
1. Practical value . . ***** ''**'
2. Theoretical value *******'********'
Ex.No: 05 Date:

TRANSIENT RESPONSEOF RL AND RC CIRCUIT FORDC INPUT

AIM:

To construct RL & RC transient network and to draw the transient curves.

APPARATUS REQUIRED:

S.No Name of the Range Quantity

Apparatus
Function generator 0-2MHz
Resistor 10Kohm
3. Voltmeter, Ammeter (0-10)V 1
(0-10)mA
Capacitor 1000uF
Bread board
6. Decade inductancebox (0-100)mH
Connecting wires As
7.
required

FORMULA:

Time constant of RC circuit = RC

RL CIRCUIT:
10 K

W
R

(0-30) L0.lnH
DC
RPS

A0-10 junA

MODEL GRAPH:

A9
 06326

ms

Seady
Tmusient state 4 state

RC CIRCUIT:

S 0-10ms 10 KQ
ww
R

(0 30)
|+
(0-10v
DC MC
1000 F
RPS

MODEL GRAPH:

50
 CHARGING
DISCIHARGING

04138

Ln n

vlent sinte->4Stendy

PROCEDURE:

Connections as made as per the circuit diagram.

.
the switch S should be in OFF position.
2. Before switching ON the power supply
and change the switch to ON position.
3. Now switch ON the power supply
and note down the reading of ammeter and voltmeter
4. The voltage is gradually increased
.In RL circuit measure the ammeter reading
for each time duration in RC
and draw the graph of Vc(t) Vst
5. Tabulate the readings

RESULT:
Thus the transient response of RL and RC circuit for DC input was verified.

51
E x . N o :0 6 Date:

STUDYOF LOGIC GATES

Tovern the truth table ofbasic digital ICs of AND, OR, NOT, NAND, NOR, EX.OR

PPARATLSREQUIRED:

S.NO Components Specification Quantity

AND AND gate IC 7408

2. OR gate IC 7432
3. NOT gate IC 7404
NAND gate IC 7400
4
5. NOR gate IC 7402
6. EX-OR gate IC 7486
Connecting wires As required
7.
8. LED

THEORY:

(a) AND gate:

It is an
multiplication operation.
is the physical real1zation of logical are l'.
An AND gate of"l' only if all the input signals
an output signal
circuit which generates
electronic

(b) OR gate:
It is an electronic
realization of the logical addition operation.
An OR gate is the physical is "1'.
an output signal
of l if any ofthe input signals
circuit which generates

() NOT gate
electronic
realization of the complementation
operation. It is an
A NOT gate is the physical the input signal. A NOT gate
which is the reverse of
an output signal
circuit which generates
inverter because it
inverts the input.
is also known as an

(d) NAND gate:

'0' if
of the NAND gate will be
complemented AND gate. The output
A NAND gate is a is *0'.
are 1' and will
be I ' if any one of the input signal
all the input signals
(e) NOR gate:
will be "l'if all the
OR gate. The output of the OR gate
A NOR gate is a complemented is 'T'.
one of the input signal
inputs are 0' and will be '0' ifany
 EX-OR gate:
An Ex-OR gate performs the following Boolean function,
A B (A.B')+ (A'.B)
It is similar to OR gate but excludes the combination of both A and B being equal to one. Th
exclusive OR is a function that give an output signal '0' when the two input signals are eaual
cither 0 or 'l'.

PROCEDURE:
. Connections are given as per the circuit diagram
2. For all the ICs, 7h pin is grounded and 14h pin is given +5 V supply.
3. Apply the inputs and verify the truth table for all gates.

L.ANDGATE:
LOGICDIAGRAM: PIN DIAGRAM OF IC 7408:
VcC

-Y = A.B

GND

TRUTH TABLE:
INPUTS OUTPUT
S.No Y=A.B
B
0 0

12
2.0RGATE

LOGICDIAGRAM: PIN DIAGRAM OF IC 7432:

Y A+B Voc

D
GND

TRUTH TABLE
INPUT OUTPUT
S.No
B Y=A+B
0
0
4

3NOTGATE
LOGICDIAGRAM: PIN DIAGRAM OFIC 7404:
Voc

- Y =A
A

GNO

TRUTH TABLE:
INPUT OUTPUT
S.No
A f=4
0

13
NAND GATE
PINDIAGRAM OF IC7400:
LOGICDIAGRAM: Vcc

Y = (4.B)

GND

IRUTHTABLE OUTPUT
INPUT
S.No
B Y=(A.B)
A
0

5.NOR GATE:
LOGICDIAGRAM: PINDIAGRAM OFIC 7402:
VcC

-7-(4+ B)

GNO

TRUTH TABLE:
INPUT OUTPUT
S.No
B Y = (A + B)

0
4

1
6.EX-ORGATE:

LOGICDIAGRAM: PINDIAGRAM OF IC 7486:

Vcc

D
Y A B

GND

TRUTH TABLE:
INPUT OUTPUT
S.No
B Y = ABB

RESULT:
Thus the truth tables of all the basic digital ICs are verified.

15