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Booth Algorithm

The document describes the Booth multiplication algorithm for multiplying binary integers represented in two's complement form. It explains that the algorithm works by examining pairs of bits in the multiplier and either adding, subtracting, or leaving unchanged the multiplicand in the partial product. The algorithm is implemented in hardware using registers to store the multiplicand, multiplier, and partial product, along with control logic to shift values and determine whether to add, subtract, or leave unchanged the multiplicand based on the examined multiplier bits. An example is provided showing the step-by-step multiplication of two negative numbers.

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Moses Dian
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121 views

Booth Algorithm

The document describes the Booth multiplication algorithm for multiplying binary integers represented in two's complement form. It explains that the algorithm works by examining pairs of bits in the multiplier and either adding, subtracting, or leaving unchanged the multiplicand in the partial product. The algorithm is implemented in hardware using registers to store the multiplicand, multiplier, and partial product, along with control logic to shift values and determine whether to add, subtract, or leave unchanged the multiplicand based on the examined multiplier bits. An example is provided showing the step-by-step multiplication of two negative numbers.

Uploaded by

Moses Dian
Copyright
© © All Rights Reserved
Available Formats
Download as PDF, TXT or read online on Scribd
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Multiplication for binary integers in signed-2's complement

representation
or
Booth Multiplication Algorithm
• Multiplication M x 14, where M is the multiplicand and 14 the multiplier, can be done as
M x 24 - M X 21 •
• Because +14 can be represented in binary as 001110. It has a string of 1's in the
from bit weight 2k to weight 2m and it is equivalent to 2k+1 - 2m.
• So, the number 14 can be represented as 2k+ l - 2m = 24 - 21 = 16 -2 = 14.
• Thus, the product can be obtained by shifting the binary multiplicand M four times to the
left and subtracting M shifted left once.
• Booth algorithm is based on the above said fact.
• Booth algorithm requires examination of the multiplier bits and shifting of the partial
product.
• Prior to the shifting, the multiplicand may be added to the partial product, subtracted
from the partial product, or left unchanged according to the following rules:
1. The multiplicand is subtracted from the partial product upon facing the first least
significant 1 in a string of 1's in the multiplier. i.e. Qn=1, Qn+1=0.
2. The multiplicand is added to the partial product upon facing the first 0 (provided that
there was a previous 1) in a string of O's in the multiplier. i.e. Qn=0, Qn+1=1
3. The partial product does not change when the multiplier bit is identical to the
previous multiplier bit. i.e. Qn=0, Qn+1=0 or i.e. Qn=1, Qn+1=1.

• The algorithm works for both positive or negative multipliers in 2's complement
representation.
• For example, a multiplier equal to - 14 is represented in 2's complement as 110010 and is
treated as - 24 + 22 - 21 = - 14.

Hardware implementation of Booth algorithm:


• We use 3 registers namely AC, BR, and QR.
• Accumulator AC is used for storing partial product along with QR register.
• Multiplicand and multiplier are stored in BR and QR respectively.
• Qn indicates the least significant bit of the multiplier in register QR.
• An extra flip-flop Qn+1, is appended to QR to facilitate a double bit inspection of the
multiplier.
• Sequence counter SC is set to a number n equal to the number of bits in the multiplier.
• The hardware implementation of Booth algorithm is shown in the following figure.
Hardware for Booth algorithm

• AC register and appended bit Qn+1 are initially cleared to 0.


• The two bits of the multiplier in Qn and Qn+1 are inspected.
• If the two bits are equal to 10, it means, it requires a subtraction of the
multiplicand from the partial product in AC. i.e. first 1 in a string of 1' s has
been encountered.
• If the two bits are equal to 01, it means, it requires the addition of the
multiplicand to the partial product in AC. i.e. first 0 in a string of 0' s has
been encountered.
• When the two bits are equal, the partial product does not change.
• An overflow cannot occur because the addition and subtraction of the
multiplicand follow each other.
• As a consequence, the two numbers that are added always have opposite
signs, a condition that avoid an overflow.
• Next step is to shift right the partial product and the multiplier in AC and
QR (including bit Qn+1).
• This is an arithmetic shift right(ashr) operation which shifts AC and QR to
the right and leaves the sign bit in AC unchanged.
• The sequence counter is decremented and the computational loop is
repeated n times.
• A numerical example of Booth algorithm is shown in the following table for n = 5.
• It shows the step-by-step multiplication of (- 9) x (- 13) = + 117.
• Note that the multiplier in QR is negative and that the multiplicand in BR is also
negative.
• The 10-bit product appears in AC and QR and is positive.
• The final value of Qn+1 is the original sign bit of the multiplier and should not be taken
as part of the product.

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