Chapter Six

Assembly language Instructions

a) MOV INSTRUCTION

 Purpose: Data transfer between memory cells, registers and

the accumulator.
 Syntax:
MOV Destiny, Source
Where Destiny is the place where the data will be moved and Source is
the place where the data is.
 Cont..
 The different movements of data allowed for this
instruction are:
*Destiny: memory. Source: accumulator
*Destiny: accumulator. Source: memory
*Destiny: segment register. Source: memory/register
*Destiny: memory/register. Source: segment register
*Destiny: register. Source: register
*Destiny: register. Source: memory
*Destiny: memory. Source: register
*Destiny: register. Source: immediate data
*Destiny: memory. Source: immediate data
 Example:
MOV AX, 0006h
MOV BX, AX
MOV AX, 4C00h
INT 21H
This small program moves the value of 0006H to the AX register,
then it moves the content of AX (0006h) to the BX register, and
lastly it moves the 4C00h value to the AX register to end the
execution with the 4C option of the 21h interruption.
 b) Loading instructions
 They are specific register instructions. They are used to load bytes or
chains of bytes onto a register.
LEA INSTRUCTION
 Purpose: To load the address of the source operand
 Syntax: LEA destiny, source
The source operand must be located in memory, and its displacement is
placed on the index register or specified pointer in destiny.
 To illustrate one of the facilities we have with this command let us write
equivalence:
• MOV SI, OFFSET VAR1
Is equivalent to :
• LEA SI, VAR1
 It is very probable that for the programmer it is much easier to create
extensive programs by using this last format.
 c) Stack instructions
 These instructions allow the use of the stack to store or retrieve
data.
POP
PUSH
i) POP INSTRUCTION
 Purpose: It recovers a piece of information from the stack
 Syntax:
POP destiny
This instruction transfers the last value stored on the stack to the
destiny operand, it then increases by 2 the SP register. This increase is
due to the fact that the stack grows from the highest memory segment
address to the lowest, and the stack only works with words, 2 bytes, so
then by increasing by two the SP register, in reality two are being
subtracted from the real size of the stack.
ii) PUSH INSTRUCTION
 Purpose: It places a word on the stack.
 Syntax:
PUSH source
 The PUSH instruction decreases by two the value of SP and
then transfers the content of the source operand to the new
resulting address on the recently modified register.
 The decrease on the address is due to the fact that when adding
values to the stack, this one grows from the greater to the
smaller segment address, therefore by subtracting 2 from the
SP register what we do is to increase the size of the stack by
two bytes, which is the only quantity of information the stack
can handle on each input and output of information
 Logic instructions
 They are used to perform logic operations on the operand.
 AND NEG NOT OR TEST XOR
A) AND INSTRUCTION
 Purpose: It performs the conjunction of the operand bit by
bit.
 Syntax: AND destiny, source
Source Destiny | Destiny
-----------------------------
1 1 |1
1 0 |0
0 1 |0
0 0 |0
 The result of this operation is stored on the destiny oprand.
 b) NEG INSTRUCTION

 Purpose: It generates the complement to 2.

 Syntax: NEG destiny
This instruction generates the complement to 2 of
the destiny operand and stores it on the same
operand.
For example, if AX stores the value of 1234H, then:
 NEG AX

 This would leave the EDCCH value stored on the

AX register.
 c) NOT INSTRUCTION
 Purpose: It carries out the negation of the destiny operand
bit by bit.
 Syntax:
NOT destiny
 The result is stored on the same destiny oprand.
d) OR INSTRUCTION
 Purpose: Logic inclusive OR
 Syntax:
OR destiny, source
 The OR instruction carries out, bit by bit, the logic inclusive
disjunction of the two operands :
Source Destiny | Destiny
-----------------------------------
1 1|1
1 0|1
0 1|1
0 0|0
e) TEST INSTRUCTION
 Purpose: It logically compares the operands
 Syntax:
TEST destiny, source
 It performs a conjunction, bit by bit, of the operand, but differing from AND, this instruction
does not place the result on the destiny operand, it only has effect on the state of the flags.
f) XOR INSTRUCTION
 Purpose: OR exclusive
 Syntax:
XOR destiny, source
Its function is to perform the logic exclusive disjunction of the two operands bit by bit.
 Source Destiny | Destiny
-----------------------------------
1 0|0
0 0|1
1 1|1
0 1|0
Arithmetic instructions
 They are used to perform arithmetic operations on the operators.
 ADD
 SUB
MUL
 DIV
 ADD INSTRUCTION
 Purpose: Addition of the operands.
 Syntax:
 ADD destiny, source
 It adds the two operands and stores the result on the destiny operator.
 SUB INSTRUCTION
 Purpose: Subtraction.
 Syntax:
 SUB destiny, source
 It subtracts the source operand from the destiny.
 MUL INSTRUCTION
 Purpose: Multiplication with sign.
 Syntax:
 MUL source
 The assembler assumes that the multiplicand will be of
the same size as the multiplier, therefore it multiplies the
value stored on the register given as operand by the one
found to be contained in AH if the multiplier is 8 bits or
by AX if the multiplier is 16 bits. When a multiplication
is done with 8 bit values, the result is stored on the AX
register and when the multiplication is with 16 bit values
the result is stored on the even DX.
  DIV INSTRUCTION
 Purpose: Division without sign.
 Syntax:
DIV source
 The divider can be a byte or a word and it is the operand
which is given the instruction.
 If the divider is 8 bits, the 16 bits AX register is taken as
dividend and if the divider is 16 bits the even DX:AX register
will be taken as dividend, taking the DX high word and AX as
the low.
 If the divider was a byte then the quotient will be stored on
the AL register and the residue on AH, if it was a word then
the quotient is stored on AX and the residue on DX.
 Jump instructions
 They are used to transfer the flow of the process to the indicated
operand.
 JMP
 JA (JNBE)
 JAE (JNBE)
 JB (JNAE)
 JBE (JNA)
 JE (JZ)
 JNE (JNZ)

 JMP INSTRUCTION
 Purpose: Unconditional jump.
 Syntax:
JMP destiny
 This instruction is used to deviate the flow of a program without
taking into account (connsideration) the actual conditions of the
flags or of the data.
  JA (JNBE) INSTRUCTION
 Purpose: Conditional jump.
 Syntax:
JA Label
 After a comparison this command jumps if it is or jumps if it is not
down or if not it is the equal.
 This means that the jump is only done if the CF flag is deactivated or if
the ZF flag is deactivated, that is that one of the two be equal to zero.
 JAE (JNB) INSTRUCTION
 Purpose: Conditional jump.
 Syntax:
JAE label
 It jumps if it is or it is the equal or if it is not down.
The jump is done if CF is deactivated.
 1. JB (JNAE) INSTRUCTION
 Purpose: Conditional jump.
 Syntax:
JB label
 It jumps if it is down, if it is not , or if it is the equal.
 The jump is done if CF is activated.

1. JBE (JNA) INSTRUCTION

 Purpose: Conditional jump.
 Syntax:
JBE label
 It jumps if it is down, the equal, or if it is not .
 The jump is done if CF is activated or if ZF is activated, that any of them be equal to 1.

1. JE (JZ) INSTRUCTION
 Purpose: Conditional jump.
 Syntax:
JE label
 It jumps if it is the equal or if it is zero.
 The jump is done if ZF is activated.
1. JNE (JNZ) INSTRUCTION
 Purpose: Conditional jump.
 Syntax:
JNE label
 It jumps if it is not equal or zero.
 The jump will be done if ZF is deactivated.
 Instructions for cycles: loop
 They transfer the process flow, conditionally or unconditionally, to a destiny, repeating this action until the counter
is zero.
 LOOP
LOOPE
LOOPNE
 LOOP INSTRUCTION
 Purpose: To generate a cycle in the program.
 Syntax:
LOOP label
 The loop instruction decreases CX on 1, and transfers the flow of the program to the label given as operator if CX
is different than 1.
 LOOPE INSTRUCTION
 Purpose: To generate a cycle in the program considering the state of ZF.
 Syntax:
LOOPE label
 This instruction decreases CX by 1. If CX is different to zero and ZF is equal to 1, then the flow of the program is
transferred to the label indicated as operand.
 LOOPNE INSTRUCTION
 Purpose: To generate a cycle in the program, considering the state of ZF.
 Syntax:
LOOPNE label
 This instruction decreases one from CX and transfers the flow of the program only if ZF is different to 0.
 1.Counting instructions
 They are used to decrease or increase the content of the counters.
 DEC
INC
 DEC INSTRUCTION
 Purpose: To decrease the operator
 Syntax:
 DEC destiny
 This operation subtracts 1 from the destiny operator and stores the
new value in the same operator.
 INC INSTRUCTION
 Purpose: To increase the operator.
 Syntax:
 INC destiny the instruction adds 1 to the destiny operator and keeps
the result in the same destiny operator.
 Comparison instructions

 They are used to compare operands, and they affect the

content of the flags.
 CMP

 CMP INSTRUCTION
 Purpose: To compare the operators.
 Syntax:
 CMP destiny, source
 This instruction subtracts the source operator from the
destiny operator but without this one storing the result of the
operation, and it only affects the state of the flags.
Flag instructions

 They directly affect the content of the flags.

CLC
CLD
CLI
CMC
STC
STD
STI
  CLC INSTRUCTION
 Purpose: To clean the cartage flag.
 Syntax:
CLC
 This instruction turns off the bit corresponding to the cartage flag, or in other words it puts it on zero.
 CLD cINSTRUCTION
 Purpose: To lean the address flag.
 Syntax:
 CLD
 This instruction turns off the corresponding bit to the address flag.
 CLI INSTRUCTION
 Purpose: To clean the interruption flag.
 Syntax:
 CLI
 This instruction turns off the interruptions flag, disabling this way those mask arable interruptions.
 A mask arable interruptions is that one whose functions are deactivated when IF=0.
 CMC INSTRUCTION
 Purpose: To complement the cartage flag.
 Syntax:
 CMC
 This instruction complements the state of the CF flag, if CF = 0 the instructions equals it to 1, and if the instruction is 1 it equals it
to 0.
 We could say that it only "inverts" the value of the flag.
 STC INSTRUCTION
 Purpose: To activate the cartage flag.
 Syntax:
 STC
 This instruction puts the CF flag in 1.
 STD INSTRUCTION
 Purpose: To activate the address flag.
 Syntax:
STD
 The STD instruction puts the DF flag in 1.
 STI INSTRUCTION
 Purpose: To activate the interruption flag.
 Syntax:
STI
 The instruction activates the IF flag, and this enables the mask arable
external interruptions (the ones which only function when IF = 1).
 MOVS (MOVSB) (MOVSW) Instruction
 Purpose: To move byte or word chains from the source, addressed by
SI, to the destiny addressed by DI.
 Syntax:
MOVS
 This command does not need parameters since it takes as source
address the content of the SI register and as destination the
content of DI. The following sequence of instructions illustrates
this:
 MOV SI, OFFSET VAR1
MOV DI, OFFSET VAR2
MOVS
 First we initialize the values of SI and DI with the addresses of the
VAR1 and VAR2 variables respectively, then after executing
MOVS the content of VAR1 is copied onto VAR2.
 The MOVSB and MOVSW are used in the same way as MOVS,
the first one moves one byte and the second one moves a word.
LODS (LODSB) (LODSW) INSTRUCTION

 Purpose: To load chains of a byte or a word into the accumulator.

 Syntax:
LODS
 This instruction takes the chain found on the address specified by SI, loads
it to the AL (or AX) register and adds or subtracts , depending on the
state of DF, to SI if it is a bytes transfer or if it is a words transfer.
 MOV SI, OFFSET VAR1
LODS
 The first line loads the VAR1 address on SI and the second line takes the
content of that locality to the AL register.
 The LODSB and LODSW commands are used in the same way, the first
one loads a byte and the second one a word (it uses the complete AX
register).
  LAHF INSTRUCTION
 Purpose: It transfers the content of the flags to the AH register.
 Syntax:
LAHF
 This instruction is useful to verify the state of the flags during the execution of
our program.
 The flags are left in the following order inside the register:
 SF ZF ?? AF ?? PF ?? CF
 LDS INSTRUCTION
 Purpose: To load the register of the data segment
 Syntax:
LDS destiny, source
 The source operand must be a double word in memory. The word associated
with the largest address is transferred to DS, in other words it is taken as the
segment address. The word associated with the smaller address is the
displacement address and it is deposited in the register indicated as destiny.
 LES INSTRUCTION
 Purpose: To load the register of the extra segment
 Syntax:
LES destiny, source
 The source operator must be a double word operator in memory. The content of the word with the larger
address is interpreted as the segment address and it is placed in ES. The word with the smaller address is
the displacement address and it is placed in the specified register on the destiny parameter.
 POPF INSTRUCTION
 Purpose: It extracts the flags stored on the stack
 Syntax:
 POPF
 This command transfers bits of the word stored on the higher part of the stack to the flag
register.
 The way of transference is as follows:
 BIT FLAG
0 CF
2 PF
4 AF
6 ZF
7 SF
8 TF
9 IF
10 DF
11 OF
 These localities are the same for the PUSHF command.
 Once the transference is done the SP register is increased by 2,
diminishing the size of the stack.
 PUSHF INSTRUCTION

 Purpose: It places the value of the flags on the stack.

 Syntax:
 PUSHF
 This command decreases by 2 the value of the SP register and then the content
of the flag register is transferred to the stack, on the address indicated by SP.
 The flags are left stored in memory on the same bits indicated on the POPF
command.
 ADC INSTRUCTION
 Purpose: Cartage addition
 Syntax:
ADC destiny, source
 It carries out the addition of two operands and adds one to the result in
case the CF flag is activated, this is in case there is carried.
 The result is stored on the destiny operand.
  IDIV INSTRUCTION
 Purpose: Division with sign.
 Syntax:
IDIV source
 It basically consists on the same as the DIV instruction, and the only
difference is that this one performs the operation with sign. For its
results it used the same registers as the DIV instruction.
 IMUL INSTRUCTION
 Purpose: Multiplication of two whole numbers with sign.
 Syntax:
 IMUL source
 This command does the same as the one before, only that this one
does take into account the signs of the numbers being multiplied.
 The results are kept in the same registers that the MOV instruction
uses.
  SBB INSTRUCTION
 Purpose: Subtraction with cartage.
 Syntax:
SBB destiny, source
 This instruction subtracts the operators and subtracts one to the result if CF is activated. The source operator is
always subtracted from the destiny.
 This kind of subtraction is used when one is working with 32 bits quantities.
 JG (JNLE) INSTRUCTION
 Purpose: Conditional jump, and the sign is taken into account.
 Syntax:
 JG label
 It jumps if it is larger, if it is not larger or equal.
 The jump occurs if ZF = 0 or if OF = SF.
 JGE (JNL) INSTRUCTION
 Purpose: Conditional jump, and the sign is taken into account.
 Syntax:
 JGE label
 It jumps if it is larger or less than, or equal to.
 The jump is done if SF = OF
 JL (JNGE) INSTRUCTION
 Purpose: Conditional jump, and the sign is taken into account.
 Syntax:
 JL label
 It jumps if it is less than or if it is not larger than or equal to.
 The jump is done if SF is different than OF.
 JLE (JNG) INSTRUCTION
 Purpose: Conditional jump , and the sign is taken into
account.
 Syntax:
 JLE label
 It jumps if it is less than or equal to, or if it is not larger.
 The jump is done if ZF = 1 or if SF is different than OF.
 JC INSTRUCTION
 Purpose: Conditional jump, and the flags are taken into
account.
 Syntax:
 JC label
 It jumps if there is cartage.
 The jump is done if CF = 1
 JNC INSTRUCTION
 Purpose: Conditional jump, and the state of the flags is taken into
account.
 Syntax:
 JNC label
 It jumps if there is no cartage.
 The jump is done if CF = 0.
 JNO INSTRUCTION
 Purpose: Conditional jump, and the state of the flags is taken into
account.
 Syntax:
 JNO label
 It jumps if there is no overflow.
 The jump is done if OF = 0.
 JNP (JPO) INSTRUCTION
 Purpose: Conditional jump, and the state of the flags is taken into
account.
 Syntax:
 JNP label
 It jumps if there is no parity or if the parity is uneven.
 The jump is done if PF = 0.
JNS INSTRUCTION

 Purpose: Conditional jump, and the state of the flags is

taken into account.
 Syntax:
 JNP label
 It jumps if the sign is deactivated.
 The jump is done if SF = 0.
JO INSTRUCTION

 Purpose: Conditional jump, and the state of the flags is taken into account.
 Syntax:
 JO label
 It jumps if there is overflow.
 The jump is done if OF = 1.
 JP (JPE) INSTRUCTION
 Purpose: Conditional jump, the state of the flags is taken into account.
 Syntax:
 JP label
 It jumps if there is parity or if the parity is even.
 The jump is done if PF = 1.
 JS INSTRUCTION
 Purpose: Conditional jump, and the state of the flags is taken into account.
 Syntax:
 JS label
 It jumps if the sign is on.
 The jump is done if SF = 1.
 MOV AX.MyData ; Set up our own data segment address
in DS
 MOV DS,AX ; Can't load segment reg. directly from
memory
 MyData, if you recall, contains the segment address of a segment
defined using the
 SEGMENT and ENDS directives. That address is first loaded into
AX, and then from
 AX the address is loaded into DS. This roundabout path is
necessary because the DS
 register cannot be loaded with either immediate data or memory data; it
must be loaded
 from one of the other registers.
Never forget that the assembler follows
its orders without
understanding them. It doesn't make inferences based on what you do to addresses or the
segment registers. It must be told which segment is to be used as the data segment, the
code segment, and the stack segment. Somewhere inside the assembler program is a little
table where the assembler "remembers" that segment MyData is to be considered the data
segment, and that segment MyCode is to be considered the code segment, and that
segment MyStack is to be considered the stack segment. It can't remember these
relationships, however, unless you first tell the assembler what they are somehow.
This somehow (for the data, code, and extra segments, at least) is the ASSUME
directive. The ASSUME directive in EAT.ASM tidily specifies that MyData is the data
segment and MyCode is the code segment.
Why is this important? It has to do with the way the assembler creates the binary opcodes
for a given instruction. When you write an instruction that addresses memory data like
this