Multiplexers and

Demultiplexers

BY UNSA SHAKIR
 Exercise:

• Solve by using K-map.

• Design a circuit using logic function.
 Exercise:

1. Implement the XOR function using only AND

and OR gates

2. Design a circuit using only truth tables and

logic function using AND, OR and NOT gates
 Multiplexer
(DATA SELECTOR)

A multiplexers (MUX) is a device that allows

digital information from several sources to be
routed onto a single line for transmission over
that line to a common destination.

MUX Types
 2-to-1 (1 select line)
 4-to-1 (2 select lines)
 8-to-1 (3 select lines)
 16-to-1 (4 select lines)
 Multiplexers
 A multiplexer has
 N control / select inputs
 2N data inputs
 1 output

 Selection input (N) determines the input that

should be connected to the output
Functional Diagram Of a Multiplexer
 2 : 1 Multiplexer

Figure : Logic diagram of 2x1 mux Figure : Schematic symbol of 2x1 mux

S Z
0 I0
1 I1
4-to-1 Multiplexer (MUX)
I0
I1

MUX
O
I2
I3

S1 S0

S1 S0 O

0 0 I0

0 1 I1

1 0 I2

1 1 I3
8 : 1 Multiplexer

S0 S1 S3 Z
0 0 0 I0
0 0 1 I1
0 1 0 I2
0 1 1 I3
1 0 0 I4
1 0 1 I5
1 1 0 I6
1 1 1 I7
8 : 1 Multiplexer
Multiplexer (Bus)

ECE 331 - Digital System Design

 Multiplexers

Exercise:

Design an 8-to-1 multiplexer using

• 4-to-1 multiplexer
• 2-to-1 multiplexer
8-to-1 multiplexer using
4-to-1 multiplexer
8-to-1 multiplexer using
2-to-1 multiplexer
8-to-1 multiplexer using
2-to-1 multiplexer
 Multiplexers

Exercise:

Design a 16-to-1 multiplexer using

4-to-1 multiplexers only.
16-to-1 multiplexer using
4-to-1 multiplexers
Enable Input
• It's often desirable to add an enable input EN to a
multiplexer. An enable input makes the multiplexer operate.

• It is like an on switch of your computer, when you connect

the power supply to cpu it has provision to start functioning.

• A digital logic circuit may have more than 1 enable pins.

• When EN = 0, the output LOW (depending on the specific

device).

• When EN = 1, the multiplexer performs its operation

depending on the selection line.
 Multiplexers as General Purpose Blocks
n-1
2 :1 multiplexer can implement any function of n variables

n-1 control variables; remaining variable is a data input to the mux

Example:
F(A,B,C) = m0 + m2 + m6 + m7
= A' B' C' + A' B C' + A B C' + A B C

= A' B' (C') + A' B (C') + A B' (0) + A B (1)

1 0 A B C F
0 1 0 0 0 1 C 0
1 2
C F
F 0 0 1 0 C 1 4:1
0 3 0
8:1 0 1 0 1 2 MUX
0 4 C 1
0 5
MUX 0 1 1 0 3
S1 S0
1 6 1 0 0 0
0 A B
1 7 S2 S1 S0 1 0 1 0
1 1 0 1
A B C 1
1 1 1 1
"Lookup Table"
 Multiplexers
• Efficient implementation:
Implementation Of Logic Functions
using Multiplexer
f(a, b, c) = a’b’c + ab
0 0
A B C F 1 1
0 0 0 0 0 2
0 0 1 1 0 3 8:1 MUX
0 1 0 0 F
0 4
0 1 1 0 0 5
1 0 0 0 1 6
1 0 1 0 1 7
1 1 0 1
1 1 1 1 S2 S1 S0
A B C
f(a, b, c) = a’b’c + ab

A B C O F
0 0 0 0 C 0
C
0 0 1 1 0 1 4:1 MUX
0 1 0 0 0 2 F
0
0 1 1 0 1 3
1 0 0 0
0
1 0 1 0
1 1 0 1
1 S1 S0
1 1 1 1
B C
 f(a, b, c) = F= A’B’C’D + A’B’CD + A’BC’D’ + AB’CD
+ ABC’D’ + ABC’D + ABCD’ +ABCD

A B C D O F
0 0 0 0 0
D
0 0 0 1 1
D 0
0 0 1 0 0
D
0 0 1 1 1 1
0 1 0 0 1 D’ 2
D’
0 1 0 1 0
0 1 1 0 0
0 3 8:1 MUX
0 F
0 1 1 1 0 4
1 0 0 0 0
0 5
1 0 0 1 0
1 0 1 0 0 1 6
D’
1 0 1 1 1 7
1 1 0 0 1
1
1 1 0 1 1
S2 S1 S0
1 1 1 0 1
1 A B C
1 1 1 1 1
 Example

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
 Example

0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
 4-1 Multiplexer (SOP circuit)

f = s1 s 0 w 0 + s 1 s 0 w 1 + s 1 s 0 w 2 + s 1 s 0 w 3
 Example
• Multiple functions of A, B, C
full decoder as for memory address
– F1 = A B C bits stored in memory
A B C
– F2 = A + B + C
– F3 = A' B' C' A'B'C'
– F4 = A' + B' + C' A'B'C
– F5 = A xor B xor C A'BC'
– F6 = A xnor B xnor C A'BC
AB'C'
A B C F1 F2 F3 F4 F5 F6
0 0 0 0 0 1 1 0 0 AB'C
0 0 1 0 1 0 1 1 1
ABC'
0 1 0 0 1 0 1 1 1
0 1 1 0 1 0 1 0 0 ABC
1 0 0 0 1 0 1 1 1
1 0 1 0 1 0 1 0 0
1 1 0 0 1 0 1 0 0
1 1 1 1 1 0 0 1 1 F1 F2 F3 F4 F5
F6
Truth Table for a 2-1 Multiplexer
 Let’s Derive the SOP form

s x1 x 2
s x1 x2

s x1 x 2

s x1 x2

f (s, x1, x2) = s x1 x2 + s x1 x2 + s x1 x2 + s x1 x2

 Let’s simplify this expression
f (s, x1, x2) = s x1 x2 + s x1 x2 + s x1 x2 + s x1 x2

f (s, x1, x2) = s x1 (x2 + x2) + s (x1 +x1 )x2

f (s, x1, x2) = s x1 + s x2

Circuit for 2-1 Multiplexer
x1 s

f x1 0
f
s x2 1
x2

(b) Circuit (c) Graphical symbol

f (s, x1, x2) = s x1 + s x2

 Demultiplexers
(Data Distributor)

A DEMULTIPLEXER (DEMUX) basically

reverses the multiplexing function. It
takes data from one line and distributes
them to a given number of output lines.
 Demultiplexers
 A demultiplexer has
 N control inputs
 1 data input
 2N outputs
 A demultiplexer routes (or connects) the data input to
the selected output.
 The value of the control inputs determines the output
that is selected.
 A demultiplexer performs the opposite function of a
multiplexer.
Multiplexer/ Demultiplexer for
information transmission
Functional Diagram Of a
Demultiplexer
 Demultiplexers
Out0 W W = A'.B'
Out1 X X = A.B'
I In Out2 Y
Out3 Z Y = A'.B
S1 S0 Z = A.B

A B
A B W X Y Z
0 0 I 0 0 0
0 1 0 I 0 0
1 0 0 0 I 0
1 1 0 0 0 I
1 : 2 Demultiplexer

S0 Y0 Y1
0 D 0
1 0 D
1-to-4 De-Multiplexer (DEMUX)
D0

DEMUX
D1
X
D2
D3

B A

B A D0 D1 D2 D3

0 0 X 0 0 0

0 1 0 X 0 0

1 0 0 0 X 0

1 1 0 0 0 X
1 : 8 Demultiplexer
1 : 8 Demultiplexer (Truth Table)
S0 S1 S3 D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 D 0 0 0 0 0 0 0
0 0 1 0 D 0 0 0 0 0 0
0 1 0 0 0 D 0 0 0 0 0
0 1 1 0 0 0 D 0 0 0 0
1 0 0 0 0 0 0 D 0 0 0
1 0 1 0 0 0 0 0 D 0 0
1 1 0 0 0 0 0 0 0 D 0
1 1 1 0 0 0 0 0 0 0 D
 Demultiplexers as General-purpose
Logic
• F1 = A' B C' D + A' B' C D + A B C D
• F2 = A B C' D’ + A B C
0 A'B'C'D'
• F3 = (A' + B' + C' + D') 1 A'B'C'D
2 A'B'CD' F1
3 A'B'CD
4 A'BC'D'
5 A'BC'D
6 A'BCD'
4:16 7 A'BCD
Enable DEC 8 AB'C'D' F2
9 AB'C'D
10 AB'CD'
11 AB'CD
12 ABC'D'
13 ABC'D
14 ABCD'
15 ABCD F3

A B C D