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20N50 Ogfd

This document provides information on the 20N50 N-Channel MOSFET from OGFD. Some key details: 1. The 20N50 uses advanced planar stripe DMOS technology and is tailored for low on-state resistance. 2. It is suited for applications requiring high-side switching and low power loss, such as cell phones and laptops. 3. Features include a maximum drain current of 20A, on-state resistance of 0.26ohms, and fast switching speed.

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0% found this document useful (0 votes)
207 views7 pages

20N50 Ogfd

This document provides information on the 20N50 N-Channel MOSFET from OGFD. Some key details: 1. The 20N50 uses advanced planar stripe DMOS technology and is tailored for low on-state resistance. 2. It is suited for applications requiring high-side switching and low power loss, such as cell phones and laptops. 3. Features include a maximum drain current of 20A, on-state resistance of 0.26ohms, and fast switching speed.

Uploaded by

oscar oscar
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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20N50

N-Channel MOSFETS

DESCRIPTION
The OGFD 20N50 is produced using advanced
V DSS RDS( ON ) ID
planar stripe DMOS technology. This high density

process is especially tailored to minimize on-state 500V 0.26Ω 20A

resistance.

These devices are particularly suited for low voltage

application such as cellular phone and notebook

computer power management and other battery

powered circuits where high-side switching and low

in-line power loss are needed in a very small outline


TO-3P
surface mount package.

Features

• 20.0A,500V,RDS(ON)=0.26 Ω@VGS =10V Ordering Information


• Low gate charge (typical 70Nc) PART NUMBER PACKAGE BRAND
• Fast switching
20N50 TO-3P 0GFD
• 100% avalanche tested

• Improved dv/dt capability

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20N50
Absolute Maximum Ratings (TC=25℃, unless otherwise noted)

Symbol Parameter 20N50 Units

V DSS Drain-to-Source Voltage 500 V


ID Continuous Drain Current 20
A
I DM Pulsed Drain Current@VG=10V 80
Power Dissipation 280 W
PD
Derating Factor above 25℃ 2.30 W/℃
V GS Gate-to-Source Voltage ± 30 V
E AS Single PulseAvalanche Energy (L=1mH, IAS=40A)C 1110 mJ
dv/dt Peak Diode Recovery dv/dt 4.5 V/ns
T J and TSTG Operating Junction and Storage Temperature Range -55 to 150 ℃

Thermal Resistance
Symbol Parameter Min. Typ. Max. Units Test Conditions

RθJC Junction-to-Case -- -- 0.44


Water cooled heatsink, PD adjusted for
a peak junction temperature of +175℃.
RθCS Case-to-Sink Typ -- 0.24 --
℃/W

RθJA Junction-to-Ambient -- -- 40 1 cubic foot chamber, free air.

OFF Characteristics TJ=25℃ unless otherwise specified


Symbol Parameter Min. Typ. Max. Units Test Conditions
Drain-to-Source Breakdown
B VDSS 500 -- -- V V GS=0, ID =250uA
Voltage
I GSS Gate-to-Source Forward Leakage -- -- 100 nA V DS=0V, V GS=30V

I DSS Zero Gate Voltage Drain Current -- -- 1 uA V DS=500V, VGS=0V

ON Characteristics TJ=25℃ unless otherwise specified


Uni
Symbol Parameter Min. Typ. Max Test Conditions
ts
Static Drain-to-Source
RDS(ON) -- 0.21 0.26 Ω VGS=10V,ID=10A
On-Resistance

V GS(TH) Gate Threshold Voltage, Figure 12. 2.0 -- 4.0 V VDS=10V, I D=250uA

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20N50
Dynamic Characteristics Essentially independent of operating temperature

Symbol Parameter Min. Typ. Max. Units Test Conditions

Ciss Input Capacitance -- 2700 --

V DS=25V,V GS=0V,
Coss Output Capacitance -- 400 -- pF
f=1.0MHZ

Crss Reverse Transfer Capacitance -- 40 340

Qg Total Gate Charge -- 70 --

VDS=400V, V GS=10V,
Qgs Gate-to-Source Charge -- 18 -- nC
I D=20A

Qgd Gate-to-Drain (“Miller”) Charge -- 35 --

Resistive Switching Characteristics Essentially independent of operating temperature

Symbol Parameter Min. Typ. Max. Units Test Conditions

T d(ON) Turn-on Delay Time 100 --

T rise Rise Time 400 --


V DD=250V, I D= 20.0A
ns
RG=25Ω
T d(OFF) Turn-Off Delay Time 100 --

T fall Fall Time 100 --

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20N50
Typical Characteristics

VGS
Top : 15.0 V
10.0 V
8.0 V
7.0 V
6.5 V
6.0 V

ID , Drain Current [A]


1 Bottom : 5.5 V 1
ID, Drain Current [A]

10 10

150℃

25℃
0
10
0
10
※ Notes : -55℃ ※ Notes :
1. 250µs Pulse Test 1. VDS = 50V
2. TC = 25℃ 2. 250µ s Pulse Test

-1
10
-1 0 1 0 2 4 6 8 10
10 10 10
VGS , Gate-Source Voltage [V]
VDS, Drain-Source Voltage [V]

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

1.0
IDR , Reverse Drain Current [A]
Drain-Source On-Resistance

0.8

VGS = 10V 10
1
RDS(ON) [Ω ],

0.6
VGS = 20V

0.4
0
10
150℃ 25℃
0.2 ※ Notes :
1. VGS = 0V
※ Note : TJ = 25℃ 2. 250µ s Pulse Test

-1
0.0 10
0 10 20 30 40 50 60 70 80 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
ID, Drain Current [A] VSD , Source-Drain Voltage [V]

Figure 3. On-Resistance Variation vs Figure 4. Body Diode Forward Voltage

6000 12
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd VDS = 100V
5000 Crss = Cgd 10
VGS, Gate-Source Voltage [V]

VDS = 250V

4000 Ciss 8 VDS = 400V


Capacitance [pF]

Coss
3000 6

2000 4
? Notes :
Crss 1. VGS = 0 V
2. f = 1 MHz
1000 2

? Note : ID = 20 A

0 -1 0
10 10
0
10
1 0 10 20 30 40 50 60 70 80

VDS, Drain-Source Voltage [V] QG, Total Gate Charge [nC]

Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics

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20N50
Typical Characteristics (Continued)

1.2 3.0
Drain-Source Breakdown Voltage

2.5

Drain-Source On-Resistance
1.1
BVDSS, (Normalized)

RDS(ON), (Normalized)
2.0

1.0 1.5

1.0

0.9 ※ Notes :
1. VGS = 0 V ※ Notes :
2. ID = 250 µA 0.5
1. VGS = 10 V
2. ID = 10.0 A

0.8 0.0
-100 -50 0 50 100 150 200 -100 -50 0 50 100 150 200
o
TJ, Junction Temperature [ C]
o TJ, Junction Temperature [ C]

Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation

20

Operation in This Area


2
is Limited by R DS(on)
10
16
10 µs
ID, Drain Current [A]

ID, Drain Current [A]

100 µs
1 ms 12
1
10 10 ms
DC
8

0
10
※ Notes :
o 4
1. TC = 25 C
o
2. TJ = 150 C
3. Single Pulse
-1
10 0
10
0
10
1
10
2 3
10 25 50 75 100 125 150

VDS, Drain-Source Voltage [V] TC, Case Temperature [℃]

Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs Case Temperature

Figure 11. Transient Thermal Response Curve

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20N50
Gate Charge Test Circuit & Waveform

VGS
SameType
50KΩ
asDUT Qg
12V 200nF
300nF 10V
VDS
VGS Qgs Qgd

DUT
3mA

Charge

Resistive Switching Test Circuit & Waveforms

R
L V
DS
V
DS 9
0%

V V
DD
GS
R
G

1
0%
V
GS
1
0V D
UT
td
(on
)
tr td
(off) tf
to
n
to
ff

Unclamped Inductive Switching Test Circuit & Waveforms

L B V
-1
-
--
DS S
2 --------------------
V E
AS= LI
A S
DS 2 B V DS S-V DD

B
VD SS
ID
IAS
R
G
V
DD ID(t)

1
0V D
UT V
DD V
DS(t)

tp
tp Tim
e

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20N50

Peak Diode Recovery dv/dt Test Circuit & Waveforms

D U T +

V D S

I S D
L

D r iv e r
R G
S am e T ype
as D U T V D D

V G S • d v / d t c o n t r o lle d b y R G
• I S D c o n t r o lle d b y p u ls e p e r io d

G a te P u ls e W id th
V GS D = --------------------------
G a t e P u ls e P e r io d 10V
( D r iv e r )

IF M , B o d y D io d e F o r w a r d C u r r e n t
I S D
( D U T ) d i/d t

IR M

B o d y D io d e R e v e r s e C u r r e n t
V DS
( D U T ) B o d y D io d e R e c o v e r y d v / d t

V S D
V D D

B o d y D io d e
F o r w a r d V o lt a g e D r o p

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