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This document contains 10 questions for an assignment on digital logic design. The questions cover topics such as implementing Boolean functions using multiplexers, decoders, and flip-flops. Multiple questions involve analyzing sequential circuits containing JK flip-flops to determine state equations, state tables, and state flow diagrams. The assignment is worth a total of 60 marks and was given on May 20, 2021 for the BCE-2 class at COMSATS University Islamabad.
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0% found this document useful (0 votes)
48 views2 pages

File 1621247801

This document contains 10 questions for an assignment on digital logic design. The questions cover topics such as implementing Boolean functions using multiplexers, decoders, and flip-flops. Multiple questions involve analyzing sequential circuits containing JK flip-flops to determine state equations, state tables, and state flow diagrams. The assignment is worth a total of 60 marks and was given on May 20, 2021 for the BCE-2 class at COMSATS University Islamabad.
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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COMSATS University Islamabad (CUI), Islamabad Campus.

Department of Electrical and Computer Engineering


Assignment No. 2
Class: BCE-2 Date: 20/05/2021
Subject: Digital Logic Design Total Marks: 60

Question No. 1: 5 Marks

A system has 4 input lines {A,B,C,D} and 1 output line {F}. The input lines {A, B, C} of the system are connected
to the selection lines {S2 , S1 , S0} of an 8×1 multiplexer, respectively. The connection configuration of data
input lines {i0, i1, … , i7 } of the multiplexer are given as follows:
i1= i2 = D; i3 = i5 =1; i0 =i6 = D' ; and i7 = i4 = 0
Determine the Boolean function that the output of the multiplexer implements. Also, provide a minimized SoP
expression for the obtained Boolean function F(A,B,C,D).
Question No. 2: 5 Marks
A system has 4 input lines {A,B,C,D} and 1 output line {F}. The input lines {A, B, C } of the system are
connected to the selection lines {S2 , S1 , S0} of an 8×1 multiplexer, respectively. The connection configuration
of data input lines {i0, i1, … , i7 } of the multiplexer are given as follows:
i1= i4 = D; i3 = i5 =1; i0 = i6 = 0; and i7 = i2 = D’
Determine the Boolean function that the output of the multiplexer implements. Also, provide a minimized PoS
expression for the obtained Boolean function F(A,B,C,D).
Question No. 3: 5 Marks
Implement the following Boolean function only by using 2x1 multiplexers only.
F(A,B,C,D) = ∑ (0,3,4,8,10,12,14,15)
Question No. 4: 5 Marks
Implement the following Boolean function only by using 16x1 multiplexers.
F(A,B,C,D) = ∑ (1,2,4,7,10,11,13,14)
Question No. 5: 5 Marks
Implement the following Boolean function only by using decoders and OR gate.
F(A,B,C,D) = ∑ (1,2,4,7,10,11,13,15)
Question No. 6: 5 Marks
Implement the Full-Adder only by using decoders and OR gate.
Question No. 7: 5 Marks
Using an SR latch and logic gates, design an SN-flipflop which has two input lines (S and N) and two output
lines (Q and Q’). The SN-flipflop operates according to the following characteristics table. Determine its
characteristics equations and draw its circuit diagram.

Inputs Outputs
Operation
S N Q(t+1) Q'(t+1)
0 0 Q’(t) Q(t) Toggle
0 1 Q(t) Q’(t) No-Change
1 0 1 0 Set
1 1 0 1 Reset
Question No. 8: 5 Marks

Using an SR latch and logic gates, design a TN-flipflop which has two input lines (T and N) and two output lines
(Q and Q’). The TN-flipflop operates according to the following characteristics table. Determine its
characteristics equation and draw its circuit diagram.

Inputs Outputs
Operation
T N Q(t+1) Q'(t+1)
0 0 1 0 Set
0 1 Q(t) Q’(t) No-Change
1 0 Q’(t) Q(t) Toggle
1 1 0 1 Reset

Question No. 9: 10 Marks

A sequential circuit containing two JK flipflops is shown in the figure below. The circuit has one input line x
and one output line Z. Analyze the circuit by determining its state equations and writing its state-table and state-
flow diagram.

 
Question No. 10: 10 Marks

A sequential circuit containing two JK flipflops is shown in the figure below. The circuit has one input line x
and one output line Z. Analyze the circuit by determining its state equations and writing its state-table and state-
flow diagram.

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