ANNEXURE 1

SRI VIDYA COLLEGE OF ENGINEERING & TECHNOLOGY, VIRUDHUNAGAR

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING
SYLLABUS FOR THE VALUE ADDED COURSE ON
PROGRAMMABLE LOGIC CONTROLL
(Designed for III Yr BE (EEE) Students)
Programmable logic controller LTPC 1001
OBJECTIVES:
 To Gain the Knowledge of various skills for Industrial applications of Programmable logic controller
(PLC)
 To Understand the basic programming concepts and various logical Instructions used in Programmable
logic controller (PLC)
 To solve the problems related to I/O module, Data Acquisition System using Standard Devices.
 To Design and analysis of general structure of an automated process for real time applications using
Programmable logic controller ( PLC )
UNIT I FUNDAMENTALS OF PLC 3
Definition of PLC, advantages, characteristics functions of a PLC, Chronological Evolution of PLC,
Types of PLC, Small PLC, Medium PLC, Large PLC, Block Diagram of PLC: Input/output (I/O)
section, Processor Section, Power supply, Memory central Processing Unit: Processor Software /
Executive Software, Ladder Language.
UNIT II BIT LOGIC INSTRUCTIONS 3
Input and Output contact program symbols, Numbering system of inputs and outputs, Program format,
introduction to logic: Equivalent Ladder diagram of AND gate, Equivalent ladder diagram of or Gate,
equivalents Ladder Diagram of NOT gate, equivalent ladder diagram of XOR gate, equivalent ladder
diagram of NAND gate, equivalent ladder diagram of NOR gate.
UNIT III PLC TIMERS 3
Introduction to timer, On Delay and OFF delay timers, Timer-on Delay, Timer off delay, Retentive and
non-retentive timers, Format of a timer instruction, equivalents Ladder Diagram of timer.
UNIT IV PLC COUNTERS 3
Introduction to Counter, Operation of PLC Counter, Counter Parameters, Counters Instructions
Overview Count up (CTU) ,Count down (CTD), equivalents Ladder Diagram of Counter.
UNIT V ADVANCED INSTRUCTIONS & PLC (I/O) MODULES 3
Comparison instructions, discussions on comparison instructions, “EQUAL” or “EQU” instruction,
“NOT EQUAL” or “NEQ” instruction, “LESS THAN” or “LESS” instruction. Classification of I/O, I/O
system overview, practical I/O system and its mapping addressing local and expansion I/O, input-output
systems TOTAL: 15 PERIODS
OUTCOMES:
 Ability to Understand the basic programming concepts and various logical Instructions used in
Programmable logic controller (PLC).
 Ability to Compute the extent and nature of electronic circuitry in Programmable logic controller (PLC)
 Ability to Design and analyze the general structure of an automated process for real time
industrial applications
TEXT BOOKS:
1. “PLC and Industrial application”, Madhuchhandan Gupts and Samarjit Sen Gupta, pernram international
pub. (Indian) Pvt. Ltd., 2011
REFERENCES
1.GaryDunning,”Introduction to Programmable Logic Controllers”, Thomson,2nd Edition.
2.John W Webb, Ronald A Reis,”Programmable Logic Controllers: Principles and Application”, PHI
Learning,Newdelhi, 5th Edition
 ANNEXURE2

SRI VIDYA COLLEGE OF ENGINEERING & TECHNOLOGY, VIRUDHUNAGAR

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

VALUE ADDED COURSE ON

PROGRAMMABLE LOGIC CONTROLLER
COURSE TIMETABLE

Chapters to be covered
Day Date
Theory (9.30 am-12.30 am)
FUNDAMENTALS OF PLC:
Types of PLC, Block Diagram of PLC: Input/output (I/O) section, Processor
1 25.11.19
Section, Power supply, Memory central Processing Unit: Processor Software ,
Ladder Language
BIT LOGIC INSTRUCTIONS :
2
26.11.19 Input and Output contact program symbols, Program format, and introduction
to logic gate-Equivalent Ladder diagram of all gates.
PLC TIMERS :
3 27.11.19 Timer-on Delay, Timer off delay, Retentive and non-retentive timers, Format of
a timer instruction, equivalents Ladder Diagram of timers.
PLC COUNTERS:
4 28.11.19 Operation of PLC Counter, Counters Instructions, Overview Count up (CTU),
Countdown (CTD), equivalents Ladder Diagram of Counter.
ADVANCED INSTRUCTIONS & PLC I/O) MODULES:
Discussions on comparison instructions, “EQUAL” or “EQU” instruction,
5 29.11.19 “NOT EQUAL” or “NEQ” instruction, “LESS THAN” or “LESS” instruction,
I/O system overview, practical I/O system and its mapping addressing local and
expansion I/O.

Total periods to be conducted: 15 periods

 ANNEXURE 3

SRI VIDYA COLLEGE OF ENGINEERING & TECHNOLOGY, VIRUDHUNAGAR

DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINEERING

VALUE ADDED COURSE ON

PROGRAMMABLE LOGIC CONTROLLER

A. List of Faculty’s involved:

Course Instructor Mr.K.Padukolai, Associate Professor/ EEE

Senior faculty member nominated by the Principal Mrs. J.R.Bindhu Associate Professor/ EEE
Head of the department Mr.P.I.D.T.Baladurai kannan, Assistant
Professor / EEE

B. List of students enrolled:

S.No Register No. Name S.No Register No. Name

1. 922017105001 ARCHANA R 21 922017105023 PRAVEEN KUMAR P S

2. 922017105002 DINESHKUMAR S 22 922017105024 PRIYADHARSHINI.P
3. 922017105003 EZHILARASI M 23 922017105025 RATHINAVEL J
4. 922017105004 GAYATHRI R 24 922017105027 SANGILI MUNIARASAN.M
5. 922017105005 GURULAKSHMI K 25 922017105030 SATHISH G
6. 922017105006 GURUPRASATH.G.K 26 922017105031 SELVA KUMAR C
7. 922017105007 HARIHARAN B 27 922017105032 SELVAMUNIYANDI G
8. 922017105008 JEGATHEESWARI K 28 922017105034 SIVA E
9. 922017105009 KARTHICK M 29 922017105035 SURESH KUMAR S
10. 922017105010 MAHESWARAN M 30 922017105036 UMA RANI S
11. 922017105011 MANIKANDAN V 31 922017105037 VAIRAVASAMY S
12. 922017105012 MANOJKUMAR S 32 922017105038 VASANTH S
13. 922017105013 MANONMANI L 33 922017105040 VIJAYALAKSHMI M
14. 922017105015 MAREESWARAN M 34 922017105041 YOGAMALAR J
15. 922017105016 MAREESWARI P 35 922017105301 P.KARUPPASAMY
16. 922017105017 MARISAMY P 36 922017105302 M.MAREESHWARI
17. 922017105019 MUTHARASELVI M 37 922017105304 S.PANDIYA RAJAN
18. 922017105020 MUTHUPRIYA M 38 922017105305 L.SURIYA
19. 922017105021 NAGAIYA J 39 922017105306 K.VIJAYA KUMAR
20. 922017105022 PANDI SELVI P

HOD/EEE PRINCIPAL
 12/11/19

To,

The Director,
Centre for Academic Courses,
Anna University, Chennai - 600 025.

Respected Professor,
Sub: Conduct of Value Added Course for the UG Programme Approval requested-reg

******
Greeting from Sri Vidya College of Engineering and Technology

As per the clause 4.7 of Regulations 2017 for the UG programmes, we have planned to offer Value
Added Course to the third year B.E – Electrical and Electronics Engineering students of our institution as per
the details given below:

Title of the Course : Programmable Logic Controller

Course Instructor : Mr.K.Padukolai, Associate Professor / EEE
Course Duration : 15 Hrs
No of Credits to be earned : 1 credit
Course Schedule:
Start Date : 25.11.19
End Date : 29.11.19

The conduct of this Value Added Course has been approved by the head of the institution as the
same clause 4.7 in the Regulation 2017. We are submitting the following details for your kind approval,
please.

1. Syllabus 2. Time Table 3.Details of Faculty involved and Student enrolled

We look forward to your response at the earliest.

Thanking you

Yours faith fully

PRINCIPAL

Copy Submitted to:

The controller of Examinations, Anna University, Chennei - 600 025