CE COMPUTER ARCHITECTURE

CHAPTER 3

ARITHMETIC FOR COMPUTERS

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CE Arithmetic for Computers

1. Introduction

2. Addition and Subtraction

3. Multiplication

4. Division

5. Floating Point

6. Parallelism and Computer Arithmetic: Associativity

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CE Arithmetic for Computers

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CE Arithmetic for Computers

1. Introduction

2. Addition and Subtraction

3. Multiplication

4. Division

5. Floating Point

6. Parallelism and Computer Arithmetic: Associativity

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CE Introduction

Computer words are composed of bits; thus, words can be represented as

binary numbers. Chapter 2 shows that integers can be represented either in
decimal or binary form, but what about the other numbers that
commonly occur?

For example:

■ What about fractions and other real numbers?

■ What happens if an operation creates a number bigger than can be

represented?

■ And underlying these questions is a mystery: How does hardware

really multiply or divide numbers?

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CE Arithmetic for Computers

1. Introduction

2. Addition and Subtraction

3. Multiplication

4. Division

5. Floating Point

6. Parallelism and Computer Arithmetic: Associativity

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CE Addition and Subtraction

Addition:

Binary addition, showing carries from right to left

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CE Addition and Subtraction

Subtraction:

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CE Addition and Subtraction

Overflow
When does the overflow occur on the signed number?

We also need to concern:

- How to detect overflow for two’s complement numbers in a computer?

- What about overflow with unsigned integers? (Unsigned integers are

commonly used for memory addresses where overflows are ignored.)

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 CE Addition and Subtraction
Overflow
 The computer designer must therefore provide a way to ignore overflow in
some cases and to recognize it in others.
 The MIPS solution is to have two kinds of arithmetic instructions to recognize the two
choices:
■ Add (add), add immediate (addi), and subtract (sub) cause exceptions (interrupt)
on overflow.
■ Add unsigned (addu), add immediate unsigned (addiu), and subtract unsigned
(subu) do not cause exceptions on overflow.

Note: MIPS detects overflow with an exception, also called an interrupt on many
computers. An exception or interrupt is essentially an unscheduled procedure call.

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CE Arithmetic for Computers

1. Introduction

2. Addition and Subtraction

3. Multiplication

4. Division

5. Floating Point

6. Parallelism and Computer Arithmetic: Associativity

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 CE Multiplication

Example

Although the decimal example above happens to use only 0 and 1, multiplication of
binary numbers must always use 0 and 1, and thus always offers only these two choices:

1. Just place a copy of the multiplicand (1 ×multiplicand) in the proper place if the
multiplier digit is a 1.

2. Place 0 (0 ×multiplicand) in the proper place if the multiplier digit is 0.

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 CE Multiplication
Sequential Version of the Multiplication Algorithm and Hardware

Fig.1: First version of the division hardware

Note: Three steps are repeated 32 times to obtain the

product. If each step took a clock cycle, this algorithm
would require almost 100 clock cycles to multiply two
32-bit numbers.
Fig.2: The first multiplication algorithm 13
 CE Multiplication
Sequential Version of the Multiplication Algorithm and Hardware
Example:

Answer: Step by step follow the multiplication algorithm

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 CE Multiplication

Sequential Version of the Multiplication Algorithm and Hardware

Fig.3 Refine version of the multiplication hardware

 Compare with the first version in the previous slide, the Multiplicand register, ALU, and
Multiplier register are all 32 bits wide, with only the Product register left at 64 bits.

 It just takes one clock cycle to get the Product.

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 CE Multiplication

Signed Multiplication

 The easiest way to understand how to deal with signed numbers is to first
convert the multiplier and multiplicand to positive numbers and then
remember the original signs.

 The algorithms should then be run for 31 iterations, leaving the signs out of
the calculation.

 It turns out that the last algorithm will work for signed numbers.

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 CE Multiplication

Faster Multiplication

Fig.4 Fast multiplication hardware.

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 CE Multiplication

Multiply in MIPS

 MIPS provides a separate pair of 32-bit registers to contain the 64-bit

product, called Hi and Lo.

 To produce a properly signed or unsigned product, MIPS has two instructions:

multiply (mult) and multiply unsigned (multu).

 To fetch the integer 32-bit product, the programmer uses move from lo (mflo).
The MIPS assembler generates a pseudo instruction for multiply that specifies three
general purpose registers, generating mflo and mfhi instructions to place the product into
registers.

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CE Arithmetic for Computers

1. Introduction

2. Addition and Subtraction

3. Multiplication

4. Division

5. Floating Point

6. Parallelism and Computer Arithmetic: Associativity

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 CE Division

 The reciprocal operation of multiply is divide, an operation that is even less

frequent and even more quirky.
 It even offers the opportunity to perform a mathematically invalid operation:
dividing by 0.
Example:

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 CE Division

A division algorithm and hardware

Fig.5 First version of the multiplication hardware

Note: both the dividend and the divisor are positive

and hence the quotient and the remainder are
nonnegative. The division operands and both results
are 32-bit values, and we will ignore the sign for now.
Fig.6 The first division algorithm 21
 CE Division
The division algorithm and hardware
Example:

Answer: Step by step follow the multiplication algorithm

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 CE Division

A faster division hardware

Fig.7 The improved version of the division hardware

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 CE Division

Signed division
 The simplest solution is to remember the signs of the divisor and dividend and then
negate the quotient if the signs disagree.

 The one complication of signed division is that we must also set the sign of the
remainder. Remember that the following equation must always hold:

Dividend = Quotient x Divisor + Remainder

 Remainder = Dividend – (Quotient x Divisor)

Example:

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 CE Division

Divide in MIPS
 You may have already observed that the same sequential hardware can be used for
both multiply and divide in Fig.3 and Fig.7 .

 The only requirement is a 64-bit register that can shift left or right and a 32-bit ALU
that adds or subtracts. Hence, MIPS uses the 32-bit Hi and 32-bit Lo registers for both
multiply and divide.

 As we might expect from the algorithm above, Hi contains the remainder, and Lo
contains the quotient after the divide instruction completes.

 To handle both signed integers and unsigned integers, MIPS has two instructions:
divide (div) and divide unsigned (divu).

 The MIPS assembler allows divide instructions to specify three registers, generating
the mflo or mfhi instructions to place the desired result into a general-purpose register.
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CE Arithmetic for Computers

1. Introduction

2. Addition and Subtraction

3. Multiplication

4. Division

5. Floating Point

6. Parallelism and Computer Arithmetic: Associativity

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 CE Floating Point
Definitions
Some representations of the real number:

 The alternative notation for the above last two numbers is called scientific
notation, which has a single digit to the left of the decimal point.
 A number in scientific notation that has no leading 0s is called a normalized number
Example: 1.0ten x 10-9: normalized scientific number
0.1ten x 10-8: not normalized scientific number
10.0ten x 10-10: not normalized scientific number
 The binary number shown in scientific notation is called floating point

Floating point: Computer arithmetic that represents numbers in which the binary point is
not fixed. 27
 CE Floating Point
Floating-Point representation
 A designer of a floating-point representation must find a compromise between the size
of the fraction and the size of the exponent.
This tradeoff is between precision and range:
- Increasing the size of the fraction enhances the precision of the fraction.
- Increasing the size of the exponent increases the range of numbers that can be
represented.
 Floating-point numbers are usually a multiple of the size of a word.
The representation of a MIPS floating-point number:

Where
s is the sign of the floating-point number (1 meaning negative)
exponent is the value of the 8-bit exponent field (including the sign of the exponent)
fraction is the 23-bit number
This representation is called sign and magnitude, since the sign is a separate bit from the
rest of the number.
In general, floating-point numbers are of the form: 28
 CE Floating Point
Floating-Point representation
 Overflow (floating-point): A situation in which a positive exponent becomes too large to
fit in the exponent field.
 Underflow (floating-point): A situation in which a negative exponent becomes too large
to fit in the exponent field.
To reduce chances of underflow or overflow is to offer another format that has a larger
exponent. In C this number is called double, and operations on doubles are called double
precision floating-point arithmetic; single precision floating-point is the name of the format
in previous slide.
Double precision: A floating-point value represented in two 32-bit words.
Single precision: A floating-point value represented in a single 32-bit word.
The representation of a double precision floating-point number:

Where: s is the sign of the floating-point number (1 meaning negative)

exponent is the value of the 11-bit exponent field (including the sign of the exponent)
fraction is the 52-bit number 29
 CE Floating Point
Floating-Point representation
 These above formats go beyond MIPS. They are part of the IEEE 754 floating-point
standard (IEEE 754), found in virtually every computer invented since 1980.

 To pack even more bits into the significand (also coefficient or mantissa is part of a
number in scientific notation), IEEE 754 makes the leading 1-bit of normalized binary
numbers implicit. Hence, the number is actually 24 bits long in single precision (implied 1
and a 23-bit fraction), and 53 bits long in double precision (1 +52).

Note: To be precise, we use the term significand to represent the 24- or 53-bit number
that is 1 plus the fraction, and fraction when we mean the 23- or 52-bit number.

 The representation of the rest of the numbers uses the form from before with the hidden 1
added

where the bits of the fraction represent a number between 0 and 1 and E specifies the value
in the exponent field. If we number the bits of the fraction from left to rights1, s2, s3, . . .
,then the value is:

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 CE Floating Point
Floating-Point representation
 Negative exponents pose a challenge to simplified sorting. If we use two’s complement or
any other notation in which negative exponents have a 1 in the most significant bit of the
exponent field.
Example:

 1.0two x 2-1 would be represented with a negative exponent will look like a big number.

 1.0two x 2+1 would be represented with a negative exponent will look like the smaller
number.

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 CE Floating Point
Floating-Point representation
 The desirable notation must therefore represent the most negative exponent as 00 . . . 00two
and the most positive as 11 . . . 11two. This convention is called biased notation, with the
bias being the number subtracted from the normal, unsigned representation to determine
the real value.
 IEEE 754 uses a bias of 127 for single precision, so an exponent of -1 is represented by
the bit pattern of the value (-1 + 127ten ), or 126ten = 0111 1110two , and +1 is represented
by (1+127), or 128ten = 1000 0000two .
 The exponent bias for double precision is 1023.
 Importance: Biased exponent means that value represented by a floating-point
number is really:

The range of single precision number is from

as small as

to as large as

Fig.8: IEEE 754 encoding of floating-point numbers 32

 CE Floating Point
Floating-Point representation
Example 1:

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 CE Floating Point
Floating-Point representation
Answer1:

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 CE Floating Point
Floating-Point representation
Answer1:

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 CE Floating Point
Floating-Point representation
Example 2: Converting Binary to Decimal Floating-Point

Answer 2:

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 CE Floating Point
Floating-Point addition
Let’s add numbers in scientific notation by hand to illustrate the problem in floating-
point addition: 9.999ten x 101 + 1.610ten x 10-1. Assume that we can store only four
decimal digits of the significand and two decimal digits of the exponent.

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 CE Floating Point
Floating-Point addition

Note: check for overflow or underflow

 the exponent still fits in its field

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 CE Floating Point
Floating-Point addition

The algorithm for binary

floating-point addition.

Fig.9 The algorithm for binary

floating-point addition. 39
 CE Floating Point
Floating-Point addition

Example: Try adding the number 0.5ten and -0.4375ten in binary using the algorithm in Fig.9

Answer:

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 CE Floating Point
Floating-Point addition
Answer:

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 CE Floating Point
Floating-Point addition

Hardware
Architecture:

Fig.10 Block diagram of an

arithmetic unit dedicated to
floating-point addition. 42
 CE Floating Point
Floating-Point multiplication
Example 1: Let’s try floating-point multiplication. We start by multiplying decimal numbers
in scientific notation by hand: 1.110ten x 1010 * 9.200ten x 10-5. Assume that we can store
only four decimal digits of the significand and two decimal digits of the exponent.
Answer 1:

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 CE Floating Point
Floating-Point multiplication

Note: check for overflow or underflow

 the exponent still fits in its field
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 CE Floating Point
Floating-Point multiplication

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 CE Floating Point
Floating-Point multiplication

The algorithm for binary

floating-point multiplication
have 5 steps like the answer
section in the Example 1 in
this sector.

Fig.11 The algorithm for binary

floating-point multiplication. 46
 CE Floating Point
Floating-Point multiplication
Example 2: Binary Floating-Point multiplication. Let’s try multiplying the number 0.5ten
and -0.4375ten.
Answer 2:

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 CE Floating Point
Floating-Point multiplication
Answer 2:

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 CE Floating Point
Floating-Point instruction in MIPS

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 CE Floating Point
Floating-Point instruction in MIPS

 Floating-point comparison sets a bit to true or false, depending on the comparison

condition, and a floating-point branch then decides whether or not to branch depending
on the condition.

 The MIPS designers decided to add separate floating-point registers ̶ called

$f0, $f1, $f2, … ̶ used either for single precision or double precision  they included
separate loads and stores for floating-point registers: lwcl and swcl.

 The base registers for floating-point data transfers remain integer registers. The MIPS
code to load two single precision numbers from memory, add them, and then store the
sum might look like below:

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 CE Floating Point
Floating-Point instruction in MIPS

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Fig.12 MIPS floating-point architecture
 CE Floating Point
Floating-Point instruction in MIPS

Fig.13 MIPS floating-point architecture (cont.)

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 CE Floating Point
Floating-
Point
instruction
in MIPS

Fig.14 MIPS
floating-point
instruction
encoding
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 CE Floating Point
Accurate Arithmetic

 Unlike integers, which can represent exactly every number between the smallest and
largest number, floating-point numbers are normally approximations for a number they
can’t really represent.

 The reason is that an infinite variety of real numbers exists between, say, 0 and 1, but no
more than 253 can be represented exactly in double precision floating point. The best we
can do is getting the floating-point representation close to the actual number.
Thus, IEEE 754 offers several modes of rounding to let the programmer pick the
desired approximation.

 Rounding sounds simple enough, but to round accurately requires the hardware to
include extra bits in the calculation. IEEE 754, therefore, always keeps two extra bits on
the right during intermediate additions, called guard and round, respectively.

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