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Ravi Sharma Res

Ravi Sharma has over 10 years of experience in FPGA design, verification, and embedded systems development. He has worked with Xilinx and Altera FPGAs and tools on projects involving wireless SOC design, PCIe switches, and server product prototyping. His background includes FPGA modeling, RTL implementation, simulation, synthesis, and debugging. He holds a certificate in embedded systems from UCSC Extension and has an MS in Computer Engineering from the University of Michigan.

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Sunny Modi
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0% found this document useful (0 votes)
99 views2 pages

Ravi Sharma Res

Ravi Sharma has over 10 years of experience in FPGA design, verification, and embedded systems development. He has worked with Xilinx and Altera FPGAs and tools on projects involving wireless SOC design, PCIe switches, and server product prototyping. His background includes FPGA modeling, RTL implementation, simulation, synthesis, and debugging. He holds a certificate in embedded systems from UCSC Extension and has an MS in Computer Engineering from the University of Michigan.

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Sunny Modi
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RAVI SHARMA

Santa Clara, CA
(408) 594-5334 [email protected]

Summary of Qualifications
 Experience in ASIC and FPGA design, verification and application including embedded systems
development on Xilinx / Altera FPGA boards.
 Development of wireless (wifi) SOC. Design, simulation and implementation of FPGA using
Xilinx and Altera tools, Verilog, VHDL, ModelSim, Place and Route using Xilinx ISE, Used
Xilinx Vivado and Altera Quartus.
 Hands-on experience with PCIe, AMBA AHB/APB Bus, AMBA Peripherals. Graphics
processor, DDR2, Interrupt Controller, DMAC, UART, Timers, watchdog timer, GPIO, audio
module, Internet Processor, Audio/Video serial bus interface, NC Verilog. Worked on Digital
Signal Processing related development on FPGA and MATLAB. Perl scripting, git, make etc.
Experience
FPGA Hardware Engineer 2019 - Present
Aditi Consulting / Altran - Santa Clara, CA
 FPGA modeling / prototyping for HAPS.
 Exercising Vivado Xilinx tool flow for the USB4 FPGA emulation platform.
 Ran verification on the FPGA/RTL emulated design.
 Logic design and integration of server products prototyping SOC using Xilinx / Altera.
 Working with the existing design environment and exercising internal tool flow for the design.
Embedded Systems Certificate, UCSC Ext 2016 – 2017
 Courses include design with Xilinx FPGA on Digilent board, Vivado Webpack,
SystemVerilog based design, VCS simulation, Embedded Linux Design, Signal Integrity.

FPGA Design Engineer 2013 - 2014


PLX Technology - Sunnyvale, CA
 Prototyping PCIe switch ASIC on Altera Stratix FPGA. Created Emulation/FPGA from an RTL
design.
 The work involved RTL implementation of PLX PCIe switch on Altera FPGA, simulation,
synthesis, and timing analysis.
 Supported validation on FPGA board with application software, emulation bring-up.
 Validating the FPGA RTL on the board for host-to-host communication, IO sharing using 10
GbE Ethernet Controller.
 Brought an exceptional aptitude in ASIC emulation, validation, FPGA board bring-up, debug for
PCIe switch prototyping.
System Validation Engineer 2013
Microsemi – San Jose, CA
 System Validation of different use models on Prototyping SOC-FPGA involving design
implementation and debugging the software on IAR.
Hardware Design Engineer 2012
Intel - Santa Clara, CA
 Development of wireless (wi-fi) SOC, RTL design, simulation, synthesis, and validation of SPI
interface for flash boot-up of the wireless SOC with the firmware on Virtex-6 FPGA.
 Integration, design modification and verification of SOC modules for WLAN SOC- The modules
include Digital front-end transmitter for polar transmitter, SDIO IP.
 DFE work involved modification and verification of the RTL design for polar mode.
 SDIO work involved verification of the IP, integration into SOC.

Sr. FPGA Application Engineer 2007 - 2009


XILINX - San Jose, CA
 Implemented Embedded Reference design on Virtex-5 FPGA with Power PC and MicroBlaze.
 Built Linux kernel, verified software applications including Flash read/write/erase on the board.
 Built reference designs on MicroBlaze embedded system to control LEDs, switches, and other
peripherals on the Spartan-3E starter kit.
 Ported power telemetry demo to the Spartan3E board and wrote C application to simulate SPI
read/write access to control the i2c interface of the digital power measurement IC.
 Implemented dual MicroBlaze design on Spartan-3A-DSP with Ethernet, UART, DVI IPs.
 Place and Route and Static Timing Analysis, resolved timing errors, built Petalogix kernel and
tested DVI Controller IP, debugged using Chipscope and oscilloscope.

ASIC/FPGA Sr. Design Engineer 2006 – 2007


Applause Technology -Sunnyvale, CA
 Designed AMBA Bus Matrix, AHB Bus integration of Master and slave devices of the video
application SOC. Design and implemented memory map for ARM9 based SOC slave devices.
 Integrated peripherals from AMBA design kit and performed RTL modification and system level
verification of AHB DMAC, DDR2 controller and APB peripherals (UART, Timers, watchdog
timer, GPIO, audio module), Interrupt controller on FPGA and SOC.
 Performed RTL design of peripherals, and development of test cases with the ARM9 processor in
C as well as the ARM bus functional model. Verification of graphics processor block and movie
decoder block on AMBA AHB bus using Verilog simulation and bus functional models.
 Performed synthesis and static timing analysis of AMBA bus peripherals, AHB bus matrix.
Helped in creation of simulation environment, test vectors, post-simulation data capture,
regression tests.

FPGA Development Engineer 2005 – 2006


DRC - Santa Clara, CA
 Performed FFT core simulation and designed user logic interface for the FFT core on Virtex-4.
Implemented FPGA VHDL design and simulation.
 Timing analysis and closure at 200 MHz.
 Developed test bench and verified with the software FFT result.

Education
Certificate in Embedded Systems, UCSC Ext.
MS, Computer Engineering, University of Michigan, Ann Arbor
B. tech, Electronics Engineering, Institute of Technology, Varanasi, India

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