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DLM Lab 2

This document discusses designing and verifying various digital logic circuits including: 1) Verifying Boolean expressions through simplification and experimental validation. 2) Designing half adders, full adders, half subtractors, and full subtractors using gates like XOR and AND and verifying them using Multisim simulation software. 3) Implementing Boolean functions using multiplexers and designing decoders like a 3x8 decoder and testing them on Multisim.

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41 views25 pages

DLM Lab 2

This document discusses designing and verifying various digital logic circuits including: 1) Verifying Boolean expressions through simplification and experimental validation. 2) Designing half adders, full adders, half subtractors, and full subtractors using gates like XOR and AND and verifying them using Multisim simulation software. 3) Implementing Boolean functions using multiplexers and designing decoders like a 3x8 decoder and testing them on Multisim.

Uploaded by

gnananvesh
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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DIGITAL LOGIC AND MICROPROCESSOR

DIGITAL ASSIGNMENT-1

2) verification of Boolean expressions:

a) X+X’Y=X+Y
b) X’+XY=X’+Y

c) AB+A’C+BC=AB+A’C
3) Simplify the expression to minimum number of literals and
verify the simplified expression experimentally

a) (a + b + c’)(a’+ b’ + c)
b) (x + y) (x + y’)
4) Write the following Boolean expressions in Standard
Sum of Products form:
(b + d)(a’ + b’ + c)
5) Write the following Boolean expression in Standard
Product of Sums form:
a'b + a ‘c ‘ + abc
6) Simplify the following Boolean functions:
a) F(A, B, C, D) = ∏(1, 3, 5, 7, 13, 15)

b) F(A, B, C, D) = ∑(1, 3, 6, 9, 11, 12, 14)


7) Simplify the following functions, and implement them
NAND and NOR gate circuits:
F(A, B, C, D) = AC’D’ + A’C + ABC + AB’C +
A’C’D’

8) Design a Half adder and verify the circuit using Multisim


using XOR and AND:
9) Design a Full adder and verify the circuit using Multisim.
10) Design a Half Subtractor and verify the circuit using
Multisim.

Half Subtractor Truth Table

Inputs Outputs

X Y D B-out
0 0 0 0
0 1 1 1
1 0 1 0
1 1 0 0
11) Design a Full Subtractor and verify the circuit using
Multisim
12) Implement the following function using 8x1 Multiplexer

F(A,B,C,D)=Σ (0,1,3,4,8,9,15)
13) Design a 3x8 decoder and verify the circuit using Multisim.

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