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DLD Lab 5 (21-CP-85)

This lab report describes an experiment to minimize Boolean functions using Karnaugh maps and implement the simplified logic circuits using basic gates. The objectives are to simplify given expressions using K-maps and realize the solutions with gates. Two Boolean functions are minimized: F= 1100+1101+1001+1111+1011+1110+1010 simplifies to AB+AD+AC, and Y= XYZ’+XY’Z’+XYZ+X’YZ+XYZ’+X’YZ’+XY’Z+X’Y’Z+XYZ+XYZ’ simplifies to X+Z+Y. The circuits are then simulated and implemented on a trainer board, with the logic gates verified using truth tables. The conclusion is

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Raja Saad
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48 views8 pages

DLD Lab 5 (21-CP-85)

This lab report describes an experiment to minimize Boolean functions using Karnaugh maps and implement the simplified logic circuits using basic gates. The objectives are to simplify given expressions using K-maps and realize the solutions with gates. Two Boolean functions are minimized: F= 1100+1101+1001+1111+1011+1110+1010 simplifies to AB+AD+AC, and Y= XYZ’+XY’Z’+XYZ+X’YZ+XYZ’+X’YZ’+XY’Z+X’Y’Z+XYZ+XYZ’ simplifies to X+Z+Y. The circuits are then simulated and implemented on a trainer board, with the logic gates verified using truth tables. The conclusion is

Uploaded by

Raja Saad
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as DOCX, PDF, TXT or read online on Scribd
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UNIVERSITY OF ENGINEERING AND

TECHNOLOGY, TAXILA

Lab Report 5
Digital Logic Design Lab
Name: Raja Saad Ikram

Reg No: 21-CP-85

Section: Alpha

Department: Computer Engineering

Due Date: 5/27/2022


EXPERIMENT #5
Simplification of Boolean Function using K-MAP

Objective:
To simplify the given expression using K-MAP and to realize it using Basic gates and Universal
gates
Apparatus List:
➢ Breadboard
➢ Connecting wires
➢ IC 7408, IC 7406 IC 7402, IC 7432
➢ Multusim
➢ Training Board

Procedure and/or Design Methodology:

❖ Check the components for their working.


❖ Insert the appropriate IC into the IC base.
❖ Make connections wires as shown in the circuit diagram using jumper wires.
❖ Provide the input data via the input switches and observe the output-on-output LEDs.
❖ Verify the Truth Tables of each logic gate.

Logic Diagram, Truth tables, Boolean Expression of logic gates are given below:

LAB Tasks 1:

1. Minimize the Following Boolean Expression using K-MAP and implement it on


trainer board.

F= 1100+1101+1001+1111+1011+1110+1010

K—MAP:
Grouping in K-MAP:

Simplified Boolean Expression:


AB+AD+AC

*/
Simulation:
LAB Tasks 2:
2. Minimize the Following Boolean Expression using K-MAP and implement it on
Trainer Board

Rewriting with missing terms:

Y=XYZ’+XY’Z’+XYZ+X’YZ+XYZ’+X’YZ’+XY’Z+X’Y’Z+XYZ+XYZ’

Y= 110+100+111+011+110+010+101+001+111+110

K—MAP:
Y=X+Z+Y

Truth Table:

Simulations:
➢ Work in LAB:
Results:

The output of each gate verified by its truth table. When input is given it is 1 in truth table
and when led is turned ON it is 1 output in truth table. Circuit diagrams from Boolean
expression are drawn. In simple we convert Boolean expressions into circuit diagrams.

Conclusion:
In this lab we have to Minimize large Boolean expressions to simple form Using K-MAP and
develop a logic circuit for that output verify truth tables of that logic circuits. We use ICs
respected to the task output and implement it in breadboard, give power to ICs through 14 th
pin (Vcc) and 7th (Ground) pin of ICs then we use switches of Training Board for switching
and Power and We are able to solve the functions and satisfied the truth table of result of each
of the function.
It gives different inputs to it and observing its output through the LED this lab was easy to
complete and now have agreater understanding of how Karnaugh mapping works along with
how important it is tounderstand for digital logics

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