Digital Electronics

EE008-3-2-DE / VE2

Introduction and Overview

 LECTURER INFORMATION

Lecturer Name:
Dr. Chandrasekharan Nataraj

Email:
[email protected]

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 2

 OUTCOME BASED EDUCATION

• OBE is a model of education that rejects the traditional

focus on what the school provides to students, in favour of
making students demonstrate that they "know and are
able to do" whatever the required outcomes are.

• The emphasis shifted from being overly prescriptive and

focused on curricula and educational processes, to
“outcomes” (“graduate attributes”).

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 3

 CONSTRUCTIVE ALIGNMENT

• Refers to a coherence between the LOs, Teaching

Strategies and Assessment Methods.

• Requires top-down alignment.

UNIVERSITY’S SCHOOL’S PROGRAMME

VISION & VISION & EDUCATIONAL
MISSION MISSION OBJECTIVE
PROGRAMME
OUTCOMES
ASSESSMENT TEACHING LEARNING
METHODS STRATEGIES OUTCOMES

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 4

 APU’S VISION AND MISSION

• Vision - To be a leading university of technology and

innovation transforming students into highly employable,
competent and future-proof professionals.
• Mission - We provide high quality, affordable, innovative
and internationally benchmarked education and
research in a professional, ethical and student centred
manner by designing and delivering a range of enriching
and distinctive learning experiences.

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 5

 SOE’S VISION AND MISSION

• Vision - To be a leading provider of Engineering and

Technology education at the forefront with innovative
approaches to enhancing lifelong career opportunities in
the region.
• Mission –
– To be a school which provides high quality and innovative
teaching and learning and maintains professional accreditation
for all its programmes.
– To provide an education based on a theoretical, experimental
and ethical foundation enhanced by opportunities for
participation in research, internships and interdisciplinary
programmes.
– To educate graduates for professional leadership, civic influence
and lifelong learning.

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 6

 PROGRAMME EDUCATIONAL
OBJECTIVES
• Graduates of APU Bachelor of Engineering in their respective programs are
expected within five years of graduation to attain the following programme
educational objectives:
PEO CE EEE ME PE TE
PEO1 Be a practicing Be a practicing Be a practicing Be a practicing Be a practicing
engineer engineer engineer engineer engineer
contributing to the contributing to the contributing to the contributing to the contributing to the
development of development of development of development of development of
Computer or Electrical or Mechatronic Petroleum Telecommunicatio
Electronic Electronic Engineering while Engineering while n or Electronic
Engineering while Engineering while demonstrating demonstrating Engineering while
demonstrating demonstrating professionalism. professionalism. demonstrating
professionalism. professionalism. professionalism.

PEO2 Pursue engineering Pursue engineering Pursue engineering Pursue Pursue

innovation via innovation via innovation via engineering engineering
career career career innovation via innovation via
advancement advancement advancement career career
opportunities opportunities opportunities advancement advancement
and/or advanced and/or advanced and/or advanced opportunities opportunities
studies in Computer studies in Electrical studies in and/or advanced and/or advanced
or Electronic or Electronic Mechatronic studies in studies in
Engineering. Engineering. Engineering. Petroleum Telecommunicatio
Engineering. n or Electronic
Engineering.

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 7

 PRE-REQUISITES FOR THIS
MODULE

• NIL

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 8

 AIMS OF THIS MODULE

• The aim of the module, is to enable the student to analyse

and synthesis small synchronous and digital systems. To
give an understanding of the factors that limits the
performance of digital systems and relates these to
circuitry of the constituent logic gates. To give an
understanding of how digital systems communicate with
each other and with their external environment. The
module looks at the signal timing issues that arise both
within a subsystem and when two subsystems are
interconnected.

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 9

 LEARNING OUTCOMES

• At the end of this module, YOU should be

able to:
– Interpret the operation of digital circuits. (C3,
PLO2)
– Investigate the operations of digital circuits.
(C4, PLO4)
– Exemplify the ability to work effectively in a
group on digital circuit design problems. (A5,
PLO9)

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 10

 STUDENT LEARNING TIME (SLT)

• Module Credit Value: 3.0

• Total Learning Hours: 120 hours
– Lecture: 1 time 2.5 hours per week (9 weeks)
– Tutorial: 1 time 1 hour per week (9 weeks)
1 time 3.5 hours per week (3 weeks)
– Other: Assessments – 4 (F2F) + 18 (NF2F)
– Independent Learning Time: 49 hours

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 11

 TOPICS WE WILL COVER

• Number System
• Logic Gates, Boolean Algebra and Logic
Simplification/minimization
• Combinational Logic Analysis
• Latches and Flip-Flop circuits
• Counters
• Registers

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 12

 WHAT IS EXPECTED OF YOU

• You should abide with all the rules &

regulation of APU
– Proper attire in accordance with APU dress-
code.
– No speaking of dialects.
– Attendance is compulsory and valid medical
certificates or letters from parents /guardians
must support any absence from class.
– Three lateness will be equal to one absence.
– All mobile phones should be turned off during
lectures.
EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 13
 WHAT SUPPORT IS AVAILABLE
FOR YOU
• Consultation hours – 5 hours per week
• Resources – Reference material
• Essential Reading:
1. Rafiquzzaman, M. and McNich, S.A. (2019), Digital Logic: With
an Introduction to Verilog and FPGA-based Design, 1st Edition,
John Wiley and Sons, Inc. (ISBN: 1351466127, 9781351466127)
• Further Reading:
1. LaMeres, B.J. (2019), Introduction to Logic Circuits and Logic
Design with VHDL, Springer. (ISBN: 9813157852, 9789813157859)
2. Sachan, V.K. (2019), Digital Electronics and Microprocessor:
Principle, Design and Programmimg, 1st Edition, Smt. Jay Devi
Sachan Memorial Publication House. (ISBN: 9813157852,
9789813157859)

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 14

 HOWYOU WILL BE ASSESSED

• In course Assessment 50%

Group Assignment (CLO2-PLO4-C4 & CLO3-PLO9-A5)

Hand Out Hand In Return

Week 6 Week 10 Week 13

• Final Exam (CLO1-PLO2-C3) 50%

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 15

 ACHIEVEMENT REQUIREMENTS

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 16

 QUESTION AND ANSWER
SESSION

Q&A

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 17

 WHAT WE WILL COVER NEXT

• Number system

EE008-3-2-Digital Electronics Ch0-Introduction and Overview Slide 18