Mechatronic Applications

Lecture04

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Overview
• Data Acquisition
• Sampling
• Zero order hold
• Analog to Digital Converter
• Digital to Analog Converter
• Noise and Signal Conditioning

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Analog and Digital Signals
• Sensors – output of most of the sensors is analog
• Actuators – input for most actuators is analog
• When a microprocessor is used as part of the measurement or
control system, the analog output from the sensor has to be
converted into a digital form before it can be used as an input to the
microprocessor.
• Digital output from a microprocessor has to be converted into an
analog form before it can be used as input by the actuator.

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Digital Signals
• Binary Numbers
• The binary system is based on just two symbols or states - 0 and 1.
• The combination of bits to represent a number is termed a word.
• Example 1111 is a 4-bit word. Group of 8 bits is called a byte.
• Such a word could be used to represent the size of a signal.
• Least significant bit (LSB), Most significant bit (MSB)

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 Analog to Digital Conversion
• Analog-to-digital conversion involves converting analog signals into binary words.

(a) Analogue-to-digital conversion,

(b) Analogue input,
(c) clock signal,
(d) sampled signal,
(e) sampled and held signal.

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Analog to Digital Conversion

Resolution = 𝑉𝐹𝑆 Τ2𝑛

𝑉𝐹𝑆 - full scale analog input
n - word length (bits)

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 LSB, Resolution and Reference voltage

The value of an LSB depends upon the ADC Reference Voltage and Resolution

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 Quantization Error

But an error of 0 to 1 LSB is not as desirable as is an

This 0 to 1 LSB range is known as the “quantization error of ±1/2 LSB, so we introduce an offset into the
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uncertainty” A/D converter to force an error range of ±1/2 LSB.
Example
• Find resolution of an ADC for following specifications:
• Full scale input range – 10V
• Word size – 10 bits

• Consider a thermocouple giving an output of 0.5 mV/ ℃.

• What will be the word length required when its output passes through an
ADC, if temperatures from 0 to 200 ℃ are to be measured with a resolution of
0.5 ℃ ?

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Sampling
• ADCs sample analog signals at regular intervals and convert these values to binary
words.
• What is the suitable sampling rate ?

Effect of sampling frequency: (a) analogue signal, (b) sampled signal, (c) sampled signal. 10
Sampling theorem
• Nyquist Criterion or Shannon’s sample theorem:
• When signal reconstruction is made, in order to avoid loss of information, the
incoming signal must be sampled at a rate greater than two times the highest-
frequency component in the incoming signal.
• Sampling frequency 𝐹𝑆 ≥ 2𝐹𝑖𝑛 𝑚𝑎𝑥 (highest frequency component in the
signal)
• The minimum sampling rate allowed by the sampling theorem is called the
Nyquist rate.
• 𝐹𝑆 = 2𝐹𝑖𝑛 max
• If sampling frequency is less than twice the input signal frequency aliasing effect
happens.

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Example
• If the highest frequency in an audio system is less than 10KHz, what is
the sampling rate in order to reconstruct the signal ?
• If a 12 kHz tone is present in the input signal what would happen ?

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 Aliasing NOTE: in the video, during
class, I made a mistake with
sampling frequency mentioning
as 200kHZ. But its actually
2kHz and incoming signal
frequency is 1.9kHz making
alias signal frequency 100Hz.

The alias frequency is always the difference between any integer

multiple of the sampling frequency (2kHz) and the incoming
frequency that is being digitized (1.9 kHz).
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 Aliasing
High-frequency noise can also create errors in the conversion
process.

To minimize errors due to both aliasing and high-frequency

noise, a low-pass filter is used to precede the ADC, the filter
having a bandwidth such that it passes only low frequencies for
which the sampling rate will not give aliasing errors.

Such a filter is termed an anti-aliasing filter.

A table of aliased frequencies (observed) versus actual

frequencies for 100 Hertz bandwidth sampling
performed without aliasing considerations. 14
Sample-and-Hold (S/H) Circuits
• When an analog voltage is connected directly to the input of an ADC, the
conversion process can be adversely affected if the analog voltage is changing
during the conversion time.
• The stability of the conversion process can be improved by using a sample-and-
hold (S/H) circuit to hold the analog voltage constant while the A/D conversion is
taking place.

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Sample-and-Hold (S/H) Circuits The capacitor will be connected to the output of A1
when the digitally controlled switch is closed (sample
operation).

The switch will be closed long enough (acquisition

time) for Ch to charge to the present value of the
analog input.

When the switch opens, Ch will hold this voltage so

that the output of A2 will apply this voltage to the
ADC.

The unity-gain buffer amplifier A2 presents a high

input impedance that will not discharge the capacitor
voltage appreciably during the conversion time of the
ADC, and so the ADC will essentially receive a DC
input voltage V0.

The voltage droop within the sampling interval

Simplified diagram of a sample-and hold circuit should be less than the weight of the LSB.

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Example
The AD781 is a S/H integrated circuit that has a maximum
acquisition time of 700 ns. During the hold time, the
capacitor voltage will droop (discharge) at a rate of only
0.01 V µV/ µs. The voltage droop within the sampling
interval should be less than the weight of the LSB.

If a 10-bit converter with a full-scale range of 10 V is to be

used the ADC would have an LSB weight of approximately
10 mV. It would take 1 s before the capacitor droop would
equal the weight of the ADC’s LSB. It is not likely, however,
that it would ever be necessary to hold the sample for
such a long time in the conversion process.

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Digital-to-analog conversion
• The input to a digital-to-analogue converter (DAC) is a binary word.
• The output is an analogue signal that represents the weighted sum of the non-zero bits represented by the
word.
• Ex: input of 0010 should give an analog output what is twice that given by input of 0001.
• Many A/D conversion methods utilize the D/A conversion process.
• Output of digital to analog converter is not purely analog but rather pseudo-analog.

Input/output for a DAC. 18

 Digital to Analog Converters (DAC)

analog output = K X digital input

K is the proportionality factor and is a
constant value for a given DAC
connected to a fixed reference voltage.

Four-bit DAC with voltage output

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Example
• Consider the situation where a microprocessor gives an output of an 8-bit word. This is fed
through an 8-bit DAC to a control valve. The control valve requires 6.0 V to be fully open. If the
fully open state is indicated by 11111111 what will be the output to the valve for a change of 1
bit?

• A five-bit DAC has a current output. For a digital input of 10100, an output current of 10 mA is
produced. What will IOUT be for a digital input of 11101?

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Resolution (Step Size)
• Resolution of a D/A converter is defined as the smallest change that can occur in the analog
output as a result if a change in the digital input.
• The resolution is always equal to the weight of the LSB and is referred to as the step size because
it is the amount that Vout will change as the digital input value is changed from one step to the
next.

𝐴𝑓𝑠
𝑟𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 = 𝐾 = 𝑁
2 −1

𝐴𝑓𝑠 - analog full-scale output

and N –number of bits

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Output waveforms of a DAC as inputs are provided by a binary counter
DAC Circuitry
• D/A converters are available as ICs or as encapsulated packages.
• It is important to know the significant performance characteristics of DACs, in general than the circuits itself.
• A simple form of DAC uses a system referred as weighted-resistor network.
• The values of the input resistances depend on which bit in the word a switch is responding to, the value of
the resistor for successive bits from the LSB being halved. Hence the sum of the voltages is a weighted sum
of the digits in the word.

V = -(V + ½ V +¼ V + 1/8 V )
OUT D C B A

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Simple DAC using an op-amp summing amplifier with binary weighted resistors.
 if the digital input is 1010, then VD = VB = 5V
and VC = VA = 0 V. Thus, using equation VOUT
= -(5 V + 0 V + 1/4 * 5 V + 0 V) = -6.25 V

A problem with the weighted-resistor network is that accurate resistances have to be used for each of the resistors and it is
difficult to obtain such resistors over the wide range needed. As a result this form of DAC tends be limited to 4-bit
conversions.
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 R-2R ladder Network
This version overcomes the problem of obtaining accurate resistances over a wide range of values, as only two values
being required.

The output voltage is generated by

switching sections of the ladder to either
the reference voltage or 0 V according to
whether there is a 1 or 0 in the digital
input.

R–2R ladder DAC.

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DAC Specifications
• A wide variety of DACs are available as ICs or as self-contained, encapsulated packages. One should be familiar with
the more important manufacturers’ specifications in order to evaluate a DAC for a particular application.
• Resolution: resolution of a DAC depends solely on the number of bits. For this reason, manufacturers usually
specify a DAC resolution as the number of bits. A 10-bit DAC has a finer (smaller) resolution than an eight-bit DAC.
• Accuracy : DAC manufacturers have several ways of specifying accuracy. The two most common are called full-scale
error and linearity error, which are normally expressed as a percentage of the converter’s full-scale output (% F.S.).
Full-scale error is the maximum deviation of the DAC’s output from its expected (ideal) value, expressed as a
percentage of full scale. Linearity error is the maximum deviation in step size from the ideal step size.
• Offset error : Ideally, the output of a DAC will be zero volts when the binary input is all 0s. In practice, however,
there will be a very small output voltage for this situation; this is called offset error. This offset error, if not
corrected, will be added to the expected DAC output for all input cases.
• Settling Time : The operating speed of a DAC is usually specified by giving its settling time, which is the time
required for the DAC output to go from zero to full scale as the binary input is changed from all 0s to all 1s.
• Monotonicity: A DAC is monotonic if its output increases as the binary input is incremented from one value to the
next. Another way to describe this is that the staircase output will have no downward steps as the binary input is
incremented from zero to full scale.

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 DAC

GEC Plessey ZN558D 8-bit latched input DAC

using a R-2R ladder network.

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ZN558D might be used with a microprocessor when the output is required to be a voltage which varies
between zero and the reference voltage 27
Analog to Digital Converters (ADC)
• The input to an ADC is an analog signal and the output is a binary word that
represents the level of the input signal.
• There are a number of forms of ADC, the commonest being successive
approximations, ramp, dual ramp and flash.

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Successive approximation ADC
• This is probably the most commonly used method.
• A voltage is generated by a clock emitting a regular sequence of pulses which are counted, in a
binary manner, and the resulting binary word converted into an analogue voltage by a DAC.

Successive approximations ADC

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 Successive approximation ADC

Typical form of an 8-bit ADC (GEC Plessey ZN439)

designed for use with microprocessors and using ZN439 connected to a microprocessor
the successive approximations method.
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Successive approximation ADC

ADC0804 eight-bit successive approximation ADC

with tristate outputs. The numbers in parentheses are
the IC’s pin numbers.
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RAMP ADC
• The ramp form of ADC involves an analogue voltage which is increased at a constant rate, a so-called ramp
voltage, and applied to a comparator where it is compared with the analogue voltage from the sensor.

Ramp ADC.
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Dual RAMP ADC
• More common than the single ramp.
• The basic operation of this converter involves the linear charging and discharging of a capacitor using an
integrator circuit.

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Dual ramp ADC
Flash ADC
• The flash ADC is very fast.
• For an n-bit converter , 2𝑛 − 1 separate voltage comparators, 2𝑛 resistors are used in with each comparator having the
analogue input voltage as one input .

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Flash ADC
Flash ADC

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ADC Specifications
• In considering the specifications of ADCs the following terms will be encountered.
• Conversion time : the time required to complete a conversion of the input signal.
It establishes the upper signal frequency that can be sampled without aliasing.
(Maximum frequency is 1/ 2 x Conversion time).
• Resolution : the full-scale signal divided by 2𝑛 , where n is the number of bits. It is
often just specified by a statement of the number of bits.
• Linearity error: the deviation from a straight line drawn though zero and full-
1
scale. It is a maximum of ± LSB
2

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ADC Specifications

Linearity error
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ADC Architecture for Applications
• Most ADC applications tend to fall into one of the four areas:
• Precision industrial measurements :
• The low sampling rate, high resolution, and good noise rejection of dual-slope integrating ADCs
are ideal characteristics for monitoring DC signals with instrumentation, such as digital
multimeters.
• Industrial measurement applications requiring moderate bandwidths and high resolutions such as
sensor monitoring and motor control use sigma/delta ADC.
• Voice/audio - sigma/delta ADCs dominate due to their oversampling and high resolution.
• Data acquisition –Successive approximation is principle architecture for majority of complex data
acquisition systems.
• High speed Applications- The pipelined architecture is used in high speed applications such as digital
oscilloscopes, spectrum analyzers, medical imaging, digital video (DVD, HDTV) ,radar, communications
and digital cameras. Highest-speed applications may require flash architecture for ADC but at relatively
high cost and low resolution.

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Data Acquisition (DAQ)
• The process of taking data from sensors and inputting that data into a computer for
processing is called data acquisition.
• The sensors are connected generally via some signal conditioning, to a data acquisition
board which is plugged into the back of a computer.
• DAQ board is a printed circuit board that, for analog inputs provides a multiplexer,
amplification, ADC, registers and control circuitry.
• Acquiring a single data point’s value is referred to as sampling the analog signal and that
data point is called a sample.
• Computer can do several different things with the data, depending on the application.
• Storage application – digital audio or video recording stored in microcomputer will be sent to a
DAC to reproduce the original analog signal.
• process control application – computer will examine the data or compensations on them to
determine what control outputs to generate.

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Typical Computer Data Acquisition System

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Block diagram of a DAQ system.

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DAQ System

DAQ System

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DAQ Specifications
• Sampling rate for analog inputs
• Ex: 100kS/s – 100,000 samples per second
• Nyquist criteria for sampling indicate that maximum frequency of analog
signal that can be sampled with such a board is 50KHz.

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DAQ Board

National Instruments DAQ board PC-LPM-16. 44