Pam Vme: Technical Manual
Pam Vme: Technical Manual
Pam Vme: Technical Manual
Socapel PAM
A Programmable Axes Manager
PAM VME
Technical Manual
CONTENTS
1. Introduction..................................................................................................................................3
1.1. Objective ........................................................................................................................3
1.2. General Informations......................................................................................................3
1.3. Bloc Scheme of PAM Processor Card ...........................................................................4
2. Interface Configuration................................................................................................................5
2.1. Scheme of the VME interface of PAM . ........................................................................5
2.2. Signals transmitted or received by the VME Bus. .........................................................6
2.3. VME bus Backplane Connectors and VME Board Connectors.....................................7
2.3.1. Remarks ............................................................................................................8
2.4. PAM Dual-port Memory Configuration.........................................................................9
2.4.1. Distribution of the addresses on the PAM :......................................................9
2.4.2. Configuration : ..................................................................................................10
2.4.3. Implantation of configuration switches on the bus interface board ................11
2.4.4. Example ............................................................................................................11
2.5. Other switches ................................................................................................................12
Appendix A ........................................................................................................................................15
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SOCAPEL SA PAM VME Technical Manual 006.8020
1. INTRODUCTION
1.1. OBJECTIVE .
The PAM - Programmable Axes Manager - is a system developed by Socapel to control our ST1 digital
motion controllers with a high precision synchronisation. All these controllers are connected on PAM
Ring, the optical fiber field bus from Socapel.
The PAM system is based around a 32 bits RISC microprocessor that permits very high performances.
This processor card is connected to a MASTER card VME compatible to exchange informations. The
MASTER is the host of the system. The link between these two modules is made by the VME parallel
bus.
Bloc scheme:
MASTER
VME BUS
Optical fiber Optical fiber
PAM
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MASTER VME
VME BUS
INTERFACE
PAM - VME
IN T E R F A C E OUT
P A M R IN G
O P T IC A L F IB E R IN
IN T E L
80960
R IS C S E R IA L RS232-C
PROC ESSOR IN T E R F A C E RS422-A
RS485
ANALOG OUT S0
OUTPUTS OUT S1
M A IN
M EM ORY:
EPR OM
EEPR OM
DRAM
SR AM
The interfaces RS-232-C and RS-422-A/RS-485 are used to connect PAM with a terminal or a
computer to make application diagnostic and debugging.
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2. INTERFACE CONFIGURATION
The following drawing gives a detailed bloc scheme of the interface. Part of the layout is given in
appendix A .
SYSRESET*
POWERDOWN*
DRIVERS CONTROL
UPPER DTACK* S IG N A L S C O N T R O L
DSO* A N D W A IT S T A T E
C O N N EC TO R DS1*
A N D D R IV E R S WRITE* GEN ER ATO R
AS*
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Dtack* : Dtack* is driven by the SLAVE to indicate that the data was successfully
received on a write cycle. On a read cycle the SLAVE uses Dtack* to
indicate that the data has been read from memory and has been placed
on the data bus.
DS0* and DS1* : This two lines are explain in the 2.4 chapter .
Write* : This line controls the direction of data transfer between MASTER and
SLAVE .
If Write* is high ,the operation is a transfer from SLAVE to MASTER .
If Write* is low , the operation is a transfer from MASTER to SLAVE .
AS* : AS* is the address strobe . It informs all slave modules that the address is
now stable and may be clocked into holding registers .
Powerdown* : It signals that the system has detected a power failure in the VME side .
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The following table gives all signals which are used by PAM:
Upper connector:
Lower connector :
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These connection is fully compatible with all VME systems . PAM doesn't use all signals of the VME
bus.
2.3.1. REMARKS
The comment "not used" mean that the signal of VME bus is not used by the PAM.
The PAM system needs in all cases the upper and lower connectors in order to
use all supply pins.
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With the PAM , the system works in a STANDARD NON-PRIVILEGED DATA ACCESS MODE.
The configuration mode is defined with the address modifier . The PAM decodes statically the address
modifier with a switch (N10) . The code of this configuration is 39h.
The standard mode uses only 23 address line (A01 to A23) . In this configuration only a 16 bit data
bus is used .
The two lines DS0* and DS1* allow to introduce separately two bytes or one completely word . These
two lines replace the function that A00 would perform but they allow two bytes to be transferred
simultaneously which not be possible with just an A00 line .
The total of the dual-port memory is 4 Kbytes and its configuration is 2K * 16 .
The address modifier is These addresses are decoded Not Physical addresses for the
decoded statically with statically with switches to map decoded Dual-port Memory
switches for giving the the Dual-port memory on the
configuration mode addressable space of the VME
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2.4.2. CONFIGURATION :
DS1* DS0*
Even byte Odd byte
location location
D15 to D08 D07 toD00
A10 to A01
000h
001h
002h
003h
004h
DPM
3FBh
3FCh
3FDh
3FEh
3FFh
When a byte is introduced on the dual-port memory (DPM) , the capacity of the DPM is two
Kbytes (7FFh).
When a word is introduced on the DPM , the capacity of the DPM is 1Kword (3FFh) ; in this
case , only the even addresses are used (for A10 to A00) .
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N7 N8 N10
N7,N8: Select the map of the DPM on the addressable space of the VME Bus.
N10: Define the configuration mode .
2.4.4. EXAMPLE
Given information :
Solution :
The start address of the DPM is E9A000h. The capacity of the DPM is 2 Kbytes => the end
address of the DPM is E9A7FFh.
The address A11 is not decoded => the addressable space of the VME who is reserved to the
DPM is : E9A000h to E9AFFFh (4 Kbytes).
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Result :
N7 N8 N10
All other switches of the VME interface board, from S2 to S15, and all switches of the CPU board
may in no case be modified. They are configured in factory.
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3. ANALOG OUTPUTS
The analog outputs are accessible on the front panel of the PAM. They are not isolated, have 8 bits
resolution and 0V to 10V amplitude.
The output impedance of the analog outputs is 1KΩ . These outputs are protected against shorts-
circuits.
S0
PAM Analog Outputs
S1
IN
They can be used by the application, for example, for monitoring or debug purpose (see PAM
Reference Manual).
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A
U PAM
The bulk of the PAM is a typical double high board × 40.6 mm Front Panel .
These dimensions are completely compatible with the VME system .
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APPENDIX A .
Part of the layout of the VME bus interface board:
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