Rodriguez, Joseph Lorenz CEIT-08-402A

COUNTER CIRCUITS

1. OBJECTIVES: Be able to assemble, operate and explain in detail the operations of

counter circuits.
VCC
S1
R1 5.0V

1kΩ
GND Key = Space

J
CLK

CLK

CLK

CLK
RESET

RESET

RESET

RESET
SET

SET

SET

SET
~Q

~Q

~Q

~Q
Q

Q
JK4 JK3 JK2 JK1

X4 X3 X2 X1
2. CIRCUITS

ASYNCHRONOUS COUNTER
VCC
R1 5.0V

GND 1kΩ
CLOCK
K

J
CLK

CLK

CLK

CLK
RESET

RESET

RESET

RESET
SET

SET

SET

SET
~Q

~Q

~Q

~Q
Q

JK4 JK3 JK2 JK1

X4 X3 X2 X1
UP / DOWN

U5 U6 U7
XNOR2 XNOR2 XNOR2
R2
1kΩ

U8 U9 GND
AND2 AND2

SYNCHRONOUS BINARY UP/DOWN COUNTER

3. LIST OF EQUIPMENT AND COMPONENTS: Logic Simulator (Android) / Multisim

(Window)

4. PROCEDURES

4.1 Assemble the circuits and trace the truth table. Tabulate the results.

4.2 Modify the Asynchronous Counter circuit into different MODULO counter
configuration.
5. CONCLUSION

5.1 Explain in detail the operations of the asynchronous and synchronous counter.
Asynchronous counter is also called ripple counter because of apparently how
outputs and clocks are being connected. Each flip-flop is triggered with a different clock signal
at different instant of time that’s why it is creating a propagation delay. Creating propagation
delay leads to working slow that’s why it is known for its slow processing counter. But the good
side of this is it is easy/simple to set up. With regards to clock signal, there is simultaneous
change in the state of all flip-flops with change in clock input. Synchronous counter at the other
hand, it is also called parallel counter and each flip-flop is triggered with the same clock signal
at the same time. So technically, synchronous counter just eliminates the propagation delay
problem and this leads to high-speed counter. But however, the design is quite complex. With
regards to clock signal, each flip-flop changes its state simultaneously.

5.2 Draw the circuit of an Asynchronous BCD down counter and the Truth Table.

Truth table
clock Q4 Q3 Q2 Q1 status
0 0 0 0 0 Starting point
1 1 1 1 1 15
0-1 ↑ 1 1 1 0 14
0-1 ↑ 1 1 0 1 13
0-1↑ 1 1 0 0 12
0-1↑ 1 0 1 1 11
0-1↑ 1 0 1 0 10
0-1↑ 1 0 0 1 9
0-1↑ 1 0 0 0 8
 0-1↑ 0 1 1 1 7
0-1↑ 0 1 1 0 6
0-1↑ 0 1 0 1 5
0-1↑ 0 1 0 0 4
0-1↑ 0 0 1 1 3
0-1↑ 0 0 1 0 2
0-1↑ 0 0 0 1 1
0-1↑ 0 0 0 0 reset

5.3 Draw the circuit of an MODULO 5 Asynchronous Counter and the Truth Table.

Truth table
clock Q4 Q3 Q2 Q1 status
0 0 0 0 0 Starting point
1↑ 0 0 0 1 1
0-1↑ 0 0 1 0 2
0-1 ↑ 0 0 1 1 3
0-1 ↑ 0 1 0 0 4
0-1 ↑ 0 1 0 1 5
0-1 ↑ 0 0 0 0 reset

4.1
 Truth table
clock Q4 Q3 Q2 Q1 status
0 1 1 1 1 Starting point
1 0 0 0 0 reset
0-1 ↑ 0 0 0 1 1
0-1 ↑ 0 0 1 0 2
0-1↑ 0 0 1 1 3
0-1↑ 0 1 0 0 4
0-1↑ 0 1 0 1 5
0-1↑ 0 1 1 0 6
0-1↑ 0 1 1 1 7
0-1↑ 1 0 0 0 8
0-1↑ 1 0 0 1 9
0-1↑ 1 0 1 0 10
0-1↑ 1 1 0 1 11
0-1↑ 1 1 0 0 12
0-1↑ 1 1 0 1 13
0-1↑ 1 1 1 0 14
0-1↑ 1 1 1 1 15
0-1↑ 0 0 0 0 reset
 Truth table/no contact with switch/ 15-1 counting
clock Q4 Q3 Q2 Q1 status
0 1 1 1 1 15
1 1 1 1 0 14
0-1 ↑ 1 1 0 1 13
0-1↑ 1 1 0 0 12
0-1↑ 1 0 1 1 11
0-1↑ 1 0 1 0 10
0-1↑ 1 0 0 1 9
0-1↑ 1 0 0 0 8
0-1↑ 0 1 1 1 7
0-1↑ 0 1 1 0 6
0-1↑ 0 1 0 1 5
0-1↑ 0 1 0 0 4
0-1↑ 0 0 1 1 3
0-1↑ 0 0 1 0 2
0-1↑ 0 0 0 1 1
0-1↑ 0 0 0 0 reset

Truth table/close contact with switch/1-15 counting

clock Q4 Q3 Q2 Q1 status
0 1 1 1 1 Starting point
1 0 0 0 0 reset
0-1 ↑ 0 0 0 1 1
0-1 ↑ 0 0 1 0 2
0-1↑ 0 0 1 1 3
0-1↑ 0 1 0 0 4
0-1↑ 0 1 0 1 5
0-1↑ 0 1 1 0 6
0-1↑ 0 1 1 1 7
0-1↑ 1 0 0 0 8
0-1↑ 1 0 0 1 9
0-1↑ 1 0 1 0 10
0-1↑ 1 1 0 1 11
0-1↑ 1 1 0 0 12
0-1↑ 1 1 0 1 13
0-1↑ 1 1 1 0 14
0-1↑ 1 1 1 1 15
0-1↑ 0 0 0 0 reset
4.2

MODULO-4 COUNTER

Truth table
clock Q4 Q3 Q2 Q1 status
0 1 1 1 0 Starting point
1 0 0 0 0 Reset
0-1↑ 0 0 0 1 1
0-1↑ 0 0 1 0 2
0-1↑ 0 0 1 1 3
0-1↑ 0 1 0 0 4
0-1↑ 0 0 0 0 reset