Lecture Notes For ARM Architecture - Module I
Lecture Notes For ARM Architecture - Module I
2. Prerequisites 2
4. ARM7TDMI Architecture 3
4.1. Introduction 4
6. Conclusion 12
7. References 12
8. Assignment 12
ARM architecture
1. Aim and Objective:
2. Prerequisites:
Digital Electronics
C. Control Unit
A.Read
B.Write
C.Reset
A.FIFO
B.LIFO
C.LILO
D.FILO
A.Decode,Fetch,Execute
B.Fetch,Decode,Execute
C.Execute,Decode, Fetch
D.Decode,Execute,Fetch
5. EEPROM stands for
4. The ARM7TDMI
Advanced RISC machine (ARM) is the first reduced instruction set computer (RISC)
processor for commercial use, which is currently being developed by ARM Holdings
Advanced RISC machine (ARM) is the reduced instruction set computer (RISC)
processor, which is created by ARM Holdings
Applications
Embedded Solutions
Enterprise Solutions
Home Solutions
Mobile Solutions
Emerging Applications
THUMB set
The THUMB set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over
traditional 16-bit processor using 16-bit registers.
This is possible because THUMB code operates on the same 32-bit register set as ARM code
pipelining
It is used speed up the no. of execution per unit time for processor by instruction
parallelism
The process of fetching the next instruction when the present instruction is being
executed is called as pipelining
It therefore allows faster CPU throughput (the number of instructions that can be
executed in a unit of time) than would otherwise be possible at a given clock rate.
Instruction execution without pipeline
The execution of instruction performed one by one, after complete the execution of an
instruction the next instruction is fetched from the memory
Suppose, these instructions are executed sequentially, and it takes the 1-unit clock
cycle for each step to run. So, it would take 12-clock cycles(3 X 4) to execute these
instructions.
Cache
Cache is a small amount of memory which is a part of the CPU - closer to the CPU
than RAM . It is used to temporarily hold instructions and data that the CPU is likely
to reuse.
In Harvard architecture, the CPU is connected with both the data memory (RAM)
and program memory (ROM), separately.
Debug Interface
JTAG stands for Joint Test Action Group and defines the set of standards for testing
the functionality of hardware.
This unit is powered by breakpoint and watch point register and control & status
register
All the register work together to halt the ARM core to read status and thus do active
debugging
ARM processors to execute Java byte code in hardware as a third execution state
along with existing ARM and Thumb mode
Operating Modes
4.3.Memory Interface
The ARM processor has Von Neumann Architecture, with 32 bit data bus carrying
both instruction and data
Only the load, store, swap instructions can access from the memory
3. Internal Cycle
4.Co-processor Cycle
Processor determines the type transfer cycle takes place based on the two signals nMREQ
and SEQ
It is a type of memory access cycle in which access the memory through memory location is
unrelated to the preceding cycle transfer.
Sequential Cycle
It is a type of memory access cycle in which access the memory through memory location is
related to the preceding cycle transfer.
It is used generally program access from the memory and used for burst data transfer
Internal Cycle
In this bus cycle no memory access performed only an internal function to be executed
Co-Processor register transfer Cycle
During this cycle. ARM7TDMI processor access the data from or to the Co-processor
.memory access does not initiate the during the cycle.
4.4.Debug Interface
The debug interface is based on IEEE Std. 1149.1-1990, Standard Test Access Port
and Boundary Scan Architecture.
These make is easier to develop application software, operating systems and hardware
itself.
A request on one of the external debug signal, or on an internal functional unit known
as EmbeddedICE Logic forces into debug state
Debug Host
The Debug host is computer that is running a software debugger such as the Arm
Debugger for Windows.
The debug host allows to issue high level commands such as setting breakpoints of
examining the contents of memory
Protocol Converter
The protocol converter communicates with high commands issued by the debug host
and the low level commands of JTAG interface.
Debug Target
6.Conclusion
Hence the in this module we studied about the ARM Architecture in detail
7.References
8. Assignment
2. Prerequisites 2
4.1. Introduction 3
5. Laboratory experiments 11
7. Conclusion 33
8. References 33
9. Assignment 34
LPC 2148 Microcontroller Block diagram and its programming
1. Aim and Objective:
2. Prerequisites:
Digital Electronics
C. Control Unit
A.Read
B.Write
C.Reset
A.FIFO
B.LIFO
C.LILO
D.FI LO
A.Decode,Fetch,Execute
B.Fetch,Decode,Execute
C.Execute,Decode, Fetch
D.Decode,Execute,Fetch
5. EEPROM stands for
4 .LPC2148 microcontrollers
The LPC2148 microcontrollers are based on a 32 bit ARM7TDMI-S CPU with real-time
emulation and embedded trace support, that combines the microcontroller with embedded
high speed flash memory of 512 KB
• Crystal Oscillator
• PLL
• Power Control
• Reset
• APB Divider
• Wakeup Timer
4.3.1Crystal Oscillator
LPC 2148 Micro controller operated at frequency 12-60MHZ. The clock frequency is generated
using crystal oscillator which is connected to pin of XTAL1 and XTAL2
EINT0 – general purpose interrupt input is used wake up the processor from idle mode
EINT1 -general purpose interrupt input is used start the ISP command handler
RESET- external reset input when this input is low chip resets
4.3.4.Memory Map
LPC 2148 microcontroller has 4GB of total memory space which is 32 bit internal bus address
(232= 4GB)
It is a memory mapped Input/Output system in which RAM , ROM memory and peripherals share
the same memory space
while the PLL1 has to supply the clock for the USB at the fixed rate of 48 MHz.
The PLL0 and PLL1 accept an input clock frequency in the range of 10 MHz to 25
MHzonly.
The input frequency is multiplied up the range of 10 MHz to 60 MHz for the CCLK and 48
MHz for the USB clock using a Current Controlled Oscillators (CCO).
loop to keep the CCO within its frequency range while the PLL is providing the desired
output frequency.
The output divider may be set to divide by 2, 4, 8, or 16 to produce the output clock. Since
the minimum output divider value is 2, it is insured that the PLL output has a 50% duty
cycle.
4.3.6.Power Control
One of the important features of ARM micro controller is low power consumption in order to
achieve the power optimization two modes are available
In this mode the crystal oscillator shutdown and chip does not receives any clocks. During
this mode no operation takes place which can resume back only by either certain specific interrupt
or reset that triggered.
Due to above all, the dynamic power consumption of chip is negligible hence power consumption
almost zero
Idle mode
During this mode, instruction execution is suspected. But peripherals can continue operation and
may be generated the interrupt to resume the chip to execute the instructions
Power consumption of the processor, bus, control logic and memory is eliminated.
4.3.7.APB divider
➢ The APB Divider determines the relationship between the processor clock (CCLK) and the
clock used by peripheral devices (PCLK).
The first is to provides peripherals with desired PCLK via APB bus so that they can operate
at the speed chosen for the ARM processor.
4.4. Timer
Timer and counter are same function only difference is timer uses the PCLK for timing
whereas counter uses external source
Timer is used create time delay whereas counter used to counts number of events occurs
LPC 2148 Micro controller has 2 32 bit timer and associated registers
Timer operation
When the content of the TOTC equals the value in the match register, timing is said to have
occurred.
The possibilities are to reset the timer count register, stop the timer, or generate an interrupt
Timer Registers
Timer Count(T0TC) -32 bit Register which gives it a range of counting 0 from to 0xFFFF FFFF
Timer Control(T0TCR)- 8 bit register bit0- enable bit enable bit is 1 count is enabled and starts bit
1 –reset bit
Match Register(MR0 to MR3) is 32 bit register
T0MCR is 16 bit Register which is used to specify the event to occur when the match occurs
4.5. PWM
Pulse Width Modulation (PWM) is a technique by which width of a pulse is varied while
keeping the frequency constant.
PWM Pulse is control the period and duty cycle of the square wave
LPC 2148 microcontroller can be generated up to 6 single edge controlled or 3 double edge
controlled PWM outputs, or a mix of both types with help of Seven match registers.
Double edge controlled PWM outputs can be programmed to be either positive going or
negative going pulses.
A period of a pulse consists of an ON TIME cycle (TON) and an OFF TIME cycle
(TOFF). The fraction for which the signal is TON over a period is known as duty cycle.
E.g. Consider a pulse with a period of 10ms which remains ON (high) for 2ms.The duty
cycle of this pulse will be
Through PWM technique, we can control the power delivered to the load by using ON-OFF signal.
32-bit Timer Counter, i.e. PWMTC (PWM Timer Counter). This Timer Counter counts the
cycles of peripheral clock (PCLK).
32-bit PWM Prescale Register (PWMPR). scale this timer clock counts (PWMPR).
. The PWM Latch Enable Register is used to control the update of the PWM Match
registers when they are used for PWM generation.
Whenever starts the PWM Timer. PWM Timer Counter (PWMTC) increments its value
step by step and any value matches with these Match Registers then,
PWM Timer Counter resets, or stops, or generates match interrupt, depending upon settings
in PWM Match Control Register(PWMMCR).
One matchMR0 Registers is used to dedicate for setting the PWM frequency. And other
match registers are used to setting the duty cycle of PWM
C Program for generate the Single edge controlled PWM using LPC2148
#include <stdio.h>
PWMPCR = 0x00000800;/* PWM channel 2 & 3 double edge control, output enabled */
PWMTCR= 0x00000009;
int main(void)
init_PWM();
Provides Seconds, Minutes, Hours, Day of Month, Month, Year, Day of Week, and Day of
Year.
Dedicated power supply pin can be connected to a battery or to the main 3.3 V.
VIC programmably assigns them into 3 categories, FIQ, vectored IRQ, and non-vectored IRQ.
Vectored IRQs have the middle priority, but only 16 of the 32 requests can be assigned to
this category.
Ex.No : Date :
AIM:
APPARATUS REQUIRED :
Input:
Output:
DAC pin (P0.25)
ALGORITHM:
#include <lpc214x.h>
#include <stdint.h>
void delay_ms(uint16_t j)
{
uint16_t x,i;
for(i=0;i<j;i++)
{
for(x=0; x<6000; x++); /* loop to generate 1 milisecond delay with Cclk = 60MHz */
}
}
}
OUTPUT WAVEFORMS
[B]TRIANGULAR WAVEFORM
Thus the embedded C program to generate the triangular and Square wave form with internal 10 bit DAC
using LPC2148 ARM Micro controller was executed and output was verified with oscilloscope.
Pulse Width Modulation(PWM) Waveform generation
Flow Chart
START
Initialize
Variables
PINSEL0 (PWM3)
Stay Un-terminated
END
Ex.No : Date :
AIM:
APPARATUS REQUIRED :
Input:
AD0.3 (P0.30) – Place jumper JP5 (‘I’ Label position)
Output:
PWM3 is used for Demo (P0.1)
ALGORITHM:
PWMPCR = 0x00000C0C; /* PWM channel 2 & 3 double edge control, output enabled
*/
PWMMCR = 0x00000003; /* On match with timer reset the counter */
PWMMR0 = 0x400; /* set cycle rate to sixteen ticks */
PWMMR1 = 0; /* set rising edge of PWM2 to 100 ticks */
PWMMR2 = 0x200; /* set falling edge of PWM2 to 200 ticks */
PWMMR3 = 0x100; /* set rising edge of PWM3 to 100 ticks */
PWMLER = 0xF; /* enable shadow latch for match 1 - 3 */
PWMTCR = 0x00000002; /* Reset counter and prescaler */
PWMTCR = 0x00000009; /* enable counter and PWM, release counter from reset */
}
void Delay ()
{
unsigned int i,j;
for (i=0;i<250;i++)
for (j=0;j<700;j++);
}
int main (void)
{
unsigned long val;
unsigned long oldval = 0;
VPBDIV = 0x02;
PINSEL0 |= 0x00050000;
PINSEL1 = 0x15400000;
init_PWM();
U1LCR = 0x83;
U1DLL = 0xC3;
U1LCR = 0x03;
AD0CR = 0x00230608; /* Setup A/D: 10-bit AIN0 @ 3MHz */
AD0CR |= 0x01000000; /* Start A/D Conversion */
while (1)
{ /* Loop forever */
do
{
val = AD0GDR;
/* Read A/D Data Register */
} while ((val & 0x80000000) == 0); /* Wait for end of A/D Conversion */
val = ((val >> 6) & 0x3FF); /* Extract AIN0 Value */
Delay (); Delay();
if (val != oldval)
{
PWMMR2 = val;
PWMLER = 0xF;
oldval = val;
printf ("Val : %4d \n\r", val);
}
}
}
MODEL GRAPH
Result :
Thus the embedded C program to generate the PWM wave form using LPC2148 ARM Micro controller
was executed and output was verified with oscilloscope.
Temperature Sensor(LM 35) Interface
Flow Chart
START
Initialize
Variables
Configure Pins
PINSEL0 (UART1)
Initialize ADC
Read ADC0.1
END
Ex.No : Date :
Temperature Sensor(LM 35) Interface
AIM:
To write the embedded C program to read on-chip ADC value of Temperature sensor LM35 and display in
hyper terminal using UART1 using LPC2148 ARM Micro controller.
APPARATUS REQUIRED :
Input:
Output:
#include <LPC214x.h>
#include <stdio.h>
#define PRESET0x00230600
void Delay ()
for (i=0;i<50;i++)
for (j=0;j<500;j++);
void Welcome ()
printf ("-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.-.\n\r");
printf ("--------------------------------------------------------\n\r");
printf ("--------------------------------------------------------\n\r");
printf (">> Put Jumper J in 'E' Mode to Enable Temp Sensor Block \n\r");
printf ("********************************************************\n\r");
printf ("********************************************************\n\n\r");
}
void Serial_Init ()
U1LCR = 0x83;
U1DLL = 195;
U1LCR = 0x03;
void main ()
Serial_Init ();
Welcome ();
while (1)
do
Val = AD0GDR;
Result
Thus the embedded C program to read on-chip ADC value of Temperature sensor LM35 and display in
hyper terminal using UART1 using LPC2148 ARM Micro controller was executed and output was verified.
.
Study of the external Interrupts
Flow Chart
START
Initialize a
Global Variable
END
Ex.No : Date :
Study of external Interrupts
AIM:
To write the embedded C program to read the external interrupts INT1 and INT2 and display in hyper
terminal using UART1 using LPC2148 ARM Micro controller.
APPARATUS REQUIRED :
Input:
Output:
#include <lpc214x.h>
#include <stdio.h>
void ExtInt_Serve1(void)__irq;
void ExtInt_Serve2(void)__irq;
void ExtInt_Init2(void)
void ExtInt_Init1(void)
void Serial_Init(void)
for(i=0;i<count;i++)
for(j=0;j<1000;j++);
void main(void)
Serial_Init();
putchar(0x0C);
DelayMs(100);
printf (">>> Press Interrupt Keys SW2(INT1) and SW3(INT2) for Output... \n\n\n\r");
DelayMs(100);
while(1)
DelayMs(500);
DelayMs(500);
void ExtInt_Serve1(void)__irq
++EINT1;
EXTINT |= 2;
VICVectAddr = 1;
void ExtInt_Serve2(void)__irq
{
++EINT2;
EXTINT |= 4;
VICVectAddr = 0;
Result
Thus the embedded C program to read the external interrupts INT1 and INT2 and display in hyper terminal
using UART1 using LPC2148 ARM Micro controller was executed and output was verified.
6. Post test-Multiple Choice Questions
A. ARM5
B. ARM7
C. ARM 9
D. ARM11
A. 5
B. 5.5
C. 3.3
D. 3
3.LPC2148 has
A. 16 bit
B. 12 bit
C. 10 bit
D. 32 bit
A. Pinstatus
B. pinselect
C. pincontrol
D. None of the above mentioned options
7. Conclusion
Hence the in this module we studied about the LPC Micro controller block diagram and its
programming in detail
8. References
3. https://www.nxp.com/docs/en/user-guide/UM10139.pdf
9. Assignment
1. Write the short notes on Real Time clock and its purpose in LPC 2148 microcontroller
2. Write a C Program for generate double edge controlled PWM pulse with help of LPC 2148
microcontroller
3. Write a C Program for generate the saw tooth wave form with help of DAC module in LPC
2148 microcontroller