Chapter 2

Quantization
Dang Nguyen Chau. Click to edit Master subtitle style
Ho Chi Minh City University of Technology
Email: [email protected]
 1. Quantization process

Fig: Analog to digital conversion

 The quantized sample xQ(nT) is represented by B bit, which can take

2B possible values.

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 1. Quantization process

Fig: Analog to digital conversion

 The quantized sample xQ(nT) is represented by B bit, which can take

2B possible values.

 An A/D is characterized by a full-scale range R which is divided

into 2B quantization levels. Typical values of R in practice are
between 1-10 volts.

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 1. Quantization process

Fig: Signal quantization

R
 Quantizer resolution or quantization width Q 
2B

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 1. Quantization process

Fig: Signal quantization

R
 Quantizer resolution or quantization width Q 
2B
R R
 A bipolar ADC  2  xQ (nT )  2

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 1. Quantization process

Fig: Signal quantization

R
 Quantizer resolution or quantization width Q 
2B
R R
 A bipolar ADC  2  xQ (nT )  2

 A unipolar ADC 0  xQ (nT )  R

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 1. Quantization process –Quantization error

 Quantization by rounding: replace each value x(nT) by the nearest

quantization level.
 Quantization by truncation: replace each value x(nT) by its below
quantization level.

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 1. Quantization process –Quantization error

 Quantization by rounding: replace each value x(nT) by the nearest

quantization level.
 Quantization by truncation: replace each value x(nT) by its below
quantization level.

 Quantization error: e(nT )  xQ (nT )  x(nT )

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 1. Quantization process –Quantization error

 Quantization by rounding: replace each value x(nT) by the nearest

quantization level.
 Quantization by truncation: replace each value x(nT) by its below
quantization level.

 Quantization error: e(nT )  xQ (nT )  x(nT )

Q Q
 Consider rounding quantization:  e
2 2

Fig: Uniform probability density of quantization error

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 1. Quantization process –Quantization error
Q /2 Q /2
1
 The mean value of quantization error e  ep (e)de   e de 0
Q / 2 Q / 2
Q

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 1. Quantization process –Quantization error
Q /2 Q /2
1
 The mean value of quantization error e  ep (e)de   e de 0
Q / 2 Q / 2
Q
Q/2 Q /2
1 Q2
 The mean-square error (power)   e   e p (e)de   e de 
2 2 2 2

 Q /2 Q / 2
Q 12

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 1. Quantization process –Quantization error
Q /2 Q /2
1
 The mean value of quantization error e  ep (e)de   e de 0
Q / 2 Q / 2
Q
Q/2 Q /2
1 Q2
 The mean-square error (power)   e   e p (e)de   e de 
2 2 2 2

 Q /2 Q / 2
Q 12
Q
 Root-mean-square (rms) error: erms    e 2 
12

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 1. Quantization process –Quantization error
Q /2 Q /2
1
 The mean value of quantization error e  ep (e)de   e de 0
Q / 2 Q / 2
Q
Q/2 Q /2
1 Q2
 The mean-square error (power)   e   e p (e)de   e de 
2 2 2 2

 Q /2 Q / 2
Q 12
Q
 Root-mean-square (rms) error: erms    e 2 
12

 R and Q are the ranges of the signal and quantization noise, then
the signal to noise ratio (SNR) or dynamic range of the quantizer
is defined as
R
SNR dB  20 log10    20 log10 (2 B )  B log10 (2)  6 B dB
Q
which is referred to as 6 dB bit rule.
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 1. Quantization process –Example
 In a digital audio application, the signal is sampled at a rate of 44
KHz and each sample quantized using an A/D converter having a
full-scale range of 10 volts. Determine the number of bits B if the
rms quantinzation error mush be kept below 50 microvolts. Then,
determine the actual rms error and the bit rate in bits per second.

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 2. Digital to Analog Converters (DACs)
 We begin with A/D converters, because they are used as the
building blocks of successive approximation ADCs.

Fig: B-bit D/A converter

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 2. Digital to Analog Converters (DACs)
 We begin with A/D converters, because they are used as the
building blocks of successive approximation ADCs.

Fig: B-bit D/A converter

 Vector B input bits : b=[b1, b2,…,bB]. Note that bB is the least

significant bit (LSB) while b1 is the most significant bit (MSB).

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 2. Digital to Analog Converters (DACs)
 We begin with A/D converters, because they are used as the
building blocks of successive approximation ADCs.

Fig: B-bit D/A converter

 Vector B input bits : b=[b1, b2,…,bB]. Note that bB is the least

significant bit (LSB) while b1 is the most significant bit (MSB).
 For unipolar signal, xQ є [0, R); for bipolar xQ є [-R/2, R/2).

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 2. DAC-Example DAC Circuit
Rf
 Full scale R=VREF, B=4 bit
I i

2Rf 4Rf 8Rf 16Rf xQ=Vout

MSB
bB
b1
LSB
-VREF
Fig: DAC using binary weighted resistor

 b1 b2 b3 b4 
 REF  2 R 4R 8R 16R
I  V     
 f f f f 
 b1 b2 b3 b4 
xQ  VOUT   I  R f  VREF     
 2 4 8 16 
xQ  R 2 4  b1 23  b2 22  b3 21  b4 20   Q  b1 23  b2 22  b3 2 1  b4 20 

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 2. D/A Converters
 Unipolar natural binary xQ  R (b1 21  b2 22  ...  bB 2 B )  Qm

where m is the integer whose binary representation is b=[b1, b2,…,bB].

m  b1 2 B 1  b2 2 B 2  ...  bB 20

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 2. D/A Converters
 Unipolar natural binary xQ  R (b1 21  b2 22  ...  bB 2 B )  Qm

where m is the integer whose binary representation is b=[b1, b2,…,bB].

m  b1 2 B 1  b2 2 B 2  ...  bB 20

 Bipolar offset binary: obtained by shifting the xQ of unipolar natural

binary converter by half-scale R/2:
1 2 R B R
xQ  R(b1 2  b2 2  ...  bB 2 )   Qm 
2 2

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 2. D/A Converters
 Unipolar natural binary xQ  R (b1 21  b2 22  ...  bB 2 B )  Qm

where m is the integer whose binary representation is b=[b1, b2,…,bB].

m  b1 2 B 1  b2 2 B 2  ...  bB 20

 Bipolar offset binary: obtained by shifting the xQ of unipolar natural

binary converter by half-scale R/2:
1 2 R B R
xQ  R(b1 2  b2 2  ...  bB 2 )   Qm 
2 2
 Two’s complement code: obtained from the offset binary code by
complementing the most significant bit, i.e., replacing b1 by b1  1  b.1
1 2 R B
xQ  R(b1 2  b2 2  ...  bB 2 ) 
2
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 2. D/A Converters-Example
 A 4-bit D/A converter has a full-scale R=10 volts. Find the
quantized analog values for the following cases ?
a) Natural binary with the input bits b=[1001] ?
b) Offset binary with the input bits b=[1011] ?

c) Two’s complement binary with the input bits b=[1101] ?

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 3. A/D converter
 A/D converters quantize an analog value x so that is is represented
by B bits b=[b1, b2,…,bB].

Fig: B-bit A/D converter

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 3. A/D converter
 One of the most popular converters is the successive approximation
A/D converter

Fig: Successive approximation A/D converter

 After B tests, the successive approximation register (SAR) will hold

the correct bit vector b.
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 3. A/D converter
 Successive approximation algorithm

1 if x  0
where the unit-step function is defined by u ( x)  
0 if x  0
This algorithm is applied for the natural and offset binary with
truncation quantization.
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 3. A/D converter-Example
 Consider a 4-bit ADC with the full-scale R=10 volts. Using the
successive approximation algorithm to find offset binary of
truncation quantization for the analog values x=3.5 volts and x=-1.5
volts.

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 3. A/D converter
 For rounding quantization, we  For the two’s complement
shift x by Q/2: code, the sign bit b1 is
treated separately.

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 3. A/D converter-Example
 Consider a 4-bit ADC with the full-scale R=10 volts. Using the
successive approximation algorithm to find offset and two’s
complement of rounding quantization for the analog values x=3.5
volts .

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 Homework
 Problems 2.1, 2.2, 2.3, 2.5, 2.6

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