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Amplifier Amplifier Designed Enough Speakers,: Signal. Input Signal

A power amplifier is an electronic amplifier designed to increase the power of an input signal to a level high enough to drive loads like speakers or transmitters. It has input and output matching networks to match the impedances and maximize power transfer. The amplifier is characterized by its gain, bandwidth, output power, and reflection coefficients, which can be represented using an S-matrix. For stability, the magnitude of the input and output reflection coefficients must be less than 1.

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0% found this document useful (0 votes)
119 views20 pages

Amplifier Amplifier Designed Enough Speakers,: Signal. Input Signal

A power amplifier is an electronic amplifier designed to increase the power of an input signal to a level high enough to drive loads like speakers or transmitters. It has input and output matching networks to match the impedances and maximize power transfer. The amplifier is characterized by its gain, bandwidth, output power, and reflection coefficients, which can be represented using an S-matrix. For stability, the magnitude of the input and output reflection coefficients must be less than 1.

Uploaded by

19058nithish
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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59.

POWER AMPLIFIER

A power amplifier is an electronic amplifier designed increase the power of a


to
given input signal.
The power of the input signal is increased to a level high enough
1o drive the loads of output devices like
speakers, RF transmitter, etc.
Transmission Lines and RF Systee
5.36
matching networks is
amplifier with input and output
A general single shape are gain, gain flatness
shown in Fig.5.24. The characteristics
of power amplifier
and noise figure
and reflection coetficients,
Dandwidth, output power, input output
characterised through its S-matriX.
The amplifier shown in Figure is
fs IL
Output PL Load
RF
Input
matching Amplifier matching
Source IS] network
network

Tn Tout
anmplifier system
Fig. 5.24. General single stage
in Fig.5.25(a) and its signal flow graph
The simplified amplifier system is shown
is shown in Fig.5.25(b).
Ts

Zs P inG
IS
P

Vs s
a1 1 a2 D2
a
Fin out Tin
(a) Simplijfied single stage amplifier

bs b 1 a S21 1 a2 bs
O-

S11 S22/ TL

a1 b S12 a2 b2
(b) Signalflow graph
Fig. 5.25.
The normalised incident power waves at port I and 2 are Q, and Q, respecu ely
The normalised reflected powerwaves at portl and 2 are b, and b, respectively
The ratio of b, to a, is called input retlection coefficient.
RF Systemn Design Concepts 5.37

b Su
The source reflection cocflicient is the ratio of b, to a, (extended nodes)

T's
b
a

If Z, is the characteristic impedance between input side and output side and Z is
the source impedance, then

bsZ+Z "s
From the signal flow graph,
At node b. b= bs+ a, I's

Substitute the value ofa,

b= b+ b, Tnrs
bsb-b, TnTs
bs
b 1-.Ts
The incident power wave associate with b, is given by

Pinc 6141bs2
2 211- IsI
This is the power applied to the amplifier.
The actual input power P, observed by the amplifier is composed of the incident
and reflected power waves.

PnPne|T*Pne
where P,1r,, is the power of retlected wave in opposite direction.

P Pnc(1-|TF)
5.38 Transmission Lines and RF
System
Substitute the value of Pine: Pin 2 |1-r, E(1 -| P)
The maximum power transfer from the source to the
amplifier occurs if the input
impedance is complex conjugate ofsource impedance. (Zin =Z5)
In terms of reflection coefficients, r
Under the condition of maximum power transfer, the available power P^ is
bs12
21-r r -|T;P)
bs12
- 2 |1-|Ts

If =0, then Pinc = S


2
5.11. STABILITY CONSIDERATIONS
If the
Any amplifier must have stable performance in the given frequency range.
to the source. When
amplifier is not properly terminated, there is return voltage wave
it causes
the return voltage increases in magnitude in the case of positive feedback,
network which
instability (oscillates). RF amplifier is considered as a two-port
described by source
characterised through S parameters and external termination
transmission coefficient r1. For stability the
transmission coefficient Is and load
magnitude of reflection coefficients are less than unity.
ITs<1and |TL|<1

S-LA<1
1-S2TL
Sap-sA
ITo 1-S s
where A = S,1 S22-S,2 S21

port, substituting the following complex


quantities in | Tn
In terms of output
equation.
Sy S+js
S22 S +js
AR = A+ja'

TL +jrt
Tt gives output stability circle equation

(r -C +(T -C)} =r
the circle radius isrout
IS S
where,
IS-1a
5.42 Transmission Lines and RF
Systems
Centre of the circle is located at C CoutJod
(S-Si,A)
S22-14
In terms ofinput port, substituting the complex quantities in | TL equation.

It yields the input stability circle equation.


(r-C+r,-c -
CC+jC,
(S1-S A)
S,F-14
The output stability circle and input stability circle plotted in
are
TL-plane and
Ts-plane respectively as shown in Fig.5.26.
Tout = 1 rS
Tin1
ITLI=1 out
ITsl=1
Cout Cin

1Cout Cin r

(a) Output stability circle (b) Input stubility circle


Fig. 5.26. Stability circle |nl=I in the complex I planeand stability circle | Toue
in the compler Ts plane
For outputstability circle, TL=0, then | Tinl= |Sl
Case 1: S<1
For this case, the origin (point T= 0) is part of the stable region as in Fig.5.27(a)
Case 2: | S1|>1|
For this case the origin is part of the unstable region. The stable region betwecn
the output stability circle | Tin=1 and the | Tl= l and the | T,
| =
l circle isshadeu
as shown in Fig.5.27(b).
RF System Design Concepts 5.43

r in 1 inl 1
Unstable Stable
Tout out
Cout Cout

1Cout 1Cout r
Stable Unstable

ITLI= 1
ITLI=1

(a) Shaded region is stable, (b) Stable region excludes the origin,
since | S1 <1 L0,since | S|>1
Fig. 5.27. Output stability circles denoting stable and unstable regions

Similarly for input stability circle, ifrs=0,then | rou= | S22|


Case 1: 1S221 < 1

For this case, the origin (Ts = 0) is part of the stable region as shown in

Fig.5.28(a).

out= 1 ITout 1

Unstable Stable
in
Cin Cin

Unstable
1Cin Cin

Stable

ITs=1 ITs=1

(a) 1S|<1 (b) 1S2>1

Fig. 5.28. Iuput stability circles denoting stuble and unstable regions
5.44 Transmission Lines and RF Systems

Case 2: |S2> 1

For this case, origin is part of the unstable region.


the
The shaded region in
between input stability circle T = 1 and the |T's=
1 circle is stable as in
Fig.5.28(b).
SOLVED EXAMPLES
5.(. MlAERS

RF mixer is used in upconversion and down conversion modulus of RF


transceiver. It converts IF to RF for
upconversion and RF to IF for down conversion.

RF power
Mixer amplifier L LNA Mixer
IF RF IF

LO
(a) Upconversion (b) Dowvn conversion

Fig. 5.19. Upconversion and down conversion


F System Design Concepts 5.31

Fig.5.19 shows the upconversion in transmitter and down conversion in iver.


rce
ver has inputs and one output. At the transmitter, the mixer multiply the
two
Mixer inpu
ienal
signa
of centre frequeney /F with local oscillator frequency SLo The output of the
mixer is ultiplied signal with frequencies/10 +/p. After passing through high pass
mixer is mnul

filter, the upper frequency component L0+SF known as Radio frequency (RF)
is
selected for
selected transmission. At the receiver, the received RF signal after
oreanmplification in LNA is applied to mixer. Mixer multiply this RF signal GLotJiF)
with local osCillator freguency Lo) and produce the multiplied signal RE TJLo
After passing through the low pass filter, lower frequency component
is selected tor
REJLoJLo tJIF -JLo =JIF)JIF known as intermediate frequency
further processing.
* * * * * : * * * : * * * * * *

******* n*******************?* *******************1np-**


5.7.1. Signal Ended Mixer Design ***

*****************

diode as
The simple and least eff+cient is the single ended design with Schottky
are applied to the
shown in Fig.5.20(a). The RF signal and local frequency signal
IF. The improved single
biased Schottky diode with a tuned circuit to tune the desired
ended mixer design with FET to provide a gain is shown in Fig.5.20(b).

VLot
VRF(1) ( )
VIF(t) VIF(t)

VLolt)( VRt(

(b) FET Mirer


(a) Diode Mixer

Fig. 5.20. Single ended mixers

Let VRF ) A cos


@gF
VIo) = B cos @Lo

device.
applied to the active (non-linear)
VIF()=VRe(0)- VLo)
A cos @RFtB cos Lo
5.32 Transmission Lines and RF tems
VIF ( ) = AB cos oRE Cos OLo

AB
cos (0RF t 1o)I+ cos (oRF-LO)

It gives the new frequency components @pRE+ OLO RF OLo

By passing through the low pass filter, it filters out IF signal.

AB
VF2 cos (RF-OLo)

@F @RF-OLO
S JRE-fo
FET is less prone to undesired higher order harmonic terms than the diodes and
BJTs. FET has a lower noise power than BJTs.
The conversion loss (CL) of a mixer is defined as the ratio of supplied input RF
power to the obtained IF power.

Conversion loss =
10 logP(PRE
When BJT or FET is used, it is specified by conversion gain (CG). It is the
inversion of the power ratio.
Noise figure of mixer is

nOt
F PaiCG
PnnR
When high conversion gain and low voltage bias conditions are needed, BJT can
be used instead of FET.
****** **********2 **

5.7.2, Double Balanced Mixer


******* ** *********

The double balanced mixer is made up of four diodes arranged in a bridge rectifier
configuration, as shown in Fig.5.21. The additional diodes provided better isolation
and bettersuppression of spurious signals. The double balanced design eliminatesa
even harmonics. But LO needs high drive
power and high conversion loss. The inpu
and output transformers enable a symmetric
mixing with LO signal and provIde>
decoupled paths.
Design Concepts 5.33
oF System

JLO

-
fF

Fig. 5.21. Double balanced mixer


5.6. LOW NOISE AMPLIFIER

At the front end of the receiver, a low noise amplifier (LNA) amplifies a very low

power signal without sacrificing its signal to noise ratio. LNA minimises the noise
which is introduced by the amplifier. This is done only by choosing the low noise
components, operating points, and circuit topologies of amplifier. LNAs are the
building blocks of communication systems and instruments. The four important
parameters in LNA are gain, noise figure, and impedance matching.
Noise factor is the ratio of input signal to noise ratio to the output signal to noise
LNA has a
ratio. Noise figure is defined as the noise factor in decibels (dB). A good
the
low noise figure (2 dB) and enough gain to boost the signal (15 dB). In general,
Transmission Lines and RF Systemo
5.28
Source impedance is matched to the input impedance because that will maximise the

power transfer from the source to the device.

.
5.6.1. Bipolar LNA
*********

The simple common emitter LNA is shown in Fig.5.l6(a). The transistor Q, and

Current I, are used to bias the transistor Q,. Resistor R, isolates the signal path fror

the noise of Q. If R, >> R_, the effect of bias circuit upon the LNA's performance

can be neglected.
The input referred noise voltage per unit bandwidth is given by

V-4T+7 4KT(,*2
R 21c
To reduce the noise voltage V, the Rea must be low value. So the transistor Q,
must be relatively large biased at high current Ic. For the noise figure of 2 dB, Rs
29 2. Large device size increases the input capacitance and diffusion capacitance and
base shot noise. Because of these reasons noise figure attains a low value for a proper
choice of device size and bias current of transistor Q1.

Ncc +Vcc
Vout
Rc O Rs
-oVout wwH T
Rs R2
wT wwQ2

ww
R1
(a) Simple bipolar LNA (b) LNA with buse shot noise

Fig. 5.16.

To get accurate noise voltage, base shot noise is included as a current soure
(Fig.5.16(b)).
4 kT ' B
2 VT
RFSystem Design Concepts 5.29
The total input referred noise voltage including the source resistance Kg IS

1&Rs
4 T Rst rht 2
gm2p
The noise figure, NF tot Sm
4 8m
=

4 KT R
=

1+R2gRs 2

5.6.2. Two Stage LNA


The two stage LNA is designed to minimise the noise figure and maximise the
gain. The tirst stage has to drive the input capacitance of the second stage and exhibit
sufficient gain to minimise the noise. Fig,5.17 shows the simplified circuit of LNA
consisting of two common emitter stages, one with inductive generation and other
with resistive feedback. The function of the inductor L, is to allow the conjugate
matching of the input and linearises the circuit.

+Vcc
+Vcc

ww-H Vout

Vin

Le

Fig. 5.17. Two stage LNA

8me
The input impedance is
ZrC*L,3*T,
With proper choice of g L, and Cq , last two terms are cancelled.

Then, Zn + C.
=
50 2

The feedback in the second stage serves to both linearise the circuit and lower the

output impedance.
5.30 Tr
Transmis.sion Lines and R
Systems
w
5.6.3. Cascode CMOS LNA
For RF applications, MOSFETs are most preferred than tripolar devices because of
its linearity and low noise. A cascode CMOS LNA is shown in Fig.5.18. A cascode
amplifier consists of a common emitter stage loaded by the source of common gate
stage. It has a high gain, high input and output impedances, and high bandwidth. The
inductors Ls and L are used for conjugate matching at the input of common source
stage (M). The onchip inductor Lp at the output of common gate stage (M) provides
significant voltage gain. The common gate stage improves the stability of circuit and
provides the isolatioon.

+VpD

LD
- o Vout

M2

L1
Vin OOO00 M

Fig. 5.18. Cascode CMOS LNA


5.4. RF FIELD EFFECT TRANSISTORS
Field effect transistor is a voltage controlled device. It is also called as a
monopolar device because only majority carriers (one carrier type) are responsible for
current flow. A variable electric field controls the current flow from source to drain
by changing the applied voltage on the gate.
There are four types of FETs based on the gate connection to the conducting
channel.
i) Metal Insulator Semiconductor FET (MISFET): Gate is connected to the
channel through the insulation layer. (Metal oxide semiconductor FET
(MOSFET) belongs to this type (Fig.5.11(a).
Junction FET (JFET): The reverse biased pn junction isolates the gate from
the channel. (Fig.5.11(b)).

(iii) Metal Semiconductor FET (MESFET): The reverse biased pn junction is


replaced by a Schottky contact_ in JFET (Fig.5.11(c).

(iv) Hetero FET: The hetero structures utilise abrupt transitions between layers
of different semiconductor materials (GaAlAs to GaAs). High Electron
Mobility Transistor (HEMT) belongs to this type.
FSystem Design Concepts
5.21
Source Gate Drain
Insulator

P-type substrate Induced


n-channel

(a) Metal insulator


semiconductor FET (MISFET)
Source Gate Drain
Insulator

n
n

p substrate

(b) Junction field effect transistor (JFET)


Source Gate Drain

n MIIAn*
n

Buffer
Semi-insulating layer layer

c) Metal semiconductor FET (MESFET)

Fig. 5.11. Construction of(a) MISFET, (6) JFET, and (e) MESFET

MISFET and JFET have relatively low cut-off frequency because of large
pacitance formed in between gate and insulator. I hese devices can be operated upto
GHz. GaAs MESFET can be operated upto 60-70 GHz. But HEMT can operate
beyond 100 GHz.
5.22 Transmission Lines and RF Syste
MESFET is used in RF amplifier, mixer and oscillator
mainly circuits. The
operation of MESFET is almost same as that of JFET. Fig.5.12 shows the
the oDer
of MESFET in depletion mode. The Schottky contact develops a
space charge
operation
reoi
which affects the current flow from source to drain. The space charge extent d region
be controlled can
by gate voltage and it is given by
2E os
where V, is the barrier voltage.

Low Vps High Vos


D
Ves Vos
G
s G
n ytdsn n n

(a) Operation in the linear region (b) Operation in the saturation region

Fig. S.12.MESFETfor different drain-source voltages


The resistance (R) between source and drain is
L
R
o (d-ds) N
where Conductivity, o =
q 4, ND
W is the gate width.

The drain current is


I DS
R
ND
where Conductance, G =
oWd
L
As the drain source voltage increases, the space charge region increases nou
uniformly. When the space charge extends over the entire channel width d, tm
situation is called saturation.
RF System Design Concepts
5.23
The drain saturation voltage is
Np d2
Dsat 2e -(Va-Vos)
= V - V a + Vos

VGs-VTo
where Pinch-off voltage, V, 2E, d
Threshold voltage, VTO
Va-V
The drain saturation current is

Dsat G-V,-Vos)+ Vo-Vos


=. Ipss Vas
VTO
where IpSS is maximum saturation drain current

2
Dss- -
The transfer and output characteristics of an n-channel MESFET is shown in

Fig.5.13.
Ipt Linear Saturation

Ves 0

Vas <0

Vos/
Vos Vps

(a) Trunsfer characteristic (b) Output characteristic

Transfer and output clharacteristics ofan


n-clhannel MESFET
Fig. 5.13.

As the drain source voltage (V DS) increases, the drain current (15) is also increases
leads to channel pinch off (Vps2 VDsa). Then drain
linearly.Further increase in Vps
current (lp sat).
Current becomes the saturation

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