Ec8691 MPMC Question Bank
Ec8691 MPMC Question Bank
Ec8691 MPMC Question Bank
A processor is in A processor is in
minimum mode when maximum mode when
MN/MX is connected to MN/MX is grounded
+5V power supply
All the control signals All the control signals are
are generated by generated by bus controller
microprocessor chip 8288.
itself
3. Define Machine cycle. K1 CO2
Machine cycle is defined as the time required to
complete one operation of accessing memory, I/O or
acknowledging an external request. This cycle may consist
of three to six T-states.
8. List out the difference between CPU bus and system bus? K4 CO2
The CPU bus has multiplexed lines but the system bus
has separate lines for each signal. (The multiplexed CPU
lines are demultiplexed by the CPU interface circuit to
form system bus).
18. Compare and contrast the function of HOLD and HLDA K4 CO2
signal.
HOLD : it is an active input signal requesting for DMA
operation. It informs the processor that another master is
requesting to take over the system bus.
HLDA: it is an output signal sent by the 8086 on
receiving the HOLD request signal. This signal informs
the external device that the processor has accepted the
DMA request and the system bus are tristated.
19. List the minimum mode signals and maximum mode K1 CO2
signals.
Minimum mode signals : M/IO, INTA, ALE, DT/R,
DEN, HOLD, HLDA.
Maximum mode signals: S2,S1,S0, LOCK, QS1, QS0,
RQ/GT0, RQ/GT1.
26. Justify how main processor distinguish its instructions from K5 CO2
the co processor instructions when it fetches the
instructions from memory?
CPU differentiates 8087 instruction with the ESC
instruction. When ESC instruction is decoded bus control is
given to 8087 and then CPU deactivates TEST pin and
does the process.
27. List the advantages of loosely coupled system over tightly K1 CO2
coupled system.
(i) More number of CPUs can be added in a loosely
coupled system to improve the system
performance.
(ii) The system structure is modular and hence easy
to maintain and troubleshot.
(iii) A fault in a single module does not lead to a
complete system breakdown.
10. List the advantages and disadvantages of I/O mapped I/O. K4 CO3
Advantages:
(i) Program is simple.
(ii) The I/O instructions isolate memory and I/O so
that memory address is not affected by I/O
(iii) The I/O type instructions are usually less than
memory type instructions used in memory
mapped I/O.
(iv) The complexity of the device address decoder
depends only on the length of the device address
field in the I/O type instructions.
Disadvantages:
(i) Less powerful
(ii) Less flexible
(iii) Two additional control lines are needed for
issuing IOR and IOW signals.
11. How many address lines and data lines are necessary for K1 CO3
accessing 32Kx8 memory?
15 address lines.
12. List out the features of 8255. K4 CO3
(i) The 8255 has 24 I/O pins that are grouped into
three 8 bit ports namely port A,B,C.
(ii) The 8 bits of port C are grouped into 4 bit ports:
Cupper (Cu) and Clower(Cl). port A and port Cu are
grouped as group A and port B and port Cl are
grouped as group B.
(iii) The operation of the 8255 is classified into two:
I/O mode and BSR(Bit Set & Reset) mode.
(iv) The BST mode is used to set or reset the bits in
port C individually.
(v) The I/O mode is further divided into three:
Mode0, Mode1 and Mode2.
26. What are the tasks involved in keyboard interface? (or) K1 CO3
Mention the need for 8279.
The tasks involved in keyboard interfacing are sensing
key actuation, debouncing the key and generating key code
(Decoding the key). These tasks are performed software if
the keyboard is interfaced through ports and they are
performed by hardware if the keyboard is interfaced
through 8279.
35. List the need for 8259 Programmable Interrupt controller. K1 CO3
Programmable Interrupt controller is employed to
expand the interrupt inputs. It can handle the interrupt
request from various devices and allow one by one to the
processor.
37. Elaborate about the need for DMA controller (8237)? K6 CO3
The process of transferring data from memory to
peripheral device or peripheral to memory without
disturbing the MPU with the help of external hardware is
known as Direct Memory Access.
DMA controller generates address and control signals
required to control data transfer and allows peripheral
device to directly access memory.
43. What are the different types of ADC & DAC? K1 CO3
Types of ADC: Successive Approximation type, Flash
type, Counter type, Single slope and Dual slope
Types of DAC: Weighted Resistor type, R-2R ladder type,
Inverted R-2R ladder type.
UNIT 4 – MICROCONTROLLER
1. Define Microcontroller K1 CO4
A Microcontroller is a device which integrates a number
of the components of a microprocessor system onto a single
microchip and optimized to interact with the outside world
through on-board interfaces.
It contains Microprocessor with integrated peripherals
like memory, serial ports, parallel ports, timer/counter,
interrupt controller, data acquisition interfaces such as
ADC, DAC etc.
0 1 Bank 1
1 0 Bank 2
1 1 Bank 3
10. What is the size of program and data memory in 8051 K1 CO4
microcontroller?
Program memory:
Internal:4 KB
External: 64 KB
Data memory:
Internal: 128 bytes
External: 64 KB
14. Show the alternate functions for the port pins of port3. K2 CO4
P3.0 – RXD – Serial data input
P3.1 – TXD – Serial data output
P3.2 – INT0 – External interrupt 0
P3.3 – INT1 – External interrupt 1
P3.4 – T0 – Timer 0 External Input
P3.5 – T1 - Timer 1 External Input
P3.6 – WR – External Memory Write pulse
P3.7 – RD - External Memory Read pulse
15. Recall the interrupt sources in 8051. K1 CO4
External interrupt 0 (INT0)
Timer interrupt 0 (TF0)
External interrupt 1 (INT1)
Timer interrupt 1 (TF1)
Serial interrupt (RI/TI)
20. What are the jumps available in 8051? Mention their K1 CO4
ranges.
Absolute jump: 2 KB(0000h to 07FFh)
Short jump: -127 to 128 bytes
Long jump: 64 KB (0000h to FFFFh)
21. Show the function performed by CJNE and DJNZ K2 CO4
instruction in 8051.
CJNE: Compare and jump if not equal. The
magnitudes of the two operands given in the
instruction are compared and branching to a new
address occurs if they are not equal. The branching
address is also given in the instruction.
Eg: CJNE A, #40h, 08h
DJNZ: Decrements the operand given in the
instruction by 1 and branches to new address if the
result is not zero.
Eg: DJNZ R4, 08h
22. Which port is used as a multifunction port? List the signals. K1 CO4
Port 3 is used as a multifunctional port. Signals are:
RXD, TXD, INT0, INT1, T0, T1, and WR & RD.
7. Define double buffering (or) Write the need for SBUF K1 CO5
register.
A full duplex serial port can transmit and receive data
simultaneously. Transmission is initiated by writing a data
to the SBUF SFR which is a 8 bit register. Reception of
data is done by reading the data from the SBUF register,
the same address SBUF actually points to two different
registers, one for transmission and the other for reception.
This technique of having the same address for two different
registers is called double buffering.
13. What are the types of sensors used for interfacing? K1 CO5
Temperature sensor, Humidity sensor, Light sensor,
Acceleration sensor, Force sensor, Frequency sensor, Flow
sensor, Pressure sensor etc.
14. List out the instructions to access external ROM in 8051. K2 CO5
MOVC A, @A+DPTR
MOVC A, @A+PC
17. What are the different sequences available for the rotation K1 CO5
of stepper motor?
(i) Two phase 4 step sequence
(ii) Wave drive 4 step sequence
(iii) Half step 4 step sequence
4. Examine about 8087 numeric data processor with suitable diagrams K4 CO2
Features
Block diagram
Functional units
Control unit – status word register, control
word register, data buffer, queue
Numeric data unit – stack, microcode control
unit, programmable shifter, exponent mudule,
arithmetic module, tag register
Data types
UNIT 4 – MICROCONTROLLER
1. Model the architecture of 8051 Microcontroller with neat diagram. K3 CO4
Features
Block diagram
Description of each block
4. Explain how stepper motor is interfaced with 8051 and write ALP to K5 CO5
run clockwise and anticlockwise direction.
Stepper motor interfacing – (Page.no: 5.59 – 5.63)
ALP
5. Justify how external ROM and external RAM is interfaced with K5 CO5
8051.
8051 program memory organization
Interfacing external ROM with 8051 & Explanation
Instructions to access external ROM
6. Justify about ADC, DAC and sensor interface with 8051 K5 CO5
Microcontroller.
Definitions – (ADC, conversion time, step size)
Interface diagram of ADC0804 with 8051
Explanation of each signal in the diagram