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Interview Experience - NXP Semiconductors

The document summarizes the interview experience for a position at NXP Semiconductors. It describes technical rounds with two interviewers focusing on circuit design, programming, and semiconductor concepts. The first interviewer asked questions about circuit design, Verilog coding styles, and C programming. The second interviewer asked about analog design, capacitive coupling, electromigration, ASIC design flow, power dissipation, crosstalk, jitter, metastability, and FIFOs. In the final round, an HR representative asked questions about background, commute, motivation for the role, and other applications.

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0% found this document useful (0 votes)
325 views2 pages

Interview Experience - NXP Semiconductors

The document summarizes the interview experience for a position at NXP Semiconductors. It describes technical rounds with two interviewers focusing on circuit design, programming, and semiconductor concepts. The first interviewer asked questions about circuit design, Verilog coding styles, and C programming. The second interviewer asked about analog design, capacitive coupling, electromigration, ASIC design flow, power dissipation, crosstalk, jitter, metastability, and FIFOs. In the final round, an HR representative asked questions about background, commute, motivation for the role, and other applications.

Uploaded by

shwetabhagat
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Interview Experience- NXP Semiconductors

Technical Round
There were 2 interviewers in my panel.
INTERVIEWER 1( 20 yrs of experience)
● Tell me about yourself.
I hinted them about my technical interests( though I don’t think it mattered to them
anyway :-P)
● She had asked me, why I had left an easy question of circuit formation in
written was it because of time.
I told her that I had managed to do all the others, by the time I reached this particular
one, the time was up.
● The programming language you are most comfortable with (I had mentioned
Verilog, C, Python)
​For me it was Verilog(again I gues it didn’t matter to them)
● What is the difference between structural and behavioral style if coding in
Verilog.
● Write the structural code of the question left in written.
(Question -We are asked to design if sel is 00 then data should shift right by 1 clk
,sel=01 then by 2 clk, sel=10 by 3 clk , sel = 11 then shift right by 4 bits we have to
design this by using d ff and combinational gates.)
● Was asked to add another FF at output of Mux and explain the output.
● She then added AND gate and it’s input were the last DFF output and input of
the first DFF. Asked me to just tell me changes in code(as time was less)
● Will there be any role of casez in it?
I answered that no, there won’t be any high impedance state as such possible, so not
needed. (She appreciated this answer)
● In C what is preprocessor directive?
● How to allot YES as 1?
● Is it replaceable with anything?
● Asked a code in C having manipulation with pointers.
She just wanted to check how thorough I am with pointers and was impressed by
the answer
● Prime factor code using Python.

​INTERVIEWER 2 (17 yrs of experience)


● Are you comfortable with Analog?
To which I said no
● What is capacitive coupling?
● How can we remove it?
● What is electromigration?​( because I had used this word)
● Is capacitive coupling the only form of interwire problem?
● On what factors do delay in CMOS inverter depend?
● PD flow steps.
I was giving detailed answers. He stopped me in the middle and told that it is fine to
not get into the details of it.
● ASIC design flow steps.
● What happens after GDS?
● Why is packaging done?
(After this it just seemed like a rapid fire thing, he was just checking if I am aware of
the concepts)
● Different types of power dissipation.
● Different types of dynamic dissipation.
● How to reduce it?
● How to check functionality, timing, power of circuit?
● What is crosstalk?
● What is jitter?
● Why does jitter occur?
● What is metastability? How to avoid it?
● Explain FIFO and its use.

​INTERVIEWER 1
● Various ways to form voltage doubler.
● Showed me circuit, with 2 DFF and AND, NOT gates. Had to explain how it
functions.
It took time for me to figure it out because I wasn’t considering the correct input.
When I had almost reached the solution and she was satisfied with the logic, she
asked me to just tell me one functionality of it. I correctly said it is an input rising edge
detector and that was it.

HR Round
● Introduce yourself and family background.
● What kind of profile you prefer if made permanent.
● Experience of internship in DRDO
● How can you commute to office?
● Why NXP Semiconductors?
● Have you applied to any other company?
● Any questions for me?

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