LOGARITHMIC LOOK AHEAD ADDER

Shweta(2k21/vls/18)

Disadvantage of Carry lookahead adder

 The area of the implementation grows progressively with N. For a carry-lookahead

group of N bits, the transistor implementation has N + 1 parallel branches with up to
N+1 transistors in the stack. Since wide gates and large stacks display poor performance,
the carry-lookahead computation has to be limited to up to two or four bits practice.

 The large fan-in of the circuit makes it slow for larger values of N. Implementing it with
simpler gates requires multiple logic levels. In both cases, the propagation delay
increases. Furthermore the fan-out on some signals tends to grow excessively, slowing
down the adder even more. For instance, the signals Go and Po appear in the expression
for every one of the subsequent bits. Hence, the capacitance on these lines is
substantial.

Logarithmic Lookahead adder

In order to build very fast adders, it is necessary organize carry propagation and generation into
recursive trees. A more effective implementation is obtained by hierarchically decomposing the
carry propagation into subgroups of N bits

Co  0 = G 0 + P 0 Ci  0
C o 1 = G 1 + P 1 G 0 + P 1 P 0 Ci 0
C o 2 = G 2 + P 2 G 1 + P 2 P 1 G 0 + P 2 P 1 P 0 C i 0

=  G 2 + P 2 G 1 +  P 2 P 1   G 0 + P 0 Ci  0  = G 2:1 + P 2:1 C o 0

Advantages of Logarithmic Lookahead adder

 The crucial advantage is that the computation of the carry at position 2 - 1 takes only log
(N) steps. In other words, the output carry of an N-bit adder can be computed in log (N)
time. This is major improvement over the previously described adders.

 For example, for an adder of 64 bit the propagation delay of a linear adder is
proportional to 64. For a square-root select adder, it is reduced to 8, while, for a
logarithmic adder, the proportionality constant is 6
PARALLEL PREFIX ADDERS

Parallel-prefix adders, also known as carry-tree adders, pre-compute the propagate and
generate signals. These signals are variously combined using the fundamental carry operator
(fco).

(gL, pL) ο (gR, pR) = (gL+ pL•gR, pL• pR)

Due to associative property of the fco, these operators can be combined in different ways to
form various adder structures. For, example the four-bit carry look-ahead generator is given by

c4= (g4, p4) o [(g3, p3) ο [(g2, p2) ο (g1, p1)]]

A simple rearrangement of the order of operations allows parallel operation, resulting in a

more efficient tree structure for this four bit example is

c4= [(g4, p4) ο (g3, p3)] ο [(g2, p2) ο (g1, p1)]

It is readily apparent that a key advantage of the tree structured adder is that the critical path
due to the carry delay is on the order of log 2N for an N-bit wide adder. The arrangement of the
prefix network gives rise to various families of adders. Here BC is designated as the black cell
which generates the ordered pair in equation, the gray cell (GC) generates the left signal only.
The interconnect area is known to be high, but for an FPGA with large routing overhead to
begin with, this is not as important as in a VLSI implementation. The regularity of the Kogge-
Stone prefix network has built in redundancy which has implications for fault-tolerant designs.
This hybrid design completes the summation process with a 4-bit RCA allowing the carry prefix
network to be simplified. Parallel prefix adders allow more efficient implementations of the
carry look-ahead technique and are essentially, variants of carry look-ahead adders. Indeed, in
current technology, parallel prefix adders are among the best adders, with respect to area and
time is particularly suited for high speed addition of large numbers. In these parallel prefix
adders, mainly two types of Generate and Propagate bits are present. Generate and Propagate
concept is extendable to blocks comprising multiple bits. For each bit i of the adder, Generate
(Gi) indicates whether a carry is generated from that bit and

Gi= ai&bi

For each bit i of the adder, Propagate (Pi) indicates whether a carry is propagated through that
bit

Pi = ai exor bi
Kogge-Stone Adder

• The Kogge-Stone tree of has some interesting properties (First its interconnect structure
is regular, which makes implementation quite easy. Furthermore, the fan out
throughout the tree is fairly constant, especially on the critical paths. The task of sizing
transistors for optimal performance is therefore simplified.

• At the same time, however, the replication of the carry trees to generate the
intermediate carries comes at a large cost in terms of area and power

Implementation using Kogge-Stone Adder

Brent – Kung Tree

• The forward binary tree realizes the carry signals only at positions 2n -1. The forward
binary-tree structure is not sufficient to generate the complete set of carry bits. An
inverse binary tree is needed to realize the other carry bits

• The resulting structure, commonly called the Brent-Kung adder, uses 27 dot gates, or
almost half of the 49 needed for a Kogge-stone tree, and it needs fewer wires as well.
The wiring structure is less regular, however, and fan-out varies from gate to gate,
making performance optimization more difficult.
In general, most of the adders use carry-in and the corresponding bits of two numbers (A and B)
to get the corresponding sum bit and carry-out - with ripple carry adders taking O(n) time for
carry to reach MSB.

 Considering that A = an an-1 … a1 and B = bn bn-1 … b1 both be n-bit binary numbers.

 With sum being S = sn+1 sn … s1 and carry generated in each stage C = cn … c0 will be carry-in
to next stages.

c0 = 0, and i the sum bit and carry bit generated are

ci = gi ∨ (ai ∧ ci-1) ∨ (bi ∧ ci-1),
si = ai ⊕ bi ⊕ ci-1 for i = 1, 2, … n
sn+1 = cn respectively.

 It is possible to transform the above ripple carry into carry-lookahead (CLA) by defining the
carry bit i as
c0 = 0,
ci = gi  (pi ∧ ci-1) where
gi = ai ∧ bi and
pi = ai ⊕ bi for i = 1, 2, … n.
p and g are known as carry propagate and carry generate. This corresponds to the fact that
the carry ci is either generated by ai and bi or propagated from the previous carry ci-1.
Brent and Kung further transformed the carry generation and propagation by defining an
operator o as
(a1, b1) o (a2, b2) = (a1 ∨ (b1 ∧ a2), b1 ∧ b2).

 They also defined a function (Gi, Pi) =(g1, p1) for i = 1;

otherwise (gi, pi) o (Gi-1, Pi-1) for i = 2, 3, … n.
It can be derived that Gi in the function is equivalent to ci. Also (Gn, Pn) can be non-
recursively written as = (gn, pn) o (gn-1, pn-1) o … o (g1, p1).
Taking advantage of the associativity of operator o (Gn, Pn) can be computed in a tree-like
manner. The design of the white nodes is obvious as they are just buffering the gi's and pi's, and
the black nodes are performing operation defined by operator o, which is similar to a one bit
adder.

 This tree-like propagation of carry reduces its critical path to that of tree height. As the
carry tree height can be maximum of  O(log2n), the critical path of the Brent–Kung parallel
adder is also  O(log2n), which is better than the normal adder performance of O(n). The
tree-based layout also reduces the chip area and redundant wiring required in general CLA-
based adders
Conclusion

• On average, a lookahead adder is several times larger than a ripple adder, but has
dramatic speed advantages for larger operands.

• The logarithmic behavior makes it preferable over bypass select adders for larger values
of N.

• The exact value of the cross point depends heavily on technology and circuit design
factors