DSP Question Bank
DSP Question Bank
DSP Question Bank
Part- A
1. Sketch the discrete time signal x(n) =4 δ (n+4) + δ(n)+ 2 δ (n-1) + δ (n-2).
2. Define twiddle factor. Give the properties of Twiddle factor.
3. Find z-transform and the stability of the system whose impulse response is h(n)=(2) n u(n).
4. Write the properties of frequency response of LTI system.
5. What is zero padding? Why it is needed?
6. Write any two properties of DTFT.
7. Write the procedure for FIR filter design by Fourier series method.
8. What is decimator of discrete time signals?
9. Compare DIT, DIF FFT algorithms.
10. State DFT pairs.
11. Show that circular convolution is equal to linear convolution.
12. What are the methods of linear and circular convolutions?
13. Find the DFT of unit step and impulse Signals.
14. Give the relation between DFT and z transform.
15. Give the relation between DFT and DTFT.
16. List the properties of DFT.
17. Draw the basic butterfly structure for the DIT, DIF algorithms.
18. Define aliasing and how do you avoid it, mention its effects.
19. Draw the Simple block diagram of DSP.
20. Compare analog and digital filters.
21. List out the methods of converting analog IIR filter into digital filter.
22. Tell the advantage of BLT over IIV methods.
23. Mention the properties to be maintaining when converting analog filter into digital.
24. Classify the types of IIR filter.
25. What are the frequency selective filter, why its called so?
26. Mention the limitations of BLT over IIV methods.
27. Define s plane and z plane.
28. What you mean by realization? List the methods of realizations in IIR filters.
29. List the methods of realizations in FIR filters.
30. Mention the advantages of D-II and linear phase structures.
31. How many adders, multipliers and delay elements in D-I,D-II structures.
32. Define poles and zeros.
33. Give example to all zero and pole zero systems.
34. Define transition band.
35. Define normalized cut off frequencies.
36. State the stability criterion for digital FIR filter.
37. Why FIR filter is stable and linear phase filter?
38. What are the needs of multi rate signal processing?
39. Define a shift invariant system.
40. Write any circular frequency shift propertie of DFT.
41. Compare IIR and FIR filters.
42. What is Gibbs phenomenon? How can reduce it.
43. What is interpolation?
44. Why do you go for windows?
45. List the types of windows.
46. What are the desirable characteristics of windows?
47. Compare different types of windows.
48. What are the needs of multirate signal processing?
49. Compare single rate and multi rate signal processing.
50. What you meant by sampling rate converters.
51. Conclude interpolator and decimators are LTI systems.
52. List some applications of multi rate signal processing.
53. List some applications of DSP.
54. What is BIBO stability? What is the condition to be satisfied for stability?
55. State natural and force response.
56. Differentiate between Decimation-in-time and Decimation-in-frequency
57. State and prove Time shifting property of DFT.
58. Find the IDFT of X(k) = {1, 2, 3, 4}.
59. Give the various mathematical operations performed on discrete time signals.
60. Find the 4 point DFTof x(n) = {2,1,2}.
61. Show the relation between Fourier transform and Z-transform.
62. Write the conditions for a linear phase FIR filter.
63. List the applications of Multirate DSP.
64. What is warping and prewarping? Why it is employed?
65. What are the desirable characteristics of the frequency response of window function?
66. How sampling rate conversion is done in digital domain?
67. Tell the procedure for designing FIR filters using windows
68. Write short notes about multi rate signal processing.
69. Give two examples for multi rate signal processing.
70. What are the advantages of FIR filters over IIR filters?
71. What are the DSP computations building blocks?
72. What are the factors considered for selection DSP processors?
73. Compare general purpose, special purpose DSP’S.
74. List some specific applications of DSP.
75. Define pipelining and it advantages.
76. Define Hardware looping.
77. Define bus. What are the buses in DSP.
78. Compare harward and von newman architectures.
79. List the hardware features of DSP.
80. Define Pipeline Depth
81. Define Interlocking.
82. What are the advantages of Digital Signal processing?
Part-B
UNIT-1
1. Determine the impulse response h(n) for the system described by the second order difference
equation y (n) – 4 y (n-1) + 4 y (n-2) = x (n-1)
2. Find the magnitude and phase response for the system characterized by the difference equation
3. y(n) = ½ x (n) + x (n-1) + ½ x (n-2)
4. Define DFT and IDFT. State and prove any Three Properties of DFT
8. Determine H(K) for the sequence h(n) = {-1,0,7,0} using DIT-FFT algorithm.
9. What are the differences and similarities between DIT and DIF-FFT algorithm?
10. Compute 4-point DFT of a sequence x (n) = {0, 1, 2, 3} using DIT algorithm.
11. Find the IDFT of the sequence using DIF algorithm X (k) = {10, -2-j2, -2, -2+j2}
12. Determine the impulse response Y(n) if h(n) = {1,1,1} and x(n) = {1,2,3,1} using Linear
convolution method.
13. Find the IDFT of the sequence X(K) = {10, -2+2j, -2, -2-2j} using DIT algorithm.
UNIT-II
1. Discuss the steps involved in design a digital Chebyshev low pass filter.
4. Using a rectangular window technique, design a low pass filter with pass band gain of unity,
cut-off frequency of 1000Hz and working at a sampling frequency of 5 KHz. The length of the
impulse response should be 7.
5. Explain the design of IIR filter by impulse invariant transformation method.
6. Determine the order of low pass Butterworth filter that has 3dB attenuation at 500 Hz and an
attenuation of 40dB at 1000 Hz.
8. For the analog transfer function H(s) = 2 / {(s+2) (s+3)}. Determine H (z) using impulse
invariance method. Assume T = 1 sec.
9. What is Bilinear Transformation? Sketch the mapping of S-plane to Z-plane in Bilinear
Transformation.
UNIT-III
1. An LTI System is described by the equation y(n) = x(n) + 0.81x(n-1) - 0.81x(n-2) - 0.45y(n-2)
.Determine the transfer function of the system. Sketch the poles and zeros on the Z-Plane
2. Obtain the cascade and parallel form structures for the following systems described by the
Difference equation: y (n) + 0.1 y (n - 1) - 0.72 y (n - 2) = 0.7 x (n ) - 0.252 x (n - 2)
3. Draw the generalized Direct form realization of a linear phase FIR system
for N even ii) for N odd.
4. What are the basic elements used to construct the block diagram of discrete time systems?
5. Draw the direct form -I structure of second order IIR system with equal number of poles and
zeros.
6. Realize the given system in Cascade form H(Z) = 1+1/2Z-1 / (1-Z-1+ 1/4Z-2) (1-Z-1+ 1/2Z-2).
7. Draw the direct structure for FIR filter when its h(n)= {3,2,5,7}.
UNIT-IV
1. With suitable example explain the decimation and interpolation operation.
2. Define decimation and interpolation and describe the sampling rate conversion by I/D.
3. Consider the discrete time signal x(n)= {1,-1,2,-2}, sketch the unsampled version of the signals
for I=3.
6. Discuss the sampling rate conversion by a factor I with the help of a neat block diagram.
7. Consider the discrete time signal x(n)={1,2,3,4,5,6,7,8,9,10,11,12},determine the down
sampled version of the signals for sampling rate reduction factor D=3.
9. Consider the discrete time signal x(n)={1,2,3,4},determine the up sampled version of the
signals for sampling rate reduction factor I=3.
10. Define a ramp sequence and sketch its interpolated and decimated versions with a factor of 3.
11. Consider the discrete time signal x(n)= {1,2,3,4,5,6,7,8,9,10,11,12}, determine the down
sampled version of the signals for sampling rate reduction factor D=4.
12. What is sampling rate conversion? Discuss how sampling rate conversion is done in digital
domain?
13. Explain any two application of Multi rate DSP in speech processing.
14. Discuss about multi stage implementation of sampling rate conversion by I/D rational factor.
UNIT-V
1. Highlights the Basic Architectural features DSP processors.
2. Discuss about DSP Computational Building Blocks
3. Explain the Bus Architecture and Memory Architecture of DSP.
4. Discuss in details about Data Addressing Capabilities,
5. Elaborate the Address Generation Unit of DSP.
6. Discuss about the Speed Issues of DSP’s.
7. Hardware looping, Interrupts, Stacks, Relative Branch support,
8. Explain in detail about Pipelining and its Performance.
9. Brief about Branching effects.
10. Discuss about Interrupt effects.
11. Explain the block diagram of a DSP.