Index

Sr.
Contents Page No.
No.

Annexure I– Micro Project Proposal 1-2

1.Aims/Benefits of the Micro-Project 1

2. Course Outcome Addressed 1

1 3.Proposed Methodology 1

4. Action Plan 2

5. Resources Required 2

6. Name of Team Members with Roll No.’s 2

Annexure II – Micro Project Report 3-8

1.Rationale 3

2.Aims/Benefits of the Micro-Project 3

3.Course Outcome Achieved 3

4. Literature Review 3

2 5.Actual Methodology Followed 4

5.1 Flow chart 5

5.2 Source code 4-6

6.Actual Resources Used 7

7.Outputs of Micro-Projects 8

8. Skill developed / Learning out of this Micro-Project 8

9. Applications of this Micro-Project 8

Annexure I

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 Micro Project Proposal

Half Adder

1. Aims/Benefits of the Micro-Project:

The Half-Adder is a basic building block of adding two numbers as two inputs and
produce out two outputs. The adder is used to perform OR operation of two single bit
binary numbers. The augent and addent bits are two input states, and 'carry'
and 'sum 'are two output states of the half adder.

2. Course Outcome Addressed:

1. Use number system and codes for interpreting working of digital system.
2. Use Boolean expressions to realize logic circuits.
3. Build simple combinational circuits.
4. Build simple sequential circuits.
5. Test data converters and PLDs in digital electronics systems.

3. Proposed Methodology:
Half adder is a combinational arithmetic circuit that adds two numbers and produces a
sum bit (S) and carry bit (C) as the output. If A and B are the input bits, then sum bit
(S) is the X-OR of A and B  and the carry bit (C) will be the AND of A and B. From
this it is clear that a half adder circuit can be easily constructed using one X-OR gate

and one AND gate. Half adder is the simplest of all adder circuit, but it has a major
disadvantage.  The half adder can add only two input bits (A and B) and has nothing
to do with the carry if there is any in the input. So if the input to a half adder have a
carry, then it will be neglected it and adds only the A and B bits.

4. Action Plan:

1
Sr. Planned Planned Name of Responsible
Details of Activity
No. Start date Finish date Team Members
1 Search the information of 14-012-2020 17-12-2020
different database 3:00 – 5:00 3:00 – 5:00
PM PM
2 Collect the information of 19-12-202 21-12-2020
different database 3:00 – 5:00 3:00 – 5:00
PM PM
3 Analysis of different 24-12-2020 28-12-2020
Avadhut Prakash
information 3:00 – 5:00 3:00 – 5:00
Deshmukh
PM PM
4 Analysis of information 31-12-2020 02-01-2021
3:00 – 5:00 3:00 – 5:00
PM PM
5 Compression of Database 04-01-2021 07-01-2021
3:00 – 5:00 3:00 – 5:00
Birajdar Dhiraj
PM PM
Vijaykumar
6 Features of Database 09-01-2021 11-01-2021
3:00 – 5:00 3:00 – 5:00
Chinmay Sanjayrao
PM PM
Joshi
7 Advantages and drawback 15-01-2021 18-01-2021
of database 3:00 – 5:00 3:00 – 5:00
PM PM
8 Final report of project 21-01-2021 23-01-2021
3:00 – 5:00 3:00 – 5:00
PM PM

5. Resources Required:
Sr.
No Name of resource / material Specification Quantity Remarks
.
1 Computer WINDOWS 7,2GB RAM, 1
160GB HDD
2 Operating System WINDOWS 7 1
3 Software Oracle Database 10G 1
4 Browser Google Chrome 1

2
Names of Team Members with Roll No.’s:
Sr.
Enrollment No. Name of Team Member Roll No.
No.
1 2010950130 Avadhut Prakash Deshmukh 54
2 2010950124 Chinmay Sanjayrao Joshi 48
3 2010950125 Dhiraj Vijaykumar Birajdar 49

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Mr. Lokre A. P

Name and Signature of the Teacher

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 Annexure – II

Micro-Project Report

Half Adder

1. Rationale:
An adder is a digital logic circuit in electronics that is extensively used for the
addition of numbers. In many computers and other types of processors, adders are
even used to calculate addresses and related activities and calculate table indices in
the ALU and even utilized in other parts of the processors. These can be built for
many numerical representations like excess-3 or binary coded decimal. Adders are
basically classified into two types: Half Adder and Full Adder

2. Aims/Benefits of the Micro-Project:

The Half-Adder is a basic building block of adding two numbers as two inputs and
produce out two outputs. The adder is used to perform OR operation of two single bit
binary numbers. The augent and addent bits are two input states, and 'carry'
and 'sum 'are two output states of the half adder.

3. Course Outcomes Achieved:

1. Use number system and codes for interpreting working of digital system.
2. Use Boolean expressions to realize logic circuits.
3. Build simple combinational circuits.
4. Build simple sequential circuits.
5. Test data converters and PLDs in digital electronics systems.

4. Literature Review:
An adder is a digital circuit that performs addition of numbers. In
many computers and other kinds of processors adders are used in the arithmetic
logic units or ALU. They are also used in other parts of the processor, where
they are used to calculate addresses, table indices, increment and decrement
operators and similar operations.

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5 Actual Methodology Followed:

A half adder is used to add two single-digit binary numbers and results into a two-
digit output. It is named as such because putting two half adders together with the use
of an OR gate results in a full adder. In other words, it only does half the work of a
full adder.

The adder works by combining the operations of basic logic gates, with the simplest
form using only a XOR and an AND gate. This can also be converted into a circuit
that only has AND, OR and NOT gates. This is especially useful since these three
simpler logic gate ICs (integrated circuits) are more common and available than the
XOR IC, though this might result in a bigger circuit since three different chips are
used instead of just one.

6.Actual Resources Used:

Sr. No. Name of Resource Specification Quantity

Used

1 Digital Multimeter 3 ½ digital 1

display

2 IC Tester Digital 1

3 Breadboard 5.5 cm * 17 1
cm

4 DC power supply +5 V 1

5 IC 7400 1

6 Resistors 330 ohm 2

7 Connecting wires Single strand As per

0.6mm required

8. LED Red/yellow 2
color
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 Pin Configuration of IC 7400:

0.4 Logic diagram of NAND gate

Sum= A XOR B
Carry = A AND B

0.5 Truth table

The half adder K-map is

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 HA K-Map

Half Adder Limitations

The main reason to call these binary adders like Half Adders is, that there is no
range to include the carry bit using an earlier bit. So, this is a main limitation of
HAs once used like binary adder particularly in real-time situations which
involve adding several bits. So this limitation can be overcome by using the full
adders.

0.6 Components:-

1. General purpose PCB

2. 14 pin IC socket

3.7400 IC

4. Connecting Wires

5. Resistor

6. LED

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7. Outputs of Micro-Projects:

8. Skill developed / Learning out of this Micro-Project:

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 1. Simple design, basic building block to understand 1 bit addition.
2. Just with inverter it can be converted to Half subtractor.
3. It does not incorporate (or take care of) previous carry for addition.
4. Hence it is not suitable for cascading for multi-bit addition.
5. To get rid of this problem, Full adder is required which adds three 1
bit.

9. Applications of this Micro-Project:

1. To perform additions on binary bits the Arithmetic and Logic

Unit present in the computer prefers this adder circuit.
2. The combination of half adder circuits leads to the formation of
the Full Adder circuit.
3. These logic circuits are preferred in the design of calculators.
4. To calculate the addresses and tables these circuits are
preferred.
5. Instead of only addition, these circuits are capable of handling various
applications in digital circuits. Further, this becomes the heart of digital
electronics.

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