19EEC234: ANALOG

CIRCUITS
Syllabus
• Unit I:

• Feedback Amplifiers: the general feedback structure, properties of negative

feedback, basic feedback topologies, the series-shunt feedback amplifier, the
series-series feedback amplifier, shunt-shunt and shunt-series feedback amplifiers,
determining loop gain.

• UnitII:
Oscillators: basic principles of sinusoidal oscillators, op amp RC oscillator
circuits, LC and crystal oscillators.Power amplifiers: Classification of output
stages, classA output stage, class B output stage, class AB output stage,class C
output stage.

• Unit III:
Operational Amplifiers: The ideal op-amp, the inverting and non-inverting
configuration, difference and instrumentation amplifiers, summing, scaling and
averaging amplifiers, integrators, differentiators, logarithmic amplifiers, V/I and
I/V converters, Comparator, regenerative comparator, Astable and Monostable
multivibrators, Triangular wave generator
Syllabus-contd..

• Unit IV:

IC Timers (555): Introduction, Description of functional diagram, Monostable

operation, Astable operation. Active Filter Design: LPF, HPF, BPF, BEF, all-pass
filters. Voltage Regulators: Fixed voltage Regulators, Adjustable voltage
Regulators.

• Unit V:
Data Converters: Introduction, DAC characteristics, digital to analog conversion
process, voltage output DACs, multiplying DAC, 8-bit digital to analog converter
DAC-08. Analog to Digital Converters: ADC characteristics, integrating ADC,
successive approximation ADC, Flash converters: Principle of operation,
conversion time.
Books:

• Text Book(s):
1. Adel S. Sedra, Kenneth C. Smith, Arun N. Chandorkar,
Microelectronic Circuits, 6/e, Oxford University Press,
2013.
2. D Choudhury Roy, Shail B. Jain, Linear Integrated Circuits,
New Age International, 2003.
3. Ramakanth Gayakward, Op-Amps and Linear Integrated
Circuits, 4/e, Pearson Education, 2007.
Books

• References:
• Behzad Razavi, Fundamentals of Microelectronics, 2/e,
Wiley Student Edition, 2013.
1. R.F Coughlin, F.F Driscoll, Op-Amps and Linear Integrated
Circuits, 6/e, Pearson Education, 2008.
2. S. Salivahanan, V.S. KanchanBhaskaran, Linear Integrated
Circuits, Tata Mc- Graw Hill, 2008.
3. Sergio Franco, Design with Operational Amplifiers and
Analog Integrated Circuits, 3/e, Tata Mc-Graw Hill, 2002.
 Module-IV
IC Timers (555)
Topics to be discus

•IC Timers (555):

• Introduction

• Description of functional diagram

• Monostable operation

• Astable operation
IC 555 -Introduction
• One of the most versatile linear ICs is the 555 timer which
was first introduced in early 1970 by Signetic Corporation
giving the name as SE/NE 555 timer.
• This IC is a monolithic timing circuit that can produce
accurate and highly stable time delays or oscillation.
• Like other commonly used op-amps, this IC is also very much
reliable, easy to use and cheaper in cost.
• It has a variety of applications including monostable and
astable multivibrators, dcdc converters, digital logic probes,
waveform generators, analog frequency meters and
tachometers,temperature measurement and control
devices, voltage regulators etc.
• The SE 555 is designed for the operating temperature range
from – 55°C to 125° while the NE 555operates over a
temperature range of 0° to 70°C.
The important features of the 555 timer
• It operates from a wide range of power supplies ranging
from + 5 Volts to + 18 Volts supply voltage.
• Sinking or sourcing 200 mA of load current.
• The external components should be selected properly so
that the timing intervals can be made into several minutes
Proper selection of only a few external components allows
timing intervals of several minutes along with the
frequencies exceeding several hundred kilo hertz.
• It has a high current output; the output can drive TTL.
• It has a temperature stability of 50 parts per million (ppm)
per degree Celsius change in temperature, or equivalently
0.005 %/ °C.
• The duty cycle of the timer is adjustable with the maximum
power dissipation per package is 600 mW and its trigger and
reset inputs are logic compatible.
IC 555 Pin Diagram
• The 555 Timer IC is available as an 8-pin metal can, an 8-pin
mini DIP (dual-in-package) or a 14-pin DIP.
• Pin 1: Grounded Terminal: All the voltages are measured
with respect to this terminal.
• Pin 2: Trigger Terminal: This pin is an inverting input to a
comparator that is responsible for transition of flip-flop from
set to reset. The output of the timer depends on the
amplitude of the external trigger pulse applied to this pin.
• Pin 3: Output Terminal: Output of the timer is available at
this pin. There are two ways in which a load can be
connected to the output terminal either between pin 3 and
ground pin (pin 1) or between pin 3 and supply pin (pin 8).
The load connected between pin 3 and ground supply pin is
called the normally on load and that connected between pin
3 and ground pin is called the normally off load
• Pin 4: Reset Terminal: To disable or reset the timer a negative
pulse is applied to this pin due to which it is referred to as
reset terminal. When this pin is not to be used for reset
purpose, it should be connected to + VCC to avoid any
possibility of false triggering.
• Pin 5: Control Voltage Terminal: The function of this terminal
is to control the threshold and trigger levels. Thus either the
external voltage or a pot connected to this pin determines the
pulse width of the output waveform. The external voltage
applied to this pin can also be used to modulate the output
waveform. When this pin is not used, it should be connected
to ground through a 0.01 micro Farad to avoid any noise
problem.
• Pin 6: Threshold Terminal: This is the non-inverting input
terminal of comparator 1, which compares the voltage applied
to the terminal with a reference voltage of 2/3 VCC. The
amplitude of voltage applied to this terminal is responsible for
the set state of flip-flop.
• Pin 7 : Discharge Terminal: This pin is connected internally to
the collector of transistor and mostly a capacitor is
connected between this terminal and ground. It is called
discharge terminal because when transistor saturates,
capacitor discharges through the transistor. When the
transistor is cut-off, the capacitor charges at a rate
determined by the external resistor and capacitor.
• Pin 8: Supply Terminal: A supply voltage of + 5 V to + 18 V is
applied to this terminal with respect to ground (pin 1).
Why the name 555?
Working/Principal of IC 555
• The single 555 Timer chip in its basic form is a Bipolar 8-pin
mini Dual-in-line Package (DIP) device consisting of some 25
transistors, 2 diodes and about 16 resistors arranged to form
two comparators, a flip-flop and a high current output stage.
• The 555 Timers name comes from the fact that there are
three 5kΩ resistors connected together internally producing
a voltage divider network between the supply voltage at pin
8 and ground at pin 1.
• The voltage across this series resistive network holds the
negative inverting input of comparator two at 2/3Vcc and
the positive non-inverting input to comparator one at
1/3Vcc.
• The two comparators produce an output voltage dependent
upon the voltage difference at their inputs which is
determined by the charging and discharging action of the
externally connected RC network.
• The outputs from both comparators are connected to the
two inputs of the flip-flop which in turn produces either a
“HIGH” or “LOW” level output at Q based on the states of its
inputs.
• The output from the flip-flop is used to control a high
current output switching stage to drive the connected load
producing either a “HIGH” or “LOW” voltage level at the
output pin.
• The most common use of the 555 timer oscillator is as a
simple astable oscillator by connecting two resistors and a
capacitor across its terminals to generate a fixed pulse train
with a time period determined by the time constant of the
RC network.
• But the 555 timer oscillator chip can also be connected in a
variety of different ways to produce Monostable or Bistable
multivibrators as well as the more common Astable
Multivibrator.
IC 555 Monostable Multivibrator
• When a negative ( 0V ) pulse is applied to the trigger input
(pin 2) of the Monostable configured 555 Timer oscillator,
the internal comparator, (comparator No1) detects this input
and “sets” the state of the flip-flop, changing the output
from a “LOW” state to a “HIGH” state.
• This action in turn turns “OFF” the discharge transistor
connected to pin 7, thereby removing the short circuit across
the external timing capacitor, C1.
• This action allows the timing capacitor to start to charge up
through resistor, RA until the voltage across the capacitor
reaches the threshold (pin 6) voltage of 2/3Vcc set up by the
internal voltage divider network.
• At this point the comparators output goes “HIGH” and
“resets” the flip-flop back to its original state which in turn
turns “ON” the transistor and discharges the capacitor to
ground through pin 7.
• This causes the output to change its state back to the
original stable “LOW” value awaiting another trigger pulse to
start the timing process over again. Then as before, the
Monostable Multivibrator has only “ONE” stable state.
• The Monostable 555 Timer circuit triggers on a negative-
going pulse applied to pin 2 and this trigger pulse must be
much shorter than the output pulse width allowing time for
the timing capacitor to charge and then discharge fully.
• Once triggered, the 555 Monostable will remain in this
“HIGH” unstable output state until the time period set up by
the RA x C1 network has elapsed.
• The amount of time that the output voltage remains “HIGH”
or at a logic “1” level, is given by the following time constant
equation.

Where, t is in seconds, R is in Ω and C in Farads.

IC 555 Astable Multivibrator
IC 555 Astable Multivibrator
Working Operation
• Initially, on power-up, the flip-flop is RESET (and hence the
output of the timer is low). As a result, the discharge
transistor is driven to saturation (as it is connected to Q’).
The capacitor C of the timing circuit is connected at Pin 7 of
the IC 555 and will discharge through the transistor. The
output of the timer at this point is low.
• The voltage across the capacitor is nothing but the trigger
voltage. So, while discharging, if the capacitor voltage
becomes less than 1/3 VCC, which is the reference voltage to
trigger comparator (comparator 2), the output of the
comparator 2 will become high. This will SET the flip-flop and
hence the output of the timer at pin 3 goes to HIGH.
• This high output will turn OFF the transistor. As a result, the
capacitor C starts charging through the resistors RA and R2.
Now, the capacitor voltage is same as the threshold voltage
(as pin 6 is connected to the capacitor resistor junction).
• While charging, the capacitor voltage increases
exponentially towards VCC and the moment it crosses 2/3
VCC, which is the reference voltage to threshold comparator
(comparator 1), its output becomes high.
• As a result, the flip-flop is RESET. The output of the timer
falls to LOW. This low output will once again turn on the
transistor which provides a discharge path to the capacitor.
Hence the capacitor C will discharge through the resistor RB.
And hence the cycle continues.
• Thus, when the capacitor is charging, the voltage across the
capacitor rises exponentially and the output voltage at pin 3
is high. Similarly, when the capacitor is discharging, the
voltage across the capacitor falls exponentially and the
output voltage at pin 3 is low.
While charging, the capacitor charges through the resistors
RA and RB. Therefore the charging time constant is (RA + RB) C as
the total resistance in the charging path is RA + RB. While
discharging, the capacitor discharges through the resistor RB only.
Hence, the discharge time constant is RBC.
Duty Cycle
• The charging and discharging time constants depends on the
values of the resistors RA and RB. Generally, the charging
time constant is more than the discharging time constant.
• Hence the HIGH output remains longer than the LOW
output and therefore the output waveform is not symmetric.
• Duty cycle is the mathematical parameter that forms a
relation between the high output and the low output. Duty
Cycle is defined as the ratio of time of HIGH output i.e., the
ON time to the total time of a cycle.
• If TON is the time for high output and T is the time period of
one cycle, then the duty cycle D is given by:
D = TON/ T
• Therefore, percentage Duty Cycle is given by:
%D = (TON / T) * 100
Selection of R1, R2 and C1
• The Selection of values of RA, RB and C for different
frequency range are as follow:
• RA and RB should be in the range 1KΩ to 1MΩ. It is best to
Choose C first (because capacitors are available in just a few
values and are usually not adjustable, unlike resistors) as per
the frequency range from the following table.
• Choose RB to give the frequency (f) you require.
• RB = 0.7 /(f × C1)
• Choose RA to be about a tenth of RB (1KΩ min.)