PRACTICAL JOURNAL OF

COMPUTER ORGANIZATION & ARCHITECTURE

BE: Second-Year

:
Name of Student Ayush Jain

Branch & Section : CSE & 1

Roll Number : 0827CS201053

Year : 2nd Year

Ayush Jain
Department of Computer Science & Engineering

AITR, Indore,

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Department of Computer Science & Engineering

Certificate

This is to certify that the experimental work entered in this journal as

per the BE II year syllabus prescribed by the RGPV was done by Mr.
Ayush Jain BE 2nd Year 4th Semester in the --------------------
Laboratory of this institute during the academic year 2021 - 2022

Signature of Head Signature of the Faculty

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

GENERAL INSTRUCTIONS FOR LABORATORY CLASSES

DO’S

● Without Prior permission do not enter into the Laboratory.

● While entering into the LAB students should wear their ID cards.
● The Students should come with proper uniform.
● Students should sign in the LOGIN REGISTER before entering into the laboratory.
● Students should come with observations and record note book to the laboratory.
● Students should maintain silence inside the laboratory.
● After completing the laboratory exercise, make sure to shutdown the system properly.

DONT’S

● Students bringing the bags inside the laboratory.

● Students using the computers in an improper way.
● Students scribbling on the desk and mishandling the chairs.
● Students using mobile phones inside the laboratory.
● Students making noise inside the laboratory.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

SYLLABUS

CS 4002 – Computer System Organization (CSO)

Branch: CSE IV Semester
Course: CS 4002- Computer System Organization

UNIT-I
Structure of Desktop Computers, CPU: General Register Organization- Memory Register, Instruction
Register, Control Word, Stack Organization, Instruction Format, ALU, I/O System,bus,CPU and Memory
Program Counter, Bus Structure, Register Transfer Language- Bus and Memory Transfer, addressing
modes.

UNIT–II
Basic Concept of Instruction, Instruction Types, Micro Instruction Formats, Fetch and Execution cycle,
Hardwired control unit, Micro-programmed Control unit- microprogram sequencer Control Memory,
Sequencing and Execution of Micro Instruction.
Computer Arithmetic: Addition and Subtraction, Tools Compliment Representation, Signed Addition and
Subtraction, Multiplication and division, Booth's Algorithm, Division Operation, Floating Point Arithmetic
Operation.design of Arithmetic unit

UNIT–III
I/O Interface – PCI Bus, SCSI Bus, USB, Data Transfer: Serial, Parallel, Synchronous, Asynchronous
Modes of Data Transfer, Direct Memory Access(DMA), I/O Processor.

UNIT–IV
Main memory- RAM, ROM, Secondary Memory – Magnetic Tape, Disk, Optical Storage, Cache Memory:
Cache Structure and Design, Mapping Scheme, Replacement Algorithm, Improving Cache Performance,
Virtual Memory, memory management hardware

UNIT–V
Characteristics of Multiprocessor, Structure of Multiprocessor- Inter-processor Arbitration, Inter Processor
Communication and Synchronization. Memory in Multiprocessor System, Concept of Pipelining, Vector
Processing, Array Processing, RISC And CISC, Study of Multicore Processor – Intel, AMD.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

HARDWARE & SOFTWARE REQUIREMENTS

GNU Sim 8085 is an open source and platform independent.

General requirements are:

Software requirements: GNU Sim 8085

Operating System: Windows 7
Hardware requirements: P-IV C2D 2.9 GHZ 320 GB HDD/2 GB RAM Cabinet/1.44 FDD
LAN Card

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

RATIONALE:

The purpose of this subject is to make students familiarize with the basic principles of computer
architecture, Design and Multi Processing, Types of data transfer, Concept of semi conductor memories
which is useful for research work in field Computer System. The practicals will focus on learning assembly
language and learning 8085 microprocessor basics.

PREREQUISITE:-

The students should have a general idea about computer organization.

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Lab Plan
S. No. Name of Experiment Page No.
1. Study of Multiplexer and Demultiplexer

2. Study of Half Adder and Subtractor

3. Study of Full Adder and Subtractor

4 Study of PC, Stack, PSW in 8085 Microprocessor

5. WAP to find 2's complement of a number

6. WAP to find 1's complement of a number

7. WAP to add content of two memory locations.

8. WAP to exchange contents of two memory locations

9. WAP to store a 8 bit number in memory

10. WAP to add two 8 bit numbers

11. WAP to subtract two 8 bit numbers

12. WAP to multiply two 8 bit numbers

13. WAP to divide two 8 bit numbers

14. WAP to find the square of a number.

15. WAP to add two 16 bit numbers

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Index
Page Date of Grade & Sign of
S.No. Date of Exp. Name of the Experiment
No. Submission the Faculty
1.

2.

3.

4.

5.

6.

7.

8.

9.

10.

11.

12.
13.

14.

15.

16.

17.

18.

19.

20.
Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-1

Study of Multiplexer and Demultiplexer

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

To study Multiplexer and Demultiplexer

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

CONCEPT:

Multiplexer
A Multiplexer or Mux is a device that has many inputs and a single output. The selected line
decides which i/p is connected to the o/p, and also increases the amount of data that can be sent
over an n/w within a certain time. A multiplexer is also called as a data selector. The best example
of non-electronic circuit of the multiplexer is a single-pole, multi-position switch, which is
generally used in many electronics circuits. The main purpose of mux is to perform high speed
switching and is constructed by a basic electronic components. These are accomplished by
handling both analog and digital applications. In analog applications, these are made up of
transistor switches and relays, whereas in digital applications, these are made up of logic gates.
When the mux is used in digital applications, it is called as a digital multiplexer.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Multiplexer
4-to-1 Multiplexer
The 4X1 multiplexer comprises 4-input bits, 1- output bit, and 2- control bits. The four input bits
are namely 0, D1, D2 and D3, respectively; only one of the input bit is transmitted to the output.
The o/p ‘q’ depends on the value of control input AB. The control bit AB decides which of the i/p
data bit should transmit the output. The following figure shows the 4X1 multiplexer circuit
diagram using AND gates. For example, when the control bits AB =00, then the higher AND gate
are allowed while remaining AND gates are restricted. Thus, data input D0 is transmitted to the
output ‘q”

4×1 Multiplexer
If the control input is changed to 11, then all gates are restricted except the bottom AND gate. In
this case, D3 is transmitted to the output and q=D0. If the control input is changed to AB =11, all
gates are disabled except the bottom AND gate. In this case, D3 is transmitted to the output and q
= D3.The best example of 4X1 multiplexer is IC 74153. In this IC, the o/p is same as the i/p.
Another example of 4X1 multiplexer is IC 45352. In this IC, the o/p is the compliment of the i/p

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Applications of Multiplexers
A Multiplexer is used in various applications wherein multiple data can be transmitted using a
single line.

Communication System – A Multiplexer is used in communication systems, which has a

transmission system and also a communication network. A Multiplexer is used to increase the
efficiency of the communication system by allowing the transmission of data, such as audio &
video data from different channels via cables and single lines.
Computer Memory – A Multiplexer is used in computer memory to keep up a vast amount of
memory in the computers, and also to decrease the number of copper lines necessary to connect the
memory to other parts of the computer.
Telephone Network – A multiplexer is used in telephone networks to integrate the multiple audio
signals on a single line of transmission.
Transmission from the Computer System of a Satellite:
A Multiplexer is used to transmit the data signals from the computer system of a satellite to the
ground system by using a GSM communication.

De-Multiplexer
A demultiplexer is a device, that has one input and multiple output lines which is used to send a
signal to one of the various devices. The most prominent distinction between a multiplexer and
demultiplexer is that a multiplexer takes two or a lot of signals and encodes them on a wire,
whereas a demultiplexer reverses what the multiplexer does.

De-Multiplexer
1-4 De-multiplexers
The 1-to-4 demultiplexer comprises 1- input bit, 4-output bits and – control bits. The 1X4
demultiplexer circuit diagram is shown below.
 

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

1X4 Demultplxer
The i/p bit is considered as Data D. This data bit is transmitted to the data bit of the o/p lines,
which depends on the AB value and the control i/p.
When the control i/p AB = 01, the upper second AND gate is permitted while the remaining AND
gates are restricted. Thus, only data bit D is transmitted to the output and Y1 = Data.
If the data bit D is low, the output Y1 is low. IF data bit D is high, the output Y1 is high. The value
of the output Y1 depends upon the value of data bit D, the remaining outputs are in a low state.
If the control input changes to AB = 10,then  all the gates are restricted except the third AND gate
from the top. Then, data bit D is transmitted only to the output Y2; and, Y2 = Data. . The best
example of 1X4 demultiplexer is IC 74155.

Applications of Demultiplexer
Demultiplexers are used to connect a single source to multiple destinations. These applications
include the following:
Communication System – Multiplexer and Demultiplexer both are used in communication
systems to carry out the process of data transmission. A De-multiplexer receives the output signals
from the multiplexer; and, at the receiver end, it converts them back to the original form.
Arithmetic Logic Unit – The output of the arithmetic logic unit is fed as an input to the
De-multiplexer, and the o/p of the demultiplexer is connected to a multiple registers. The output of
the ALU can be stored in multiple registers.
Serial to Parallel Converter – The serial to parallel converter is used to reform parallel data. In
this method, serial data are given as an input to the De-multiplexer at a regular interval, and a
counter is attached to the demultiplexer at the control i/p to sense the data signal at the
demultiplexer’s o/p. When all data signals are stored, the output of the demultiplexer can be read
out in parallel.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-2
Study of Half Adder and Half Subractor

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

To study Half Adder and Half Subractor.

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

CONCEPT:

Half adder
There are basically two types of adders viz. half adder and full adder same is the case with
subtractors. Half adder takes two single bits as input and produces a sum and a carry output. In
the below figure we show the truth table that clearly explains the operation of half adder.

From the truth table we can clearly understand that the sum output is "XOR" of inputs and
the carryfunction is "AND" of inputs. The half adder shown here is a binary half adder as it takes
only 1-bit binary values as inputs. In figure-1 we show the logic gate implementation of half adder.
The sum output is "XOR" of inputs A and B, we'll also see how an XOR gate is implemented
Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

using smallest possible number of NAND gates. Try to implement XOR in a better way than this
and if u succeed I'm sure you will get a Ph.D on it. Until then this is the best implementation.

The sum output of Half adder is sometimes called as quarter adder. Half adder is used to
construct a full adder and it is also used in parallel adder. 

Half subtractor
Basically subtraction can also be considered as addition with one of the input being
2's-complemented. because of this similarity the truth table and equations for subtraction show a
resemblance to the half adder. Half subtractor accepts two 1-Bit inputs and produces
a difference and borrow outputs. The below figure shows the truth table and block diagram of
half subtractor.

As said above we can see that the Difference output is same as the Sum output of half adder. But
the Borrow is different from Carry of half adder. In figure-2 we'll see the implementation of half
subtractor using logic gates.

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

The Difference output of half subtractor is called a Quarter subtractor. Half subtractor is used to

construct a full subtractor. Mostly in digital circuits the subtractors are replaced with adders and
one of the inputs being 2's-complemented. Subtractors are rarely used in digital circuit design.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-3
Study of Full Adder and Full Subtractor

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

To study Full Adder and Full Subractor.

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

CONCEPT:

Full Adder

A binary full adder is a multiple output combinational logic network that performs the arithmetic
sum of three input bits. As we have seen that the half adder cannot respond to the three inputs and
hence the full adder is used to add three digits at a time.

It consists of three inputs, in which two are input variables represent the two significant bits to be
added, labeled as A and B, whereas the third input terminal is the carry from the previous lower
significant position and labeled as Cin. The two outputs are a sum and a carry outputs which are
labeled as ? and Cout respectively.

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Full adder can be formed by combining two half adders and an OR gate as shown in above where
output and carry-in of the first adder becomes the input to the second half adder that produce the
total sum output. The total carry out is produced by ORing the two half adder carry outs as shown
in figure. The full adder block diagram and truth table is shown below.

Full Subtractor

A combinational logic circuit performs a subtraction between the two binary bits by considering
borrow of the lower significant stage is called as the full subtractor. In this, subtraction of the two
digits is performed by taking into consideration whether a 1 has already borrowed by the previous
adjacent lower minuend bit or not.

It has three input terminals in which two terminals corresponds to the two bits to be subtracted
(minuend A and subtrahend B), and a borrow bit Bi corresponds to the borrow operation. There are

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

two outputs, one corresponds to the difference D output and other borrow output Bo as shown in
figure along with truth table.

By deriving the Boolean expression for the full subtractor from above truth table, we get the
expression that tells that a full subtractor can be implemented with half subtractors with OR gate as
shown in figure below.

By comparing the adder and subtractor circuits or truth tables, one can observe that the output D in
the full subtractor is exactly same as the output S of the full adder. And the only difference is that
input variable A is complemented in the full subtractor.

Therefore, it is possible to convert the full adder circuit into full subtractor by simply
complementing the input A before it is applied to the gates to produce the final borrow bit output
Bo.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-4
Study of 8085 Microprocessor
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

To study 8085 Microprocessor

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

CONCEPT:
Before doing the coding on the simulator it’s necessary to study the complete architecture of 8085
microprocessor along with its instruction set.

8085 is pronounced as "eighty-eighty-five" microprocessor. It is an 8-bit microprocessor designed

by Intel in 1977 using NMOS technology.
It has the following configuration −

● 8-bit data bus

● 16-bit address bus, which can address upto 64KB
● A 16-bit program counter
● A 16-bit stack pointer
● Six 8-bit registers arranged in pairs: BC, DE, HL
● Requires +5V supply to operate at 3.2 MHZ single phase clock
It is used in washing machines, microwave ovens, mobile phones, etc.
8085 Microprocessor – Functional Units
8085 consists of the following functional units −

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Accumulator
It is an 8-bit register used to perform arithmetic, logical, I/O & LOAD/STORE operations. It is
connected to internal data bus & ALU.
Arithmetic and logic unit
As the name suggests, it performs arithmetic and logical operations like Addition, Subtraction,
AND, OR, etc. on 8-bit data.
General purpose register
There are 6 general purpose registers in 8085 processor, i.e. B, C, D, E, H & L. Each register can
hold 8-bit data.
These registers can work in pair to hold 16-bit data and their pairing combination is like B-C, D-E
& H-L.
Program counter
It is a 16-bit register used to store the memory address location of the next instruction to be
executed. Microprocessor increments the program whenever an instruction is being executed, so
that the program counter points to the memory address of the next instruction that is going to be
executed.
Stack pointer
It is also a 16-bit register works like stack, which is always incremented/decremented by 2 during
push & pop operations.
Temporary register
It is an 8-bit register, which holds the temporary data of arithmetic and logical operations.
Flag register
It is an 8-bit register having five 1-bit flip-flops, which holds either 0 or 1 depending upon the
result stored in the accumulator.
These are the set of 5 flip-flops −

● Sign (S)
● Zero (Z)
● Auxiliary Carry (AC)
● Parity (P)
● Carry (C)
Its bit position is shown in the following table −

D7 D6 D5 D4 D3 D2 D1 D0

S Z AC P CY

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Instruction register and decoder

It is an 8-bit register. When an instruction is fetched from memory then it is stored in the
Instruction register. Instruction decoder decodes the information present in the Instruction register.
Timing and control unit
It provides timing and control signal to the microprocessor to perform operations. Following are
the timing and control signals, which control external and internal circuits −

● Control Signals: READY, RD’, WR’, ALE

● Status Signals: S0, S1, IO/M’
● DMA Signals: HOLD, HLDA
● RESET Signals: RESET IN, RESET OUT
Interrupt control
As the name suggests it controls the interrupts during a process. When a microprocessor is
executing a main program and whenever an interrupt occurs, the microprocessor shifts the control
from the main program to process the incoming request. After the request is completed, the
control goes back to the main program.
There are 5 interrupt signals in 8085 microprocessor: INTR, RST 7.5, RST 6.5, RST 5.5, TRAP.
Serial Input/output control
It controls the serial data communication by using these two instructions: SID (Serial input data)
and SOD (Serial output data).
Address buffer and address-data buffer
The content stored in the stack pointer and program counter is loaded into the address buffer and
address-data buffer to communicate with the CPU. The memory and I/O chips are connected to
these buses; the CPU can exchange the desired data with the memory and I/O chips.
Address bus and data bus
Data bus carries the data to be stored. It is bidirectional, whereas address bus carries the location
to where it should be stored and it is unidirectional. It is used to transfer the data & Address I/O
devices.
8085 Architecture
We have tried to depict the architecture of 8085 with this following image −

Ayush Jain
ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-5
Write a program to study HL pair as a pointer
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to study HL pair as a pointer

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

PROGRAM

MVI H,00H

MVI L,02H

MOV A,M

ADI 01H

MOV M,A

HLT

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-6
Write a program to study BC and DE as register pairs
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to study BC and DE as register pairs

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

PROGRAM:

MVI B,00H

MVI C, 03H

MVI D,00H

MVI E,05H

LDAX B

INR A

STAX D

HLT

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-7
Write a program to study PC, Stack, PSW in 8085 Microprocessor
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to study PC, Stack, PSW in 8085 Microprocessor

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

PROGRAM: To Understand PC

MVI B,0AH

MOV A,B

INR A

HLT

PROGRAM 1: To Understand STACK

MVI D,05H

MVI E,08H

PUSH D

MVI H,03H

MVI L,02H

PUSH H

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 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

POP B

HLT

PROGRAM 2: To Understand STACK

MVI H,00H

MVI L,0BH

SPHL

MVI D,05H

MVI E,08H

PUSH D

MVI H,03H

MVI L,02H

PUSH H

POP B

HLT

PROGRAM : To Understand PSW

Program Status Word is register that combines the content of accumulator and flag bits.

MVI A,54H

MVI B,98H

ADD B

PUSH PSW

POP B

HLT

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-8
Write a program to calculate 2's complement of a number
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to calculate 2's complement of a number

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

Finding Two's complement of a number, 2's complement program in 8085

2's complement of 8 bit number in 8085

Statement: Find the 2's complement of the number stored at memory location 4200H and store the
complemented number at memory location 4300H.

Sample problem:

       (4200H) = 55H

               Result = (4300H) = AAH + 1 = ABH

Source program:

LDA 4200H            : Get the number

CMA                      : Complement the number
ADI, 01H               : Add one in the number
STA 4300H            : Store the result
HLT                       : Terminate program execution

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-9
Write a program to calculate 1's complement of a number
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to calculate 1's complement of a number

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

Finding one's complement of a number

Statement: Find the l's complement of the number stored at memory location 4400H and store the
complemented number at memory location 4300H.

Sample problem:                                                                        

       (4400H) = 55H

               Result = (4300B) = AAB                                        
Source program:                                                        

LDA 4400B  : Get the number

CMA            : Complement number
STA 4300H  : Store the result
HLT              : Terminate program execution

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-10
Write a Program to Add contents of two memory locations in 8085 Processor

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a Program to Add contents of two memory locations in 8085 Processor

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

Add contents of two memory locations

Statement: Add the contents of memory locations 40001H and 4001H and place the result in the memory
locations 4002Hand 4003H.
Sample problem:        

       (4000H) = 7FH

       (400lH)  = 89H
Result    = 7FH + 89H = lO8H
       (4002H) = 08H
       (4003H) = 0lH

Source program:

       LXI H, 4000H  : HL Points 4000H

       MOV A, M       : Get first operand
       INX H             : HL Points 4001H
       ADD M           : Add second operand
       INX H             : HL Points 4002H
       MOV M, A       : Store the lower byte of result at 4002H
       MVI A, 00       : Initialize higher byte result with 00H
       ADC A           : Add carry in the high byte result
       INX H             : HL Points 4003H
       MOV M, A       : Store the higher byte of result at 4003H
       HLT               : Terminate program execution

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-11
Write a Program to Exchange contents of memory locations 8085 Microprocessor

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a Program to Exchange contents of memory locations 8085 Microprocessor

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7
Program to Exchange contents of memory locations 8085 Microprocessor

Statement: Exchange the contents of memory locations 2000H and 4000H

Program 1:

 LDA 2000H : Get the contents of memory location 2000H into accumulator
 MOV B, A    : Save the contents into B register
 LDA 4000H : Get the contents of memory location 4000Hinto accumulator
 STA 2000H : Store the contents of accumulator at address 2000H
 MOV A, B    : Get the saved contents back into A register
 STA 4000H : Store the contents of accumulator at address 4000H

Program 2:
LXI H 2000H          : Initialize HL register pair as a pointer to memory location 2000H.
LXI D 4000H         : Initialize DE register pair as a pointer to memory location 4000H.
MOV B, M     : Get the contents of memory location 2000H into B register.
LDAX D        : Get the contents of memory location 4000H into A register.
MOV M, A     : Store the contents of A register into memory location 2000H.
MOV A, B     : Copy the contents of B register into accumulator.
STAX D        : Store the contents of A register into memory location 4000H.
HLT              : Terminate program execution.

In Program 1, direct addressing instructions are used, whereas in Program 2, indirect addressing
instructions are used.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-12
Write a program to store 8 bit data in memory of 8085 microprocessor

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to store 8 bit data in memory of 8085 microprocessor

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

Program 1:

MVI A, 52H  : Store 32H in the accumulator

STA 4000H  : Copy accumulator contents at address 4000H
HLT              : Terminate program execution

Program 2:

LXI H           : Load HL with 4000H

MVI M                   : Store 32H in memory location pointed by HL register pair (4000H)
HLT              : Terminate program execution

The result of both programs will be the same. In program 1 direct addressing instruction is used, whereas in
program 2 indirect addressing instruction is used.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-13
Write a program for addition of two 8 bit numbers

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program for addition of two 8 bit numbers

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

ADDITION OF TWO 8 BIT NUMBERS

AIM:
 To perform addition of two 8 bit numbers using 8085.

ALGORITHM:
 1) Start the program by loading the first data into Accumulator.
 2) Move the data to a register (B register).
 3) Get the second data and load into Accumulator.
 4) Add the two register contents.
 5) Check for carry.
 6) Store the value of sum and carry in memory location.
 7) Terminate the program.

PROGRAM:

 MVI C, 00   'Initialize C register to 00

 LDA 4150   'Load the value to Accumulator.
 MOV B, A   'Move the content of Accumulator to B register.
 LDA 4151   'Load the value to Accumulator.
 ADD B    'Add the value of register B to A
 JNC LOOP   'Jump on no carry.
 INR C     'Increment value of register C
 LOOP: STA 4152  'Store the value of Accumulator (SUM).
 MOV A, C   'Move content of register C to Acc.
 STA 4153   'Store the value of Accumulator (CARRY)
Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

 HLT    'Halt the program.

OBSERVATION:

 Input: 80 (4150)
  80 (4251)
 Output: 00 (4152)
  01 (4153)

RESULT:
 Thus the program to add two 8-bit numbers was executed.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-14
Write a program for subtraction of two 8 bit numbers

Name of Student: Ayush Jain Class: BE

Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program for subtraction of two 8 bit numbers

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

AIM:
     To perform the subtraction of two 8 bit numbers using 8085.
    
ALGORITHM:
     1. Start the program by loading the first data into Accumulator.
        Move the data to a register (B register).
     2. Get the second data and load into Accumulator.
     3. Subtract the two register contents.
     4. Check for carry.
     5. If carry is present take 2’s complement of Accumulator.
     6. Store the value of borrow in memory location.
     7. Store the difference value (present in Accumulator) to a memory
     8. location and terminate the program.
  
PROGRAM:
          MVI C, 00I Initialize C to 00
          LDA 4150     Load the value to Acc.
          MOV B, A    Move the content of Acc to B register.
          LDA 4151     Load the value to Acc.
          SUB B
          JNC LOOP   Jump on no carry.
          CMA           Complement Accumulator contents.
          INR A         Increment value in Accumulator.
          INR C         Increment value in register C
LOOP: STA 4152   Store the value of A-reg to memory address.
          MOV A, C    Move contents of register C to Accumulator.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

          STA 4153    Store the value of Accumulator memory address.

          HLT         Terminate the program.

OBSERVATION:
            Input: 06 (4150)
                    02 (4251)
            Output: 04 (4152)
                    01 (4153)
                  
RESULT:
     Thus the program to subtract two 8-bit numbers was executed

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-15
Write a program to Multiplication of two 8 bit numbers
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Multiplication of two 8 bit numbers

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

AIM:
     To perform the multiplication of two 8 bit numbers using 8085.
    
ALGORITHM:
     1) Start the program by loading HL register pair with address of memory location.
     2) Move the data to a register (B register).
     3) Get the second data and load into Accumulator.
        Add the two register contents
     4) Check for carry.
        Increment the value of carry.
     5) Check whether repeated addition is over and store the value of product and carry
        in memory location.
     6) Terminate the program.

    
PROGRAM:
            MVI D,00  Initialize register D to 00
            MVI A,00    Initialize Accumulator content to 00
            LXI H,4150
            MOV B,M  Get the first number in B - reg
            INX H
            MOV C,M  Get the second number in C- reg.LOOP: ADD B  Add content of A - reg to register
B.
            JNC NEXT  Jump on no carry to NEXT.
Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

            INR D  Increment content of register DNEXT: DCR C Decrement content of register C.

            JNZ LOOP Jump on no zero to address
            STA 4152 Store the result in Memory
            MOV A, D
            STA 4153  Store the MSB of result in Memory     HLT    Terminate the program.

OBSERVATION:
                  FF (4150)
    Input:
                  FF (4151)
                  01 (4152)
    Output:
                  FE (4153)

                 RESULT:
Thus the program to multiply two 8-bit numbers was executed.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-16
Write a program to division of two 8 bit numbers
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Division of two 8 bit numbers

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7

AIM:
     To perform the division of two 8 bit numbers using 8085.
     
ALGORITHM:
     1) Start the program by loading HL register pair with address of memory location.
     2) Move the data to a register(B register).
     3) Get the second data and load into Accumulator.
     4) Compare the two numbers to check for carry.
     5) Subtract the two numbers.
     6) Increment the value of carry .
     7) Check whether repeated subtraction is over and store the value of product and
        carry in memory location.
     8) Terminate the program.
     
PROGRAM:
               LXI  H, 4150
               MOV  B,M      Get the dividend in B – reg.
               MVI  C,00       Clear C – reg for qoutient
               INX  H
               MOV A,M       Get the divisor in A – reg.
NEXT:     CMP B             Compare A - reg with register B.
               JC  LOOP         Jump on carry to LOOP
               SUB  B             Subtract A – reg from B- reg.
               INR C               Increment content of register C.
Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

               JMP NEXT      Jump to NEXT

 LOOP:    STA 4152         Store the remainder in Memory
               MOV A,C
               STA 4153         Store the quotient in memory
               HLT                  Terminate the program.

OBSERVATION:   
    Input:
 F (4150)
 FF (4251)
    Output:
 01 (4152) ---- Remainder
     FE (4153) ---- Quotient
     
RESULT:
Thus the program to divide two 8-bit numbers was executed.

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-17
Write a program to find square of a number in 8085
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to find square of a number in 8085

FACILITIES REQUIRED

S.NO FACILITIES REQUIRED QUANTITY

1 System 1
2 WINDOWS XP/7
Program to find square of a number in 8085

LXI H, 6200H        : Initialize lookup table pointer

               LXI D, 6100H                : Initialize source memory pointer
               LXI B, 7000H        : Initialize destination memory pointer
       BACK: LDAX D                : Get the number
               MOV L, A                : A point to the square
               MOV A, M                : Get the square
               STAX B                : Store the result at destination memory location
               INX D                : Increment source memory pointer
               INX B                        : Increment destination memory pointer
               MOV A, C
               CPI 05H                : Check for last number
               JNZ BACK                : If not repeat
               HLT                        : Terminate program execution

Ayush Jain
 ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Experiment-18
Write a program to add two 16 bit numbers
Name of Student: Ayush Jain Class: BE
Enrollment No: 0827CS201053 Batch 2
Date of Experiment Date of Submission Submitted on:
Remarks by faculty: Grade:
Signature of student: Signature of Faculty:

OBJECTIVE OF THE EXPERIMENT

Write a program to add two 16 bit numbers

CONCEPT

Suppose we have to add two HEX numbers viz:

4351 & 3211.

First take the LSB of two number and ADD them. Then take the MSB of thw numbers and add them
with CARRY.

CODE:

MVI A,51H

MVI B,11H

ADD B

STA 5000H

MVI A,43H

MVI B,32H

ADC B

STA 5002H

HLT

Ayush Jain
ACROPOLIS INSTITUTE OF TECHNOLOGY & RESEARCH, INDORE

Ayush Jain