Mwo/Vss: Getting Started Guide
Mwo/Vss: Getting Started Guide
.............................
Guide
MWO/VSS Getting Started Guide
Version 6, November 2003
Voice 310.726.3000
Fax 310.726.3005
Technical Support [email protected]
Website www.mwoffice.com
© 2003 Applied Wave Research, Inc. All Rights Reserved. Printed in the United States of America. No part of this
guide may be reproduced in any form or by any means, electronic, mechanical, photocopying, recording, or
otherwise, without the express written permission of Applied Wave Research, Inc.
AWR™, Microwave Office™, Visual System Simulator™, and EMSight™ are trademarks of Applied Wave
Research, Inc. All other product and company names mentioned herein may be the trademarks or registered
trademarks of their respective owners.
The information in this guide is believed to be accurate. However, no responsibility or liability is assumed by
Applied Wave Research, Inc. for its use.
CONTENTS
...............................
.....
1 INTRODUCING AWR DESIGN ENVIRONMENT ................... 1-1
About This Guide .........................................................................1-2
Getting Additional Information .................................................1-3
G e t t i n g S t a r t e d G u i d e iii
CONTENTS
iv MWO/VSS 2003
CONTENTS
vi MWO/VSS 2003
CONTENTS
.....
Welcome to the AWR Design Environment!
The AWR Design Environment comprises two powerful tools that can be used
together to create an integrated system and RF design environment: Visual
System Simulator™ (VSS) and Microwave Office (MWO). These powerful tools
are fully integrated in the AWR Design Environment and allow you to
incorporate circuit designs into system designs without leaving the AWR Design
Environment.
Microwave Office enables you to design circuits composed of schematics and
electromagnetic (EM) structures from an extensive electrical model database,
and then generate layout representations of these designs. You can perform
simulations using one of Microwave Office’s simulation engines -- a linear
simulator, an advanced harmonic balance simulator, a 3D-planar EM simulator
(EMSight™), or an optional HSPICE simulator -- and display the output in a
wide variety of graphical forms based on your analysis needs. You can then tune
or optimize the designs and your changes are automatically and immediately
reflected in the layout.
VSS enables you to design and analyze end-to-end communication systems. You
can design systems composed of modulated signals, encoding schemes, channel
blocks and system level performance measurements. You can perform
simulations using VSS’s predefined transmitters and receivers, or you can build
customized transmitters and receivers from basic blocks. Based on your analysis
needs, you can display BER curves, ACPR measurements, constellations, and
power spectrums, to name a few. VSS provides a real-time tuner that allows you
to tune the designs and then see your changes immediately in the data display.
G e t t i n g S t a r t e d G u i d e 1-1
INTRODUCING AWR DESIGN ENVIRONMENT
1
About This Guide
PREREQUISITES
Item Convention
Anything that you select Shown in a bold type. Nested menu selections are shown
(or click) in the AWR with a “>” to indicate that you select the first menu item
Design Environment, like and then select the second menu item:
menu items, button Choose File > New Project
names, and dialog box
option names
Any text that you enter Shown in a bold type within quotation marks:
using the keyboard
Enter “my_project” in Project Name.
Item Convention
Keys or key combinations Shown in a bold type with initial capitals. Key
that you press combinations are shown with a “+” to indicate that you
press and hold the first key while pressing the second
key:
Press Alt+F1.
DOCUMENTATION
G e t t i n g S t a r t e d G u i d e 1-3
INTRODUCING AWR DESIGN ENVIRONMENT
1
Getting Additional Information
ON-LINE HELP
WEBSITE SUPPORT
TECHNICAL SUPPORT
.....
This chapter describes how to install Microwave Office (MWO) and Visual
System Simulator (VSS). You can install them as standalone applications or
install them together as integrated partners within the AWR Design
Environment. A procedure for obtaining a FLEXlm® license with a software-
based key is also included.
The installation procedures are intended for evaluators and licensed users who
want to install MWO and VSS with a FLEXlm license dedicated to their
particular machine. For alternative licensing configurations, see the MWO/
VSS/AO Installation Guide on your Program Disk (install.pdf). You can also
download this guide from the AWR website at www.mwoffice.com. The file is
located under Support.
INSTALLATION OVERVIEW
The AWR Design Environment software is shipped on a program CD-ROM for
installation. The installation program installs Microwave Office, Visual System
Simulator and Analog Office.
G e t t i n g S t a r t e d G u i d e 2-1
INSTALLING MWO/VSS
2
Preparing for Installation
1. If you do not want Microsoft Internet Explorer to be your default internet browser, you must choose to
NOT associate file types via the Advanced setup options when you install Internet Explorer. Note that
you must still have the Web Browser installed, however.
Option Description
Backup Replaced Files Backups are necessary only if you have modified files in
your previous MWO/VSS version or stored any design files
in the installation directory tree.
Select Default Process Choose the default units to use in schematics and layouts
(as well as affect the default sizes for components such as
transmission lines). The default is Microns. You can
alternatively set this default within the program; see the
Microwave Office User Guide for details.
Register File Extensions Select this check box to specify that files with a .emp, .em,
.sch, or .net extension are opened in the AWR Design
Environment. If you use another schematic tool or program
that uses these extensions, you may want to disable this
option. This check box is selected by default.
Select Start Menu Group Enter the name of the Start menu program group to which
you want to add the AWR 2003 icons. “AWR Suite 2003” is
the default. If you accept the default, you start the program
by clicking the Start button on your desktop and then
choosing Programs > AWR Suite 2003 > AWR
Design Environment. In addition, you can specify that
these icons display only when you are logged onto the
computer, or when anyone logs onto the computer.
3 When prompted to create one or more Start menu shortcuts, choose from
the following list of AWR product numbers based on the product feature
set you have purchased.
If you have an evaluation license, leave all of the boxes unchecked to create
the appropriate default shortcut.
Option Description
VSS-100 Standalone version of Visual System Simulator
1. Floating licensing allows multiple users to share a license over a network via a client-server architecture,
whereas locked licensing dedicates a license to a particular machine.
2. Hardware-based keys are calculated from an AWR-supplied hardware dongle serial number. Such a
license can be transferred between machines simply by moving the dongle.
3 To obtain a valid license file from Applied Wave Research, click the
appropriate button under Registration and follow the instructions.
4 You will receive your license within two business days. When you receive it,
rename it awr.lic and place it into the program directory.
.....
This chapter describes the windows, menus and basic operations for performing
the following tasks in the AWR Design Environment:
• Creating projects to organize and save your designs
• Creating system diagrams, circuit schematics, and EM structures
• Placing circuit elements into schematics
• Placing system blocks into system diagrams
• Incorporating subcircuits into system diagrams and schematics
• Creating layouts
• Creating and displaying output graphs
• Running simulations for schematics and system diagrams
• Tuning simulations
G e t t i n g S t a r t e d G u i d e 3-1
AWR DESIGN ENVIRONMENT
3 AWR Design Environment Components
Title bar
Menus
Toolbar
Project
Browser System Diagrams
Circuit Schematics
Workspace
Tabs
Component Description
menu A set of menus located along the top of the window for
performing a variety of MWO and VSS tasks.
Component Description
Project Browser Located in the left column of the window, this is the
complete collection of data and components that define
the currently active project. Items are organized into a
tree-like structure of nodes and include schematics,
system diagrams and EM structures, simulation
frequency settings, output graphs, and more.
The Project Browser is active when the AWR
Environment first opens. Right-click a node in the
Project Browser to access menus of relevant
commands.
tabs A set of tabs located at the lower left of the window that
allow you to switch the contents of the left column of
the window from Project Browser (i.e., Proj) to
Element Browser or Layout Manager.
Click the Elem tab to display the Element Browser and
to access a comprehensive inventory of circuit
elements and system blocks for simulation.
Click the Layout tab to specify options for viewing and
drawing layout representations and to create new
layout cells.
Many of the functions and commands can be invoked from the menus and on
the toolbar, and in some cases by right-clicking on a node in the Project
Browser. This guide may not describe all of the ways to invoke a specific task.
BASIC OPERATIONS
This section highlights the windows, menu choices, and commands available for
creating simulation designs and projects in the AWR Design Environment.
PROJECT CONTENTS
Because MWO and VSS are fully integrated in the AWR Environment, you can
start a project based on a system design using VSS, or on a circuit design using
MWO. The project may ultimately combine both VSS and MWO elements. You
can view all of the components and elements in the project in the Project
Browser. Modifications are automatically reflected in the relevant elements.
A project can include any set of designs and one or more linear schematics,
nonlinear schematics, EM structures, or system level blocks. A project can
include anything associated with the designs, such as global parameter values,
imported files, layout views, and output graphs.
When you first start the AWR Design Environment, a default empty project
titled “Untitled Project” is loaded. Only one project can be active at a time. The
name of the active project displays in the main window title bar.
After you create (name) a project, you can create your designs. You can perform
simulations to analyze the designs and see the results on a variety of graphical
forms. Then, you can tune or optimize parameter values and variables as needed
to achieve the desired response. You can generate layout representations of the
designs, and output the layout to a DXF, GDSII, or Gerber file.
To create a project choose File > New Project . Name the new project and the
directory you want to write it to by choosing File > Save Project As. The project
name displays in the title bar.
To open an existing project, choose File > Open Project . To save the current
project, choose File > Save Project . When you save a project, everything
associated with it is automatically saved. AWR projects are saved as *.emp files.
Schematic
Right-click then
window (or
choose New
netlist
Schematic
window)
opens in the
workspace
Create new netlist
Right-click to create
new system diagram
A system diagram opens
in the workspace
you name the system diagram, the menus and toolbar display new selections and
buttons for building and simulating systems.
Expand then
click desired Buttons for
subcategory adding ports
and ground
Drag desired
model
into schematic or
system diagram
window
To connect element or system block nodes with a wire, position the cursor over
a node. The cursor displays as a wire coil symbol. Click at this position to mark
the beginning of the wire and slide the mouse to a location where a bend is
needed. Click again to mark the bend point. You can make multiple bends.
Terminate the wire by clicking on another element node or on top of another
wire. To cancel the wire, press the Esc key.
When you create a netlist, an empty netlist window opens into which you type a
text-based description of a schematic. Netlist data is arranged in blocks in a
particular order, where each block defines a different attribute of an element
such as units, equations, or element connections. For more information about
creating netlists, see the Microwave Office User Guide.
CREATING EM STRUCTURES
Before you draw an EM structure, you must define an enclosure. The enclosure
specifies things such as boundary conditions and dielectric materials for each
layer of the structure.
To define an enclosure, double-click Enclosure under your new EM structure in
the Project Browser to display a dialog box in which you can specify the
required information.
After you define the enclosure, you can create drawings by accessing options
from the Draw menu to draw components such as rectangular conductors, vias,
and edge ports.
You can view EM structures in 2D (structure) and 3D by using the View menu,
and you can view currents and electrical fields using the Animate menu.
Display 2D
(structure) and
3D views of the
structure
Draw conductors,
vias, and ports
Shortcuts for
drawing
conductors, vias,
and ports
Double-click to
define an
enclosure
When you choose View > New Layout View, default layout cells are automatically
assigned for common electrical components such as microstrip, coplanar
waveguide, and stripline elements. Components of the schematic that do not
map to default layout cells display in blue in the schematic window after the
layout is generated; components that do have default layout cells display in
magenta. For components without default layout cells defined, you must create
them or import them using the Layout Manager. For more information see
Using the Layout Manager on page 3-14.
You can draw in the layout window using the draw tools to build substrate
outlines, draw DC pads for biasing, or to add other elements.
To modify layout attributes and drawing properties, as well as create new layout
cells for elements that do not have default cells, click the Layout tab in the lower
left window. The Layout Manager replaces the Project Browser window.
Right-click to modify
layout attributes or
import an LPF
Right-click to import
a cell library or create
your own using a Cell
Editor
The Layer Setup node in the Layout Manager defines layout attributes such as
drawing properties (for example, line color or layer pattern), 3D properties such
as thickness, and layer mappings. To modify layer attributes, right-click Layer
Setup and choose Edit Drawing Layers. You can also import a layer process file
(LPF) to define these attributes by right-clicking Layer Setup and choosing
Import Process Definition .
The Cell Libraries node in the Layout Manager allows you to create artwork
cells for elements that do not have default layout cells. The powerful Cell Editor
includes such features as coordinate entry, boolean operations for subtracting
and uniting shapes, array copy, arbitrary rotation, grouping, and alignment tools.
You can also import artwork cell libraries such as GDSII or DXF into the AWR
Design Environment.
After creating or importing cell libraries, you can browse through the libraries
and select the desired layout cells to include in your layout. Click the + and -
symbols to expand and contract the cell libraries, and click the desired library.
The available layout cells display in the lower window pane. To place a cell into
the layout window, simply click and drag it, release the mouse button, position it,
and click to place it.
.
You can import layouts as GDSII or DXF files. To export a layout, click the
layout window to make it active, and choose Layout > Export .
An empty graph displays in the workspace and the graph name displays under
Graphs in the Project Browser. The following graph types are available:
Antenna Plot Displays the sweep dimension of the measurement as the angle
and the data dimension of the measurement as the magnitude.
To specify the data that you want to plot, right-click the new graph name in the
Project Browser, and choose Add Measurement . An Add Measurement dialog
box allows you to choose from a comprehensive list of measurements.
Performing Simulations
To run a simulation on the active project, choose Simulate > Analyze. The
simulation runs automatically on the entire project, using the appropriate
simulator (for example, linear simulator, harmonic balance nonlinear simulator,
or 3D-planar EM simulator) for the different pieces of the project.
To set the simulation frequency, double-click the Project Options node in the
Project Browser, or choose Options > Project Options and then specify
frequency values on the Frequencies tab in the dialog box.
When the simulation is complete, you can view its output on the graphs and
then easily tune and/or optimize as needed.
TUNING SIMULATIONS
The real-time tuner lets you see the effect on the simulation as you tune. The
optimizer lets you see circuit parameter values and variables change in real-time
as it works to meet the optimization goals that you specified.
You can also click the Tune Tool button on the toolbar. Select the parameters
you want to tune and then click the Tuner button to tune the values. As you tune
or optimize, the schematics and associated layouts are automatically updated.
When you re-run the simulation, only the modified portions of the project are
recalculated.
Scripts are Basic programs that you can write to do things such as automate
schematic-building tasks within Microwave Office.
Wizards are Dynamic Link Library (DLL) files which you can author to create
add-on tools for Microwave Office, for example, a filter synthesis tool.
Wizards display under Wizards in the Project Browser; to access scripts, choose
Tools > Scripting Editor.
.....
Linear simulators use nodal analysis to simulate the characteristics of a circuit.
Linear simulations are used for circuits such as low noise amplifiers, filters, and
couplers whose elements can be characterized by an admittance matrix. Linear
simulators typically generate measurements such as gain, stability, noise figure,
reflection coefficient, noise circles, and gain circles.
3 Click OK .
Creating a Schematic
To create a schematic:
1 Choose Project > Add Schematic > New Schematic. The Create New
Schematic dialog box displays.
2 Type “lpf ”, and click OK . A schematic window displays in the workspace
and the schematic displays under Circuit Schematics in the Project
Browser.
Use the scroll arrows along the right and bottom of the schematic window to
view different portions of the schematic as you work.
To place elements on a schematic:
1 Click the Elem tab in the lower left of the window to display the Element
Browser. The Element Browser replaces the Project Browser window.
2 If necessary, click the + symbol to the left of the Circuit Elements node to
expand the elements tree.
3 Expand the Lumped Element category under Circuit Elements, then click
the Inductor subgroup. Select the IND model from the bottom window
and drag it to the schematic as shown in the following figure.
Element Browser
Element models
4 Repeat step 3 three times, aligning and connecting each inductor as shown
in the following figure.
TIP: You can also connect elements by moving them to snap their nodes
together. When they are properly connected a small green square displays
and the connection wire extends if you move either element. If you do not
see the green square, try to drag one of the elements into place again.
5 Click the Capacitor subgroup under Lumped Element, then select the CAP
model and place it on the schematic as shown in the following figure. Right-
click once before placing the capacitor to rotate it as shown.
6 Repeat Step 5 twice, aligning and linking each capacitor as shown in the
following figure.
2 Click, then drag the wire past the bottom node of CAP C2, then onto the
bottom node of CAP C3, and click to place the wire.
3 Repeat Step 1 to add a port to the right-most inductor, but right-click two
times to rotate the port 180-degrees before you place it.
TIP: You can also add a port by clicking the Port button on the toolbar and
sliding the cursor into the schematic.
PORT
P=2
CAP CAP CAP Z=50 Ohm
ID=C1 ID=C2 ID=C3
C=1 pF C=1 pF C=1 pF
PORT
P=2
CAP CAP CAP Z=50 Ohm
ID=C1 ID=C2 ID=C3
C=8 pF C=10 pF C=8 pF
TIP: You can also simply double-click the parameter value displayed on the
schematic to display a text box in which you can modify a single parameter.
4 Type “100 ” in Start , “1000 ” in Stop, and “10 ” in Step, and then click Apply.
The frequency range and steps you specified display in Current Range.
5 Click OK .
Creating a Graph
To create a graph:
1 Right-click Graphs in the Project Browser and choose Add Graph. You can
also click the New Graph button on the toolbar. The Create Graph dialog
box displays.
2 Type “s21 and s11 ” in Graph Name, select Rectangular as the Graph Type,
and click OK . The graph displays in a window in the workspace and displays
as a subgroup of Graphs in the Project Browser.
Individual
graphs display
under Graphs
ADDING A MEASUREMENT
3 Change the value in To Port Index to “2 ”, and click Apply to add a second
measurement.
4 Click OK . The measurements lpf:DB(|S(1,1)|) and lpf:DB(|S(2,1)|) display
under the “s21 and s11” graph in the Project Browser.
-20
-30
-40
-50
100 300 500 700 900 1000
Frequency (MHz)
When you place the tune tool over a schematic element, the cursor displays as a
cross icon to indicate that the parameter is tuneable.
To tune the circuit:
1 Click the schematic window to make it active.
2 Click the Tune Tool button on the toolbar.
3 Move the cursor over the L parameter of IND L1. The cursor displays as a
cross as shown in the following figure.
-10
DB(|S(1,1)|)
lpf
DB(|S(2,1)|)
-20
lpf
-30
-40
-50
100 300 500 700 900 1000
Frequency (MHz)
10 Click the X at the top right of the Variable Tuner dialog box to close it and
click the Tune Tool button on the toolbar to deactivate the tuner.
Creating Variables
Filters are typically symmetric circuits. To optimize the circuit, you must change
some of the parameter values to variables.
To create variables:
1 Click the schematic window to make it active.
2 Choose Draw > Add Equation .
3 Move the cursor into the schematic to display an edit box.
4 Position the edit box near the top of the schematic window and click to
place it.
5 Type “IND=15 ” (without the quotes) in the edit box, and then click outside
of the box.
6 Repeat Steps 2 through 5 to create a second edit box, but type “CAP=8 ”
(without the quotes).
7 Double-click the L parameter value of IND L1. An edit box displays. Type
the value “IND ” and then click outside of the edit box.
8 Repeat Step 7 to change the L parameter value of IND L4 to “IND ”, and the
C parameter values of CAP C1 and CAP C3 to “CAP ”, as shown in the
following figure.
IND=15 CAP=8
PORT IND
P=1 IND ID=L2 IND IND
Z=50 Ohm ID=L1 L=30 nH ID=L3 ID=L4
L=IND nH L=30 nH L=IND nH
PORT
P=2
Z=50 Ohm
CAP CAP CAP
ID=C1 ID=C2 ID=C3
C=CAP pF C=10 pF C=CAP pF
3 When the optimization is complete, click the X box to exit the Optimizer
dialog box. The optimized response in the following schematic and graph
should display. Note that your IND and CAP values may vary slightly.
IND=16.74 CAP=9.648
PORT IND
P=1 IND ID=L2 IND IND
Z=50 Ohm ID=L1 L=30 nH ID=L3 ID=L4
L=IND nH L=30 nH L=IND nH
PORT
P=2
Z=50 Ohm
CAP CAP CAP
ID=C1 ID=C2 ID=C3
C=CAP pF C=11.07 pF C=CAP pF
-30
-40
-50
-60
100 300 500 700 900 1000
Frequency (MHz)
To modify element parameters in the lpf2 and lpf3 schematics (so that each
schematic is different):
3 Click the “lpf2” schematic window to make it active. Double-click the IND
and CAP variables and change them to the following values.
IND=9 CAP=8
PORT IND
P=1 IND ID=L2 IND IND
Z=50 Ohm ID=L1 L=30 nH ID=L3 ID=L4
L=IND nH L=30 nH L=IND nH
PORT
P=2
Z=50 Ohm
CAP CAP CAP
ID=C1 ID=C2 ID=C3
C=CAP pF C=11.07 pF C=CAP pF
IND=16.74 CAP=9.648
PORT IND
P=1 IND ID=L2 IND IND
Z=50 Ohm ID=L1 L=30 nH ID=L3 ID=L4
L=IND nH L=30 nH L=IND nH
PORT
P=2
Z=50 Ohm
CAP CAP CAP
ID=C1 ID=C2 ID=C3
C=CAP pF C=13 pF C=CAP pF
SUBCKT
PORT ID= S1
P= 1 NET= "lpf"
Z= 50 Ohm
1 2
PORT
P= 2
Z= 50 Ohm
X vector={"lpf3","lpf2","lpf"}
SUBCKT
POR T ID = S1
P= 1 NET= "lpf"
Z= 50 Ohm
1 2
PORT
P= 2
Z= 50 O hm
Xvector={"lpf3","lpf2","lpf"}
X=Xvector[1]
SUBCKT
PORT ID=S1 PORT
P=1 NET=X P=2
Z=50 Ohm Z=50 Ohm
1 2
2 Right-click “Copy of s21 and s11” and choose Rename Graph . Type
“subckt opt” in the Rename Output Document dialog box and click OK .
X=Xvector[3]="lpf"
SUBCKT
PORT ID=S1 PORT
P=1 NET=X P=2
Z=50 Ohm Z=50 Ohm
1 2
.....
Layouts are views of the physical representations of a schematic. Layout is a critical
part of high-frequency circuit design and simulation, since the response of a circuit
is dependent on the geometric shapes with which it is composed.
Press the Ctrl key, select a shape, move Snap to corners, edges, and centers of
the mouse circles
Select a shape, hold down the mouse Move shape with coordinate entry
button, press the Tab key
Layout Manager
You may occasionally need to access the ground node of a data file.
To expose the ground node of a transistor data file:
1 Double-click the subcircuit element in the schematic window. The Element
Options dialog box displays.
2 Click the Ground tab.
3 Select Explicit ground node, then click OK .
MLIN
ID=TL1
2
W=50 mil
L=400 mil
1 SUBCKT
ID=S1
NET=N76038a
MLIN
ID=TL1
2
MTEE$ W=50 mil
ID=TL2 L=400 mil
1 SUBCKT
1 2 ID=S1
NET=N76038a
3
3
3 In the Microstrip category, click the Lines subgroup. Select the MTRACE2
model and place it in the schematic window onto node 1 of the MTEE$
element.
4 Select the MLEF model and place it in the schematic window. Right-click
three times to rotate the element, then position it onto node 3 of the
MTEE$ element.
5 Double-click the MTRACE2 element in the schematic window to display
the Element Options dialog box.
6 Edit the MTRACE2 parameters to match those shown in the following
figure, then click OK .
7 Repeat step 6 for the MLIN and MLEF elements to match their parameters
to those shown in the following figure.
MTRACE2
ID=X1
W=10 mil MLIN SUBCKT
L=200 mil ID=TL1 ID=S12
BType=2 MTEE$ W=10 mil NET="N76038a"
M=0.6 ID=TL2 L=100 mil
1
1 2
3
3
MLEF
ID=TL3
W=20 mil
L=150 mil
8 Click the Substrates category, then select the MSUB model and place it on
the schematic window as shown in the following figure.
MTRACE2
ID=X1
W=10 mil MLIN SUBCKT
L=200 mil ID=TL1 ID=S12
BType=2 MTEE$ W=10 mil NET="N76038a"
M=0.6 ID=TL2 L=100 mil
1
1 2
MSUB 3
Er=9.8
H=10 mil
MLEF T=0.1 mil
ID=TL3 Rho=1
W=20 mil Tand=0
L=150 mil ErNom=9.8
Name=SUB1
10 Click the Port button on the toolbar, move the cursor onto the schematic,
position the port on the left node of the MTRACE2 element as shown in
the following figure, and click again to place it.
11 Add another port to node 2 of the SUBCKT element. Right-click three
times to rotate the port, position it, and click again to place it.
12 To complete the schematic, click the Ground button on the toolbar, move
the cursor into the schematic, position the ground on node 3 of the
SUBCKT element, and click again to place it.
PORT
P=2
Z=50 Ohm
MTRACE2
ID=X1
W=10 mil MLIN
L=200 mil ID=TL1 2
BType=2 MTEE$ W=10 mil
M=0.6 ID=TL2 L=100 mil
PORT 1 SUBCKT
P=1 1 2 ID=S1
Z=50 Ohm NET="N76038a"
3
MSUB 3
Er=9.8
H=10 mil
MLEF T=0.1 mil
ID=TL3 Rho=1
W =20 mil Tand=0
L=150 mil ErNom=9.8
Name=SUB1
Viewing a Layout
The schematic and layout are different views of the same database. Edits made
to the parameters in the schematic are instantly updated in the layout, and vice
versa.
To view a layout:
1 Click the schematic window to make it active.
2 Choose View > New Layout View or click the New Schematic Layout View
button on the toolbar to view a layout representation. The layout displays in
a layout window.
3 Choose Edit > Select All to select all of the layout cells.
4 Choose Edit > Snap Together to snap all of the faces of the artwork cells
together.
2 Click the Layout tab, select the Use for anchor check box, and click OK .
The artwork cell now has an anchor symbol as shown in the following
figure.
4 Click the Set Grid Snap Multiple button on the toolbar and set it to 10x.
5 Click the Copper box in the left column of the lower pane to enable copper
as the active layer, as shown in the following figure. (Do not click the light-
bulb, as that specifies hiding or showing drawing layers.)
9 Press the Tab key again to display the Enter Coordinates dialog box.
10 Type the values “10 ” and “-10 ” in dx and dy, respectively, and click OK . The
following figure shows the resulting drawing. (You may need to adjust your
view by choosing View > Zoom In or View > Zoom Out .)
11 Click the Footprint box in the left column of the lower pane of the Layout
Manager to enable footprint as the active layer.
12 Click the “chip cap” window to make it active.
13 Choose Draw > Rectangle.
14 Move the cursor into the “chip cap” window, then press the Tab key. The
Enter Coordinates dialog box displays.
15 Type the values “10 ” and “10 ” in x and y, respectively, and click OK .
16 Press the Tab key again to display the Enter Coordinates dialog box.
17 Type the values “20 ” and “-10 ” in dx and dy, respectively, and click OK . The
following figure shows the resulting drawing.
18 Click the copper square in the “chip cap” window, and press Ctrl+C then
Ctrl+V to copy and paste it. Slide the mouse to position the copied square
along the right edge of the rectangle as shown in the following figure, and
click to place it.
Ports in the artwork cell editor define the faces to which other layout cells
connect. The orientation of the port arrow determines the direction of
connection to the adjacent layout cell.
To add ports to an artwork cell:
1 Choose Draw > Cell Port .
2 Move the cursor into the “chip cap” window. Press and hold the Ctrl key
while you move the cursor over the bottom left vertex of the square until a
square symbol displays on the vertex. Do not release the Ctrl key.
3 With the Ctrl key still pressed, click and hold down the mouse button while
moving the cursor to the top vertex, until another square displays on that
vertex. Release the mouse button and the Ctrl key.
5 Click the X at the top right of the “chip cap” window. A dialog box asks if
you want to save the cell edits. Click Yes to save.
PORT
P=2
Z=50 Ohm
MTRACE2
ID=X1
W =10 mil MLIN
L=200 mil ID=TL1 2
BType=2 MTEE$ W=10 mil
M=0.6 ID=TL2 L=100 mil
PORT 1 SUBCKT
P=1 1 2 ID=S1
Z=50 Ohm NET="N76038a"
3
MSUB 3
Er=9.8
H=10 mil
MLEF T=.1 mil
ID=TL3 Rho=1
W=20 mil Tand=0
L=150 mil ErNom=9.8
Name=SUB1
3 In the Element Browser, expand the Lumped Element category, then click
the Capacitor subgroup. Select the CAP model, and place it in the
schematic window between PORT 1 and the MTRACE2 element.
4 Double-click the CAP C1 element in the schematic window. The Element
Options dialog box displays.
5 Click the Layout tab.
6 Select “chip cap” from the list of cells, then click OK .
7 Choose View > New Layout View. The new layout displays in the workspace.
The layout and corresponding schematic are shown in the following figures.
PORT
P=2
Z=50 Ohm
MTRACE2
ID=X1
W=10 mil MLIN
CAP L=200 mil ID=TL1
ID=C1 2
BType=2 MTEE$ W=10 mil
C=1 pF
M=0.6 ID=TL2 L=100 mil
PORT SUBCKT
1
P=1 1 2 ID=S1
Z=50 Ohm NET="N76038a"
3
MSUB 3
Er=9.8
H=10 mil
MLEF T=.1 mil
ID=TL3 Rho=1
W=20 mil Tand=0
L=150 mil ErNom=9.8
Name=SUB1
3 Move the routing tool to the desired point and click to place. (Right-click to
delete the last point; press the Esc key to cancel the activity.)
4 Continue to route points by moving the routing tool and clicking to place,
then double-click to complete the routing.
TIP: MLIN is a straight element with a width you can change in the layout. You
can edit the MTRACE2 elements in the layout to create jogs and bends and
chamfered corners. You can edit the MCTRACE element to create jogs and
bends with rounded corners.
4 Repeat step 3 with the MTRACE2 element and the chip cap cell. Position
the layout cells as shown in the following figure.
The red lines indicate that the faces of the layout cells are not snapped together.
To snap a selected set of layout cells together:
5 Hold down the Shift key and select the MLEF, MTRACE2, and MTEE$
layout cells in the layout window.
6 Click the Snap Together button on the toolbar. Observe that the chip cap
layout cell and MLIN layout cell are not snapped together.
The “snap to fit” function finishes the routing of an MTRACE2 layout cell to a
specified adjacent layout cell. In this example, the chip cap layout cell is moved
and MTRACE2 re-routes to snap to the chip cap face.
To “snap to fit” MTRACE2 to the chip cap:
9 Position the chip cap artwork cell as shown in the following figure.
10 Select the MTRACE2 layout cell, hold down the Shift key and select the
chip cap artwork cell.
11 Click the Snap to Fit button on the toolbar. The MTRACE2 routes to snap
to the chip cap artwork cell as shown in the following figure.
4 Choose Layout > Export . The Export Layout dialog box displays.
.....
Harmonic balance (HB) is an efficient method for the steady-state analysis of
nonlinear circuits such as power amplifiers, mixers, multipliers and oscillators.
This chapter presents an overview of HB simulations in Microwave Office. For
more detailed information, see the Microwave Office User Guide.
Single-Tone Analysis
A single-tone HB analysis simulates the circuit at a fundamental frequency, at
integer multiples of the fundamental frequency, and at DC. Single-tone
harmonic balance requires the specification of a fundamental frequency (or a
frequency sweep) and the total number of harmonics.
Multi-Tone Analysis
Multi-tone simulations are used to determine the output of a circuit excited by
two or more frequencies that cannot be expressed as integer multiples of one
another. Typical examples include the LO and RF signals in a mixer and closely
spaced tones used for intermodulation testing of amplifiers.
Nonlinear Measurements
Microwave Office offers a large number of post-processing functions for
viewing simulation results in both the frequency and the time domain. Examples
Creating a Schematic
To create a schematic:
1 Choose Project > Add Schematic > New Schematic. The Create New
Schematic dialog box displays.
2 Type “IV Curve ”, and click OK . A schematic window displays in the
workspace.
2 Expand the Library category, then expand the Nonlinear and Getting
Startedsubgroups. Click the GBJT subgroup, then select the BLT11_chip
model and place it as shown in the following figure.
GBJT
ID=GP_BLT11_chip_1
2 C
1 4
B S
3 E
GBJT
ID=GP_BLT11_chip_1
2 C
1 4
B S
3 E
IVCURVEI
ID=IV1
VSWEEP_start=0 V
VSWEEP_stop=4 V
VSWEEP_step=1 V
ISTEP_start=0 mA
ISTEP_stop=10 mA
ISTEP_step=2 mA
Swp Step
2 In the Element Browser, expand the Library category, then expand the
Nonlinear and GettingStarted subgroups. Click the GBJT subgroup, then
select the BLT11_chip model and place it on the schematic as shown in the
following figure.
3 Expand the Lumped Element category, then click the Inductor subgroup.
Select the IND model, and place it above and to the left of the GBJT
transistor as shown in the following figure.
4 Place the cursor on node 1 of the GBJT transistor. The cursor displays as a
wire coil symbol. Click, then drag the cursor to the right node of IND, and
click to place the wire.
5 Double-click the IND model and set the L parameter to “1 ”, then click OK .
6 Click the Resistor subgroup under Lumped Element. Select the RES model
and place it as shown in the following figure after right-clicking once to
rotate the element.
IND
ID=L1
L=1 uH
GBJT
ID=GP_BLT11_chip_1
2 C
1 4
B S
3 E
RES
ID=R1
R=1 Ohm
7 Double-click the RES model and set the R parameter to “0.5 ”, then click
OK .
8 Click the Ground button on the toolbar and position the ground on the
bottom of RES R1 as shown in the following figure.
9 Repeat step 8, positioning the ground on node 4 of the GBJT transistor as
shown in the following figure.
10 Expand the Sources category, then click the DC subgroup. Select the
DCVS model and place it as shown in the following figure.
11 Click the Ground button on the toolbar and position the ground on the
open end of DCVS V1 as shown in the following figure.
12 Double-click the DCVS model and set the V parameter to “1 ”, then click
OK .
13 Click IND L1 in the schematic window. Press Ctrl+C, then Ctrl+V to copy
and paste it. Connect the new IND element to node 2 of the GBJT model
as shown in the following figure.
14 Copy the DCVS model and place the copy on the open node of IND L2 as
shown in the following figure.
15 Double-click the DCVS V2 model and set the V parameter to “6 ”, then
click OK .
16 Click the Ground button on the toolbar and position the ground on the
negative node of DCVS V2 as shown in the following figure.
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
DCVS
ID=V1
V=1 V
DCVS
ID=V2
V=6 V
GBJT
ID=GP_BLT11_chip_1
2 C
1 4
B S
3 E
RES
ID=R1
R=0.5 Ohm
4 Choose Simulate > Analyze. The voltage displays at all nodes and the
current displays at each element as shown in the following figure.
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
3.76 mA 295 mA
DCVS 3.76 mA
ID=V1 1V
V=1 V
DCVS 295 mA
ID=V2 6V
V=6 V
0V GBJT
ID=GP_BLT11_chip_1
2 C 295 mA
6V
1 4
B3.76 mA S
1V
3 E
299 mA
0.149 V
RES
ID=R1
R=0.5 Ohm
Before adding a harmonic balance port, you must add DC blocking capacitors
to the transistor input and output.
To add DC blocking capacitors:
1 Click the “DC Bias” schematic window in the workspace to make it active.
2 In the Element Browser, expand the Lumped Element category, then click
the Capacitor subgroup. Select the CAP model and connect it to node 1 of
the GBJT transistor as shown in the following figure.
3 Double-click the CAP model and set the C parameter to “100 ”, then click
OK .
4 Copy the CAP model (hereinafter referred to as CAP C1) and connect the
copy (CAP C2) to node 2 of the GBJT transistor as shown in the following
figure.
You must also add an RF bypass capacitor across the emitter resistor.
To add an RF bypass capacitor:
5 Copy the CAP C1 model and place the copy (CAP C3) to the left of RES
R1 after right-clicking once as shown in the following figure.
6 Connect the top node of CAP C3 to node 3 of the GBJT transistor.
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
3.76 mA 295 mA
DCVS 3.76 mA
ID=V1 1V
V=1 V
DCVS 295 mA
ID=V2 6V
V=6 V
CAP
ID=C2
0V C=100 pF
CAP 295 mA
ID=C1 2 C
6V
C=100 pF GBJT
ID=GP_BLT11_chip_1
1 4
B3.76 mA S
1V
3 E
299 mA
0.149 V
CAP RES
ID=C3 ID=R1
C=100 pF R=0.5 Ohm
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
3.76 mA 295 mA
DCVS 3.76 mA
ID=V1 1V
V=1 V
DCVS 295 mA
ID=V2 6V
V=6 V
CAP
ID=C2
0V C=100 pF
PORT1
P=1 CAP 295 mA
ID=C1 2 C
Z=50 Ohm 6V PORT
Pwr=23 dBm C=100 pF GBJT P=2
ID=GP_BLT11_chip_1 Z=50 Ohm
1 4
B3.76 mA S
1V
3 E
299 mA
0.149 V
CAP RES
ID=C3 ID=R1
C=100 pF R=0.5 Ohm
following figure, click Apply to display the values in Current Range, and
then click OK .
2.5GHz
0.6
2.0
4
0.
3.0
4.0
5.0
0.2
10.0
10.0
0.2
0.4
0.6
0.8
1.0
2.0
3.0
4.0
5.0
0
-10.0
-0.2
-5.0
-4.0
.0
-3
.4
-0
.0
-2
-0.6
Swp Min
-0.8
-1.0
1.5GHz
Importing Schematics
The input and output matching for the amplifier are imported from existing
schematics.
To import the input match schematic:
1 In the Project Browser, right-click Circuit Schematics and choose Import
Schematic. The Open dialog box displays.
2 Locate the C:\Program Files\AWR\AWR2003\Examples\Getting
directory and double-click it to open
Started\Microwave Office\Nonlinear
it.
3 Select the “input match.sch” file and click Open to import and open the
schematic.
TLIN
ID=TL1
PORT
Z0=10 Ohm
P=1
EL=83 Deg
Z=50 Ohm
F0=1.9 GHz
PORT
TLIN P=2
ID=ind1 TLOC
ID=TL2 Z=50 Ohm
Z0=78 Ohm
EL=25 Deg Z0=21 Ohm
F0=1.9 GHz EL=90 Deg
F0=1.9 GHz
T LI N
I D= q ua r
PORT Z 0= 3 0 O h m
P =2 E L= 8 8 D e g
Z =5 0 O h m F 0= 1 .9 G Hz
P O RT
TL I N P =1
I D= i nd Z = 5 0 O hm
Z 0= 8 0 O h m
E L= 2 2 D e g
F 0= 1 .9 G Hz
CA P
I D= C 1
C = 1 00 p F
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
DCVS
ID=V1
V=1 V
DCVS
ID=V2
V=6 V
CAP
ID=C2
C=100 pF
PORT1
P=1 CAP
ID=C1 2 C
Z=50 Ohm PORT
Pwr=23 dBm C=100 pF GBJT P=2
ID=GP_BLT11_chip_1 Z=50 Ohm
1 4
B S
3 E
CAP RES
ID=C3 ID=R1
C=100 pF R=0.5 Ohm
4 In the Element Browser, click the Subcircuits category then select the
“input match” subcircuit and place it on the schematic between CAP C1
and node 1 of the GBJT transistor as shown in the following figure.
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
DCVS
ID=V1
V=1 V DCVS
ID=V2
V=6 V
CAP
ID=C2
C=100 pF
PORT1 SUBCKT
P=1 CAP ID=S1
ID=C1 2 C
Z=50 Ohm NET="input match" PORT
Pwr=23 dBm C=100 pF GBJT P=2
ID=GP_BLT11_chip_1 Z=50 Ohm
1 2 1 4
B S
3 E
CAP RES
ID=C3 ID=R1
C=100 pF R=0.5 Ohm
5 If the subcircuit nodes do not properly connect with the capacitor and
transistor you may need to slightly move the elements until the proper
connections are made.
6 Repeat steps 2 and 3 with PORT2 and CAP C2 as shown in the following
figure.
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
DCVS
ID=V1
V=1 V DCVS
ID=V2
V=6 V
CAP
ID=C2
C=100 pF
PORT1 SUBCKT
P=1 CAP ID=S1
ID=C1 2 C
Z=50 Ohm NET="input match" PORT
Pwr=23 dBm C=100 pF GBJT P=2
ID=GP_BLT11_chip_1 Z=50 Ohm
1 2 1 4
B S
3 E
CAP RES
ID=C3 ID=R1
C=100 pF R=0.5 Ohm
7 Click the Subcircuits category then select the “output match” subcircuit
and connect it to the open node of CAP C2 after right-clicking twice to invert it,
as shown in the following figure.
8 Connect node 2 of the output match subcircuit to node 2 of the GBJT
transistor.
9 Double-click the Pwr parameter value of the PORT1 element. An edit box
displays over the value. Type “18 ” to change the value from 23 to 18 dBm,
then click outside the edit box to save the change.
IND IND
ID=L1 ID=L2
L=1 uH L=1 uH
DCVS
DCVS ID=V2
ID=V1
V=6 V
V=1 V
SUBCKT
ID=S2 CAP
NET="output match" ID=C2
C=100 pF
PORT1 SUBCKT
P=1 CAP 2 1
ID=S1 2 C
Z=50 Ohm ID=C1 NET="input match" PORT
Pwr=18 dBm C=100 pF GBJT P=2
ID=GP_BLT11_chip_1 Z=50 Ohm
1 2 1 4
B S
3 E
CAP RES
ID=C3 ID=R1
C=100 pF R=0.5 Ohm
Pout
29
28 DB(|Pcomp(PORT_2,1)|) (dBm)
DC Bias
27
26
1.5 2 2.5
Frequency (GHz)
IV BJT
1200
800
400
IVCurve() (mA)
IV Curve
-400
0 5 10
IVDLL(GBJT.GP_BLT11_chip_1@2,GBJT.GP_BLT11_chip_1@ce)[1] (mA) 15
DC Bias Voltage (V)
5 Click the Parameters tab and edit the parameters to the values shown in the
following figure, then click OK .
IM3
30
-90
-10 0 10 20 30
Power (dBm)
IND
ID=L2 DCVS
L=1 uH ID=V2
Vcc=1
V=6 V
IND
DCVS ID=L1
ID=V1 L=1 uH
V=1 V
I_METER CAP
ID=AMP1 ID=C2
PORT2 C=100 pF
P=1 GBJT
Z=50 Ohm ID=GP_BLT11_chip_1
Fdelt=0.2 GHz 2 1
SUBCKT
Pwr1=-10 dBm CAP ID=S1 PORT
ID=C1 2 C
Pwr2=-10 dBm NET="input match" SUBCKT P=2
Ang1=0 Deg C=100 pF ID=S2 Z=50 Ohm
1 2 1 4 NET="output match"
B S
V_METER
3 E ID=VM1
SWPVAR
ID=SWP1
VarName="Vcc"
Values=stepped(4,8,0.5) CAP RES
UnitType=None ID=C3 ID=R1
C=100 pF R=0.5 Ohm
Xo . . . Xn
OIPN(PORT_2,0_1,-1_2,3)[*,X] (dBm)
IP3
40 IP3 p3
p4
p1
p2
p5
38 p6
36
34
.....
Electromagnetic (EM) simulators use Maxwell’s equations to compute the
response of a structure from its physical geometry. EM simulations are ideal
because they can simulate highly arbitrary structures and still provide very
accurate results. In addition, EM simulators are not subject to many of the
constraints of circuit models because they use fundamental equations to
compute the response. One limitation of EM simulators is that simulation time
grows exponentially with the size of the problem, thus it is important to
minimize problem complexity to achieve timely results.
G e t t i n g S t a r t e d G u i d e 7-1
USING THE ELECTROMAGNETIC SIMULATOR
7 Creating a Distributed Interdigital Filter
The following example illustrates some of the key features of the Microwave
Office EM simulator.
Creating an EM Structure
To create an EM structure:
1 Choose Project > Add EM Structure > New EM Structure. The New EM
Structure dialog box displays.
2 Type “Interdigital Filter ” and select the AWR EMSight Simulator from the
list of EM Simulators available on your computer, then click Create. An EM
structure window displays in the workspace.
TIP: EMSight uses a rectilinear grid for defining structures. When you set up
designs, use the coarsest grid possible when defining structures, as this
provides faster simulation time (usually without any compromise in
simulation accuracy.) Other third-party EM simulators may only use the
grid for drawing purposes and the density may not matter-- see the third-
party simulator documentation for further details.
The enclosure defines all the dielectric materials for each of the layers in an EM
structure, sets the boundary conditions, and defines the overall physical size of
the structure and minimum grid units used to specify conductor materials in the
structure.
To set up the enclosure:
1 Choose Options > Project Options. The Project Options dialog box
displays.
2 Click the Global Units tab and select the Metric units check box, then set
the Length type to “mm ” and click OK .
3 In the Project Browser, under EM Structures and “Interdigital Filter”,
double-click Enclosure. The Substrate Information dialog box displays.
In EMSight, the boundary conditions for the sidewalls of the enclosure are
always perfect conductors and cannot be modified. Third-party simulators may
make other assumptions for the sidewall boundary conditions-- for details, see
the vendor documentation for the solver used. The boundary conditions for the
top and bottom of the enclosure have default perfect conductors, but they can
be modified. You do not modify the default boundary conditions in this
example.
To view the boundary conditions:
1 Click the Boundaries tab in the Substrate Information dialog box.
2 Click OK to complete the enclosure set up procedure.
4 Type “0 ” as the value of x and “2.2 ” as the value of y, and then click OK .
5 Press the Tab key again to display the Enter Coordinates dialog box. Ensure
that the Re (relative) check box is selected, type “2.2 ” as the value of dx,
and “0.6 ” as the value of dy, and then click OK . A rectangular conductor
displays in the EM structure window.
8 Press the Tab key again to display the Enter Coordinates dialog box. Type
“1.2 ” as the value of dx and “7.2 ” as the value of dy, and then click OK . A
second rectangular conductor displays in the EM structure window.
TIP: Click the Ruler button on the toolbar to measure the dimension of
conductors, offsets, or spaces in an EM structure layout.
12 Drag the cursor until the dx, dy readout displays dx:-2 and dy:-1, then
release the button to place the rectangle.
Adding Vias
Vias are interconnects between substrate layers. You must add a via to ground
one side of the larger conductor to the bottom of the enclosure.
To add a via:
1 Choose Draw > Add Via .
2 Move the cursor into the Interdigital Filter window and press the Tab key.
The Enter Coordinates dialog box displays. Type “2.4 ” as the value of x and
“1.2 ” as the value of y, and then click OK .
3 Press the Tab key again to display the Enter Coordinates dialog box. Type
“0.4 ” as the value of dx and “0.8 ” as the value of dy, and then click OK . A
via displays in the Interdigital Filter window, with blue squares in its corners
to show that it is selected.
3 Clear the Use project defaults check box to give local frequency settings
precedence over global project frequency settings.
4 Ensure that GHz displays in Data Entry Units.
TIP: You can define the simulation frequency globally (by choosing Options >
Project Options and clicking the Frequencies tab) or locally using these
steps. It is best to use the local frequency settings for EM structures as you
typically want to sweep EM structures with fewer frequency points than
with linear circuits. Data is obtained at the project frequencies using
interpolation and/or extrapolation.
5 Specify the Start, Stop and Step values shown in the following figure, click
Apply to display the values in Current Range, and then click OK .
DB(|S(1,1)|)
EM Graph 1
0 Interdigital Filter
-0.01
-0.02
-0.03
-0.04
1 2 3 4 5
Frequency (GHz)
DB(|S(1,1)|)
EM Graph 1 Interdigital Filter
0
-0.1
-0.2
-0.3
-0.4
3 3.5 4 4.5 5
Frequency (GHz)
3.635
0.635
0
0
10
Y Axis
X Axis
10 0
3.635
0.635
0
0
Y Axis 10
X Axis
10 0
You must move the flipped instance to align the output line with the edge of the
structure. To move the flipped instance:
11 Move the cursor over the selected instance until the cursor displays as a
cross.
12 Click, and drag the outline of the instance until the output line aligns with
the edge of the structure as follows, then release the mouse button.
1
output line
edge of structure
14 Choose Edit > Copy, then choose Edit > Paste. An outline of the copied
instance displays.
15 Move the cursor to the middle of the EM structure window to move the
copied instance to the middle of the window, then right-click twice to rotate
the instance 180-degrees.
16 Press the Tab key to display the Enter Coordinates dialog box.
17 Deselect Re to change the relative coordinates. Type “5.6 ” as the x value
and “9.2 ” as the y value, and then click OK . The EM Structure displays as
follows.
Adding a Port
To complete the EM structure, you must add a port to the output line.
To add a port to the output line and de-embed 1mm of electrical length:
1 Click the rightmost conductor in the EM structure window.
TIP: Choose View > Zoom In once or twice to magnify the view for the following
steps.
2 Choose Draw > Add Edge Port .
3 Position the cursor on the right edge of the conductor until the outline of a
square displays, and click to place the port. A small box with the number 2
(indicating port 2) displays at the right edge of the conductor.
4 Right-click in the EM structure window and choose View Area .
5 With the cursor displayed as a magnifying glass, click and drag the cursor
around port 2 and the small conductor. The window zooms in on the
selected area.
6 Click port 2. Four squares display at its corners.
7 Move the cursor over the edge of the port until it displays as a double arrow.
8 Click and hold down the mouse button to display a dx or dy readout.
9 Drag the cursor to the left until the dx, dy readout displays dx:-1. Release
the mouse button to place the de-embedding line. The final layout is shown
in the following figure.
2 Create a measurement using the settings in the following figure, then click
OK .
3 Choose Simulate > Analyze. The final simulation response on the following
graph displays.
EM Graph 1
0 DB(|S(1,1)|)
Interdigital Filter
DB(|S(2,1)|)
-20 Interdigital Filter
-40
-60
-80
3 3.5 4 4.5 5
Frequency (GHz)
.....
This chapter provides a brief outline of the theory behind the Visual System
Simulator (VSS), and includes a procedure for a simple amplitude modulation to
demonstrate how a simulation is performed in VSS. The first section describes
the basic philosophy of the simulator, and the example describes use of several
key VSS features.
Data Types
All VSS blocks have input and output nodes which handle (and operate on) data
belonging to one of four basic data types: Digital, Real, Complex, or Unset.
Each VSS block node color corresponds to its data type: green for Digital,
yellow for Real, red for Complex, and white for an Unset data type. Unset nodes
indicate the block supports two or more data types. You can double-click an
unset node to redefine it as a specific node type. For example, ADD2, a two-
input adder (located in the Element Browser under System Blocks in the Math
Tools > Adders category) has Unset nodes by default, signifying that it adds the
data coming into its two nodes and provides the sum at its output node
regardless of the data type. Another example is the behavioral amplifier AMP_B
(located in the Element Browser under System Blocks in the RF Blocks >
Behavioral category), which also has its ports unset. The amplifier block
supports both real and complex signals, but does not support digital signals.
Digital data types comprise streams of digital data with abrupt transitions (such
as a pseudo-random sequence of bits generated by a source to perform a
G e t t i n g S t a r t e d G u i d e 8-1
SYSTEM SIMULATION IN VSS
8
G e t t i n g S t a r t e d G u i d e 8-3
SYSTEM SIMULATION IN VSS
8
The Data Rate is the number of digital communication symbols per second.
Inside a VSS system diagram the default data rate is denoted _DRATE. A
symbol can differ in meaning, depending on the modulation specifics. For
example, for the previous GSM, the symbol rate or data rate is set by the
standard as 270.833 ksymbols/sec, and since in this case every symbol is one bit,
it translates to 270.833 kbits/sec. To simulate a satellite link using Quadrature
Phase Shift Keying (QPSK) modulation to transmit 100 Mbits/sec, you set the
symbol rate (or data rate) of the QPSK source block to 50 Msymbols/sec
(because each QPSK symbol corresponds to 2 bits). The QPSK_SRC block is
found under the System Blocks Modulation > QPSK category.
Each of these symbols can be represented with any number of samples
(oversampling). Inside a VSS system diagram the default number of samples per
symbol is denoted _SMPSYM. For the QPSK example, you can have 10
samples per symbol, which is a total sampling frequency of:
f s = ( DataRate ) ⋅ ( Oversampling ) = 500 MHz.
As previously explained, if the center frequency tag of this QPSK signal is 5
GHz, the signal will exist for 250 MHz on either side of the 5 GHz carrier (from
4.75 GHz to 5.25 GHz).
For digital communications, the data rate and oversampling values, and the
center frequency tag of each signal are important. You can set these values on
the Simulator tab of the System Simulator Options dialog box (as shown in the
following example) or in the source blocks in the simulation (usually at the
beginning of a simulated chain) and they are subsequently propagated along any
constructed simulation chain. At any point in the system diagram you can use
the System Tools FRQ_PROP measurement to check the propagated
parameters.
Parameter Propagation
An important VSS feature for increasing ease of use is Parameter propagation,
previously briefly introduced when discussing propagation of the sampling
frequency and the center frequency by all VSS blocks to other blocks further
downstream in the simulation chain. This procedure of parameter propagation
is bidirectional, and also occurs from the end to the beginning of a simulation
chain. In VSS, the forward and backward parameter propagation occurs for a
variety of parameters, a small set of which are center frequency, sampling
frequency, and oversampling (there are others too, such as signal and noise
levels, and delay and phase distortion).
G e t t i n g S t a r t e d G u i d e 8-5
SYSTEM SIMULATION IN VSS
8
For example, you can place a QPSK transmitter inside a system diagram,
configure it for the properties of the specific transmission scenario (data rate,
pulse shaping, power, etc.), but then not repeat the corresponding settings in a
receiver block. This is done automatically via parameter propagation by the
simulator at the start-up phase of each simulation. Even more impressively, you
can place an amplifier block and/or a filter somewhere in the simulation chain
between the transmitter and receiver, and then not need to adjust the signal
arriving at the receiver for delay and phase rotation introduced by the filter, or
for gain introduced by the amplifier. All of these parameters are automatically
propagated forward by the simulator, thus allowing the receiver block to adjust
the received signal for them. As a result, even the first time, you can set up and
run a relatively involved BER simulation of a transmitter/receiver chain in just a
few minutes.
The details of parameter propagation for each individual block are explained in
the block Help. For instance, an amplifier doesn’t alter the propagated value of
the center frequency tag at its input, but does alter the propagated signal and
noise levels, according to its gain (and possibly noise figure). A mixer block with
a center frequency f m, c arriving at its input node, and a center frequency f LO, c
arriving at its LO node propagates as a center frequency either the sum
f m, c + f LO, c (if it is in up-conversion mode) or the difference f m, c – f LO, c (if it is
in down-conversion mode). A filter block increases the propagated value of
delay at its output by adding to the propagated delay at its input the amount of
delay it introduces itself to the signal.
AM-MODULATION EXAMPLE
In this example a sinusoidal data signal with a frequency of 2 GHz is modulated
onto a sinusoid carrier of 41 GHz.
AM modulation is described as:
X AM ( t ) = C ⋅ [ A + m ( t ) ] cos ω c ⋅ t
where m(t) is the message data signal; a sinusoidal signal of frequency 2 GHz
given by:
m ( t ) = B cos ω ⋅ t
A represents the DC level of the message signal and B and C represent the
amplitudes of the carrier and the message signal respectively.
Creating a Project
The first step in building and simulating your designs is to create a project. You
use a project to organize and manage related designs, and everything associated
with them, in a tree-like directory structure.
The example you create in this chapter is available in its complete form as
“AM.emp” in your Program Files\AWR\AWR2003\Examples\Getting
Started\VSS\AM directory. You can use this example file as a reference.
To create a project:
1 Start VSS if not already started. To start VSS, click Start on your desktop,
choose Programs > AWR Suite 2003 > AWR Design Environment , or
double-click the corresponding shortcut on your desktop. For information
on installing, setting up shortcuts and starting VSS, see “Installing MWO/
VSS” on page 2-1.
G e t t i n g S t a r t e d G u i d e 8-7
SYSTEM SIMULATION IN VSS
8
G e t t i n g S t a r t e d G u i d e 8-9
SYSTEM SIMULATION IN VSS
8
TIP: Before clicking to position a block, you can rotate the block by right-
clicking on it.
6 Expand the Math Tools category, then click the Adders subgroup. Select
the ADD2 block and place it as shown in the following figure.
7 Expand the Modulation category, then click the Analog subgroup. Select
the AM_MOD block and place it as shown in the following figure.
8 Select the SIN_R block in the system diagram. Choose Edit > Copy then
Edit > Paste. Place the duplicated block as shown in the following figure.
TIP: Choose View > Zoom In to magnify the system diagram.
9 To save the file choose File > Save Project.
G e t t i n g S t a r t e d G u i d e 8-11
SYSTEM SIMULATION IN VSS
8
SIN_R
ID=A4
AMPL=1
PHSOFF=0 Deg
OFFFRQ=1 GHz ADD2 AM_MOD
CTRFRQ=0 GHz ID=A2 ID=A1
PRIMINP=Auto MODIDX=1
1 3 1 3
2
2
SRC_R SIN_R
ID=A3 ID=A5
VAL=1 AMPL=1
SMPFRQ= PHSOFF=0 Deg
OFFFRQ=1 GHz
CTRFRQ=0 GHz
4 From the system block list click the Meters category. Individually select
three Test Points (TP) and place them as shown in the following figure. You
can also click the Add Test Point button on the toolbar. While placing the
test points, right-click to rotate them as needed. The simulation results can
be displayed at these test points.
SIN_ R
ID=A4
AMPL=1 TP
PHSOFF=0 Deg ID=TP2
OFFFRQ=1 GHz ADD2 AM_ MOD
CTRFRQ=0 GHz ID=A2 ID=A1
PRIMINP =Auto MODIDX =1
1 3 1 3 TP
ID=TP1
2
2
SRC_ R SIN_R
ID=A3 ID=A5
VAL=1 AMPL=1 TP
SMPFRQ= PHSOFF=0 Deg ID=TP3
OFFFRQ=1 GHz
CTRFRQ=0 GHz
TIP: You can also connect blocks by moving them to snap their nodes together.
When they are properly connected a small green square displays and the
connection wire extends if you move either block. If you do not see the green
square, try to drag one of the block into place again.
G e t t i n g S t a r t e d G u i d e 8-13
SYSTEM SIMULATION IN VSS
8
Adding a Measurement
To add a measurement to the graph:
1 Right-click the “Amplitude Mod” graph in the Project Browser, and choose
Add Measurement. The Add Measurement dialog box displays. You can
also click the Add Measurement button on the toolbar.
2 For measurement type, select System under Meas. Type and select WVFM
under Measurement .
G e t t i n g S t a r t e d G u i d e 8-15
SYSTEM SIMULATION IN VSS
8
G e t t i n g S t a r t e d G u i d e 8-17
SYSTEM SIMULATION IN VSS
8
.....
This chapter illustrates the signal and noise power relationship in an end-to-end
communication link system. The goal of an end-to-end link analysis is to measure
how often a transmitted bit is received in error (BER). Sometimes it is preferable to
deal with symbols (a bit or group of bits encoded in a signal). In this example you
evaluate the link error rate for a basic QAM transmission. You also analyze how
often bits (BER) or symbols are received in error (SER), and the effect of signal-to-
noise (SNR) on BER and SER.
The procedures in this example include:
• Creating a QAM project and system diagram
• Creating graphs and analyzing BER and SER
• Tuning the system parameters.
8 Click the Add Test Point button on the toolbar and add a Test Point (TP)
between the QAM_TX and AWGN blocks. Add another Test Point (TP) at
the output of the RCVR block as shown in the following figure.
9 Connect the blocks and test points as shown in the following figure.
TP
ID= TP1
QAM_TX
ID= A2
M=16
OUTLVL=0 dB
OLVLTYP=Bit Energy (dB)
RND _D AW GN
SYMRATE=
ID=A1 ID =A3
CTRFRQ=0 GHz
M=2 PW R=0 dB
PLSTYP=R ectangular
RATE= PW RTYP= Au to
ALPHA=0 .35
RNG=Auto LOSS=0 dB RCVR
PLSLN=
ID= A4
1 2
R D
TP
3 ID= TP2
IQ
5 4
10 Double-click the RND_D block in the system diagram and verify that the
M parameter is 2 .
Because M = 2, RND_D is set by default to generate a digital signal that
varies between “0” and “1”. Leave all other secondary parameters at their
default settings.
In this dialog box you can control several parameters as well as the pulse
shaping filter used on the in-phase and quadrature-phase signals.
12 RCVR automatically adjusts its parameters to agree with the transmitter
parameters, so maintain the default settings.
13 Choose Options > Default System Options. The System Simulator Options
dialog box displays. Verify that your settings match those in the following
figure, then click OK .
0.5
-5
-0.5
-10
102056 102061 102066 102071 102076 102081 102086 102091 102096
Time (ns)
-1.5
-2.5
-2.5 -1.5 -0.5 0.5 1.5 2.5
The received constellation does not appear as expected because the power
spectral density of the noise source is set to 0 dB. Note that the time
waveform of the complex baseband signal does not show eight samples per
symbol as specified in the System Simulator Options dialog box.
2 Select the Complexbaseband graph window and click the Properties button
on the toolbar. The Rectangular Plot Properties dialog box displays.
3 Click the Traces tab.
4 Using the drop-down symbol and line selectors, specify a triangle as the
symbol and a solid line as the line style, as shown in the following figure.
(The lines will display on the Complexbaseband waveform).
Auto Interval
Interval
Line selector
Symbol selector
5 Under Symbol , clear the Auto interval check box, change the Interval value
to 1 and click OK .
6 On the system diagram, double-click the AWGN block and change the
PWR parameter to “-30 ” dB, then click OK .
7 Start the simulation, let it run for about 10 seconds, and then stop the
simulation.
Notice how the scatter plot changes. The simulation responses in the
following graphs should display. On the Complexbaseband graph the
triangular symbols display on the waveform. There are now eight samples
per symbol. You can choose Options > Default System Options to return
to the System Simulator Options dialog box and change the values under
Sampling Frequencies/Data Rates to observe the different results.
Complexbaseband
10 Receiver Constellation
1
Re(WVFM(TP.TP1,10,1,1)) IQ(TP.TP2,50,1,0)
QAM QAM
5
0.5
0
-5
-10 -0.5
276456 276461 276466 276471 276476 276481 276486 276491 276496
Time (ns)
-1
-1 -0.5 0 0.5 1
Note that your graphs may not look identical to these examples due to printed
size limitations.
TIP: Click the Properties button on the toolbar to edit the appearance of any graph,
or right-click in the graph to zoom in and zoom out.
8 Choose File > Save Project to save your project.
Max value
Min value
6 To observe the impact of the noise level, set the Max and Min values to “0 ”
and “-50 ” respectively. Click the tuning bar and slide it to adjust the values
while observing the results on the constellation graph.
7 Click the “x” at the upper right of the Variable Tuner dialog box to close it.
8 Stop the simulation by clicking the Run/Stop System Simulators button on
the toolbar.
9 To de-tune the PWR parameter of the AWGN block, click the Tune Tool
button on the toolbar and then click the PWR parameter value again. The
parameter value displays in black. To disengage the Tune Tool, click
anywhere in the design area.
10 Double-click the PWR parameter and change the value to 0.
The BER block is now set to test 1e7 (MXTRL * TBLKSZ) bits. It registers 25
errors before a BER computation is generated for each value of Eb_NO. The
BER block internally generates the original data source and compares the
received bits to the transmitted bits. The last point on the BER curve (the 8th
value of Eb_NO) takes the longest to plot.
9 To add a BER plot to the project, add a rectangular graph named “BER ”.
10 In the Project Browser, right-click “BER” and choose Add Measurement.
11 Create a BER measurement using the settings in the following figure, then
click Apply to save the measurement.
12 To verify the obtained results with the theoretical results, add another
measurement to the BER graph using the settings in the following figure,
then click OK .
13 Verify that the PWR parameter value of the AWGN block is 0dB.
14 Select the BER graph window, then click the Properties button on the
toolbar.
15 Click the Axes tab and set Left1 to Log scale by selecting Left1 under
Choose Axis and selecting the Log Scale check box, then click OK .
16 Click the Run/Stop System Simulators button on the toolbar to start the
simulation. As the simulation runs, the BER curve is generated. Note that
the size of the received constellation becomes clearer as the power is
increased or, as Eb_NO is swept from -6 dB to 6 dB.
The simulation stops when 25 errors are counted at Eb_NO = 6dB. The
simulation response in the following graph should display..
BER
1
BER(BER.BER1,0,0)
QAM
QAM_BERREF(BER.BER1,0,0)
QAM
.1
.01
-6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6
In this example the signal power was swept to plot the BER. You can sweep
the noise power, keeping the signal power constant. Change the PWR
parameter of the AWGN block to -Eb_NO and the OUTLVL parameter of
the QAM_TX block to 0 to get the same BER curve achieved here.
17 Choose File > Save Project .
18 Similar to the BER version, you can create a SER vs Eb/N0 graph. In the
Project Browser, click “QAM” under System Diagrams. Drag and drop the
QAM icon onto the System Diagrams node. A “Copy of QAM” system
diagram is created under System Diagrams.
19 Click the “Copy of QAM” window to make it active, then delete the BER
block.
20 In the Element Browser, expand the Meters category, then click the BER
subgroup. Select the SER block, drag it to the “Copy of QAM” system
diagram, and connect it to the “D” node of the RCVR block.
21 Add a rectangular graph named “SER ” to the project.
22 Add a measurement to the “SER” graph using the settings in the following
figure.
23 Add another measurement to the “SER” graph using the settings in the
following figure.
24 Select the “SER” graph window, then click the Properties button on the
toolbar.
25 Click the Axes tab and set Left1 to Log scale by selecting Left1 under
Choose Axis and selecting the Log Scale check box, then click OK .
26 Click the Run/Stop System Simulators button on the toolbar to start the
simulation. As the simulation runs, the SER curve is generated. The
simulation response in the following graph should display.
SER
1
BER(SER.SER1,0,0)
.1
Copy of QAM
QAM_BERREF(SER.SER1,0,0)
Copy of QAM
.01
-6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6
You can also plot BER and SER against Es/N0 by specifying Es/N0 as the
SWPTYP parameter in BER and SER blocks.
2 To change the numerical precision of the table, select the “Copy of BER”,
graph window and click the Properties button on the toolbar. Make any
desired changes in the Tabular Graph Format dialog box, then click OK .
3 Choose File > Save Project .
.....
The circuit simulation capabilities of Microwave Office (MWO) and Visual
System Simulator (VSS) provide a unique environment in which to measure the
impact of RF components on system performance. Measurements you can
make include, for example, the impact of phase noise on BER, spectral
regrowth due to the non-linearities of an amplifier, and the impact of filter
characteristics on BER.
This exercise presents features of the VSS environment and demonstrates its
integration with the MWO circuit simulation environment. You add an actual
MWO filter circuit to the QAM system that you built in the previous example,
and then you measure the impact of the filter on BER performance as you
change filter parameters.
The procedures in this example include:
• Importing an MWO ideal filter circuit to the system project
• Approximating the filter response before including it in the simulation
• Changing filter parameters and monitoring the impact on BER
performance
• Creating a power spectral density plot.
G e t t i n g S t a r t e d G u i d e 10-1
ADDING AN MWO SUBCIRCUIT TO A SYSTEM
10
Adding an MWO Filter Circuit to the System
C0=0.8478
C1=1.445
C2=0.1876
C3=2.836
C4=0.1343
C5=3.144
C6=0.1489
C7=2.251
C8=0.2921
C9=0.4979
L0=1.245
L1=0.7304
L2=5.627
L3=0.3721
L4=7.86
L5=0.3357
L6=7.09
L7=0.4689
L8=3.613
L9=2.12
G e t t i n g S t a r t e d G u i d e 10-3
ADDING AN MWO SUBCIRCUIT TO A SYSTEM
10
Adding an MWO Filter Circuit to the System
VN A_SS VN A_SS
ID=M1 ID=M2
FSTAR T=0 GHz FSTAR T=0 GHz
FSTOP=10 GHz FSTOP=10 GHz
BPFB
ID =F1
N=10
FP1=4 GHz LIN_S
FP2=6 GHz ID=S1
AP=3.01 dB N ET="Ideal fi lter"
9 In the BPFB block, set the N parameter to “10 ”, the FP1 parameter to “4 ”
GHz, and the FP2 parameter to “6 ” GHz.
10 In both of the VNA_SS blocks set the FSTOP parameter to “10 ” GHz.
11 In the LIN_S block set the parameters as shown in the following figure.
14 Run the System Simulator. The simulation response in the following graph
should display after making some axes changes: Double-click the legend in
the graph. In the Rectangular Plot Properties dialog box, click the
Measurements tab. Under Select measurement to edit: select Filter
Test:DB(Ang(S21_SS(VNA_SS.M1))) and under Choose axis: select Right
1 . Click Apply, then OK .
Filter Response 1
0 10000
-200 -5000
-400 -20000
DB(|S21_SS(VNA_SS.M1)|) (L)
Filter Test
-800 -50000
0 1 2 3 4 5 6 7 8 9 10
Frequency (GHz)
G e t t i n g S t a r t e d G u i d e 10-5
ADDING AN MWO SUBCIRCUIT TO A SYSTEM
10
Adding an MWO Filter Circuit to the System
15 Add another rectangular graph named “Ideal Filter Response ” and add the
following measurement to the graph.
16 Add another measurement to the same graph using the settings in the
following figure, then click OK .
17 Run both the Harmonic Balance simulator and System simulator. The
simulation response in the following graph should display.
-100
-200
DB(|S(2,1)|)
Ideal filter
-300 DB(|S21_SS(VNA_SS.M2)|)
Filter Test
-400
0 1 2 3 4 5 6 7 8 9 10
Frequency (GHz)
18 In the “Filter Test” diagram, change the LIN_S block NTAP parameter to
1024 and run the simulation. Notice the change in the graph. The response
from LIN_S follows the actual graph of the given filter.
G e t t i n g S t a r t e d G u i d e 10-7
ADDING AN MWO SUBCIRCUIT TO A SYSTEM
10
Adding an MWO Filter Circuit to the System
4 Add a test point at the output of the LIN_S block as shown in the following
figure.
TP
QAM_TX
ID=TP3 BER
ID=A2
ID=BER1
M=16 TP
SWPVAR=
OUTLVL=Eb_N0 dB ID=TP1
SWPTYP=Auto
OLVLTYP=Bit Energy (dB)
RND_D AWGN OUTFL=""
SYMRATE=
ID=A1 ID=A3 MNERR=25
CTRFRQ=5 GHz
M=2 PWR=0 dB
PLSTYP=Rectangular LIN_S
RATE=1/_TFRAME PWRTYP=Auto
ALPHA=0.35 ID=S1
RNG=Auto LOSS=0 dB RCVR
PLSLN= NET="Ideal filter" BER
ID=A4
1 2
R D
TP
3 ID=TP2
IQ
5 4
Specifying “TP.TP3 ” for Test Point places the measurement after the
LIN_S block.
3 Add another PWR_SPEC measurement with the same settings, but choose
TP.TP1(the test point prior to the AWGN block) for Test Point , then click
OK .
4 Run the simulation. Note that the BER performance has degraded. The
simulation response in the following graph should display.
G e t t i n g S t a r t e d G u i d e 10-9
ADDING AN MWO SUBCIRCUIT TO A SYSTEM
10
Adding an MWO Filter Circuit to the System
Power Spectrum
30
DB(PWR_SPEC(TP.TP3,256,1,10,1,-1,0,-1,1,1,0)) (dBm)
QAM
DB(PWR_SPEC(TP.TP1,256,1,10,1,-1,0,-1,1,1,0)) (dBm)
QAM
-30
4 4.2 4.4 4.6 4.8 5 5.2 5.4 5.6 5.8 6
Frequency (GHz)
10-10 M W O / V S S 2 0 0 3
USING AN MWO NONLINEAR ELEMENT IN VSS
............................
11
.....
This chapter demonstrates how to use the Microwave Office (MWO) Harmonic
Balance nonlinear simulator with a Visual System Simulator (VSS) simulation. In
this example you simulate an amplifier model and then measure the impact of
the amplifier on the overall system. You observe the resulting power spectrum,
the constellation graph, eye diagram, and the group delay. You also overlay a
gain plot of the filter response with power spectral density of the transmitted
signal, and analyze the simulation results.
The procedures in this example include:
• Importing an MWO amplifier model into a system project
• Compensating for phase shift
• Working with the VSS Vector Signal Analyzer block
• Creating plots for eye diagrams, filter response, and group delay
G e t t i n g S t a r t e d G u i d e 11-1
USING AN MWO NONLINEAR ELEMENT IN VSS
11
Importing an Amplifier Model into VSS
3 Verify that the NL_AMP parameters are set to the following values, then
click OK .
4 In the QAM system diagram, separate the QAM_TX block and the TP1
test point and disconnect the wire between them.
5 In the System Blocks list, expand the RF Blocks category, then click the
Simulation Based subgroup. Select the NL_S block and place it between
the QAM_TX and AWGN blocks as shown in the following figure.
6 Connect the NL_S block to the QAM_TX and AWGN blocks.
7 Double-click the NL_S block and set its NET parameter to “amplifier ” to
reference the amplifier schematic (include the quotes), then click OK .
QAM_TX TP
ID=A2 ID=TP3 BER
M=16 TP ID=BER1
OUTLVL=Eb_N0 dB ID=TP1 SWPVAR=
OLVLTYP=Bit Ener gy (dB) SWPTYP=Auto
RND_D SYMRATE= AWGN OUTFL=""
ID=A1 CTRFRQ=5 GHz NL_S ID=A3 MNERR=25
M=2 PLSTYP=Rectangular ID=S2 PWR=0 dB LIN_S
RATE=1/_TFRAME ALPHA=0.35 NET="amplifier" PWRTYP=Auto ID=S1
RNG=Auto PLSLN= NOISE=Off LOSS=0 dB NET="Ideal filter" RCVR BER
ID=A4
1 R D 2
TP
3 ID=TP2
IQ
5 4
G e t t i n g S t a r t e d G u i d e 11-3
USING AN MWO NONLINEAR ELEMENT IN VSS
11
Importing an Amplifier Model into VSS
TP
QAM_TX
ID=TP3 BER
ID=A2
ID=BER1
M=16 TP
SWPVAR=
OUTLVL=Eb_N0 dB ID=TP1
SWPTYP=Auto
OLVLTYP=Bit Energy (dB)
RND_D AWGN OUTFL=""
SYMRATE=
ID=A1 ID=A3 MNERR=25
CTRFRQ=5 GHz NL_S
M=2 PWR=0 dB
PLSTYP=Rectangular ID=S2 PHASE LIN_S
RATE=1/_TFRAME PWRTYP=Auto
ALPHA=0.35 NET="amplifier" ID=A5 ID=S1
RNG=Auto LOSS=0 dB RCVR
PLSLN= NOISE=Off SHFT=180 Deg NET="Ideal filter" BER
ID=A4
1 2
R D
TP
3 ID=TP2
IQ
5 4
TP
QAM_TX
ID=TP3
ID=A2
M=16 TP
OUTLVL=Eb_N0 dB ID= TP1
OLVLTYP=Bit Energy (dB)
R ND_D AWGN
SYMR ATE=
ID =A1 ID =A3
CTRFRQ=5 GHz NL_S
M= 2 PWR =0 dB
PLSTYP= Rect angular ID= S2 PHASE LIN_S
R ATE=1/_TFRAME PWR TYP= Auto
ALPHA=0.35 NET="amplifier" ID=A5 ID=S1
R NG= Auto LOSS= 0 dB RC
PLSLN= NOISE=Of f SHFT=180 Deg NET="Ideal f ilter"
ID=
1
R
VSA
ID =M1
SRC MEAS
QAM_ TX TP
ID=TP3
ID =A2
M=16 TP
OUTL VL=Eb _N0 dB ID =TP1
OLVL TYP=Bi t E ne rgy ( dB)
R N D_ D A WGN
ID =A1 SYMR ATE= ID =A3
CTR FRQ=5 GH z N L_ S
M =2 PLS TYP=Re cta ng ul ar ID =S 2 PH ASE P WR =0 dB L IN_ S
R ATE=1 /_TFR AME ALP HA =0 .35 N ET="a mpl ifi er" ID =A5 P WR TYP=Au to ID =S1
R N G=A uto LOSS=0 dB
PLS LN = N OISE=Off SH FT=1 80 Deg N ET="Id ea l fil ter"
1 R
G e t t i n g S t a r t e d G u i d e 11-5
USING AN MWO NONLINEAR ELEMENT IN VSS
11
Importing an Amplifier Model into VSS
6 Add another measurement to the graph using the following settings, then
click OK.
Deselect this
G e t t i n g S t a r t e d G u i d e 11-7
USING AN MWO NONLINEAR ELEMENT IN VSS
11
Importing an Amplifier Model into VSS
AMtoAM(PORT_2)[1,X] (dBm)
amplifier
DB(AMtoAM_PS(VSA.M1,1,0,0,0,1,0,0,0,0,1000,0,10,0)) (dBm)
QAM
AMtoAM
50
40
30
20
10
0
0 5 10 15 20 25 30 35 40 45 50
Power (dBm)
For information on the LIN_S, NL_S and VSA blocks, see the Visual System
Simulator System Block Catalog.
Note that these examples use ideal behavioral models for the filter and
amplifier. You can also use actual circuit models for the filter and amplifier.
4 Select the “Ideal Filter Response” graph window and click the Properties
button on the toolbar.
G e t t i n g S t a r t e d G u i d e 11-9
USING AN MWO NONLINEAR ELEMENT IN VSS
11
Importing an Amplifier Model into VSS
5 Click the Measurements tab and under Select Measurement to edit , select
Ideal Filter: GD(2,1) ,
then under Choose axis, select Right 1 and then click
OK .
6 Click the Analyze and Run/Stop System Simulators buttons on the toolbar.
The simulation response in the following graph should display.
-200 0
G e t t i n g S t a r t e d G u i d e 11-11
USING AN MWO NONLINEAR ELEMENT IN VSS
11
Importing an Amplifier Model into VSS
Re(EYE(TP.TP4,10,1,80,0))
Eye Diagram at Amp Output Re(EYE(TP.TP1,10,1,80,0))
Eye Diagram at Transmitter
30 QAM 40 QAM
20
20
10
0 0
-10
-20
-20
-30 -40
0 2 4 6 8 0 2 4 6 8
Time (ns) Time (ns)
.....
This chapter includes additional useful examples such as FSK, Phase Noise and
I/Q Imbalance, End-to-End QAM system, and mixer modeling. It also includes
steps for displaying measurements such as IRR, ACPR, EVM, and others.
FSK EXAMPLE
In this example you build and simulate a complete transmitter-channel-receiver
chain for a Binary Frequency Shift Keying (BFSK) transmission. The example
shows how to generate a frequency shift keying (FSK) source using elementary
blocks or a “black box” FSK modulator (called FSK_SRC) in VSS. It is not
always necessary to construct a receiver and transmitter using elementary
blocks. For many common modulation methods, corresponding black boxes
already exist in VSS. This exercise, however, is intended to show that using the
black box or creating one using the elementary blocks produces identical results.
You will also construct an FSK demodulator using basic blocks, and verify the
performance of the system by setting different parameters. For more
information and application notes on FSK modulation please visit our website
at http://www.mwoffice.com/.
The procedures in this example include:
• Verifying the BFSK waveform generated using different methods
• Channel and noise scaling and system performance
• Monitoring the BER and sweep statistics in a text window.
G e t t i n g S t a r t e d G u i d e 12-1
VSS EXAMPLES
12
F S K _ S RC
ID = A 8
M O D = 2 -F S K
O U T LV L = 0 d B
O LV L T YP = B it E n e rg y ( dB )
R A TE = 1 0 0 0
C TR FR Q =1 G H z
M O D ID X = 0.7 0 7
P L S T YP = R e cta n g u la r TP
A L P H A = 0 .35 ID = TP 1
L=
PLSLN =
8 Run the simulation. The power spectrum of the FSK signal generated by
the block displays as shown in the following graph.
G e t t i n g S t a r t e d G u i d e 12-3
VSS EXAMPLES
12
DB(PWR_SPEC(TP.TP1,512,1,10,1,-1,0,-1,0,1,0)) (dBm)
BFSK
Spectrum
20
-20
-40
-60
0.999996 0.999998 1 1.000002 1.000004
Frequency (GHz)
FS K_ SR C
I D =A 8
M O D= 2 - F S K
O U T LV L= 0 d B
O LV LT Y P = B it E ne r gy (d B )
R A T E = 1 00 0
CTRFRQ =1 G Hz
M O DI D X = 0 .7 07
P LS T Y P = R ec t an g ula r TP
A LP H A = 0 .3 5 ID = T P 1
L=
P LS LN =
RN D _ D TP
ID = A 1 I D =T P 2
M= 2 D AC F M_ M O D
RA T E =1 0 00 ID = A 2 I D = A3
K F = 0. 70 7 /2* 10 00
D A 1 3
S IN _ C
I D = A4
A M PL = 5
P H S O F F = 0 D eg
O FFFRQ=0 G Hz
CTRFRQ =1 GHz
G e t t i n g S t a r t e d G u i d e 12-5
VSS EXAMPLES
12
13 Add a random data waveform measurement to the graph using the settings
in the following figure, then click Apply.
14 Add a measurement to the graph for the phase produced by the FSK
modulator using the settings in step 13, but select TP.TP2 as the Test Point
and Angle as the Complex Modifier, then click OK .
15 Select the “TX Waveforms” graph and click the Properties button on the
toolbar.
16 Click the Axes tab and select Left 1. Clear the Auto limits check box and
enter “-1 ” as the Min and “2 ” as the Max . Under Divisions, clear the Auto
divs. check box and enter “1 ” as the Step.
17 Select Right 1 . Clear the Auto limits check box and enter “-200 ” as the Min
and “200 ” as the Max , then click Apply.
18 Click the Measurements tab and under Select Measurement to edit , select
BFSK:Ang(WVFM(TP.TP2,20,4,1)] , then under Choose axis, select Right 1
and click Apply.
19 Click the Traces tab and under Style, select measurement 1, then under
Weight select a heavier line from the corresponding drop-down box at the
bottom of the dialog box. Select measurement 2, then select a square as the
Symbol style from the corresponding drop-down box at the bottom of the
dialog box.
20 Run the simulation. Observe that the transmitted phase behaves exactly as
expected in a binary FSK transmission scheme with rectangular frequency
shaping pulse.
Your simulation response should look similar to the following graph, which
shows that the phase of the modulated waveform increases in a ramp when
the input bit is “1”, and decreases in a ramp with the same slope when the
input bit is “0”. The phase remains continuous between different bit
intervals, and the phase jumps in the plot are only the effect of the wrap-
around when the phase exceeds ± π . The data waveform (binary 1’s and 0’s)
is plotted on the left axis while the phase waveform is shown on the right
axis.
Re(WVFM(TP.TP3,20,4,1)) (L)
BFSK
TX Waveforms
2 Ang(WVFM(TP.TP2,20,4,1)) (R, Deg) 200
BFSK
1 66.7
0 -66.7
-1 -200
12679000000 12684000000 12689000000 12694000000 12699000000
Time (ns)
G e t t i n g S t a r t e d G u i d e 12-7
VSS EXAMPLES
12
To complete the channel-receiver chain for BFSK (using the following figure as
a reference):
1 In the Element Browser, click the Channels category. Select the AWGN
block and place it on the system diagram.
2 Click the Filters category, then select the PLSSHP block and place it on the
system diagram.
3 Expand the Modulation category, then click the Analog subgroup. Select
the FM_DSCRM block and place it on the system diagram.
4 Click the Signal Processing category, then select the INTG_DMP block
and place it on the system diagram.
5 Expand the Converters category, then click the Analog-Digital subgroup.
Select the ADC block and place it on the system diagram.
6 Add a 4th, 5th and 6th test point at the outputs of the FM_DSCRM,
INTG_DMP and ADC blocks respectively.
7 Click the Signal Processing category, then select the DLY_SMP block and
place it on the system diagram.
8 Expand the Meters category, then click the BER subgroup. Select the
BER_EXT block and place it on the system diagram.
TP TP TP
FSK_SRC ID=TP4 ID=TP5 ID=TP6
ID=A8
MOD=2-FSK
OUTLVL=0 dB
OLVLTYP=Bit Energy (dB)
RATE=1000 AWGN PLSSHP
CTRFRQ=1 GHz ID=A5 ID=F1
MODIDX=0.707 PWR=0 dB PLSTYP=Root Raised Cosine INTG_DMP
PLSTYP=Rectangular TP PWRTYP=Auto ALPHA=0.35 FM_DSCRM ID=A7 ADC
ALPHA=0.35 ID=TP1 LOSS=0 dB PLSLN= ID=A6 N=8 ID=A9
L= NRMTYP=Unit Pulse Power GAIN=1 INTGTYP=Sum*Time Step M=2
PLSLN=
A D
dt
BER_EXT
ID=BER1
SWPVAR=
TP DLY_SMP SWPTYP=Auto
ID=TP3 ID=A10 OUTFL=""
DLY=1
IVAL=0
BER
RND_D TP
ID=A1 ID=TP2
M=2 FM_MOD
DAC ID=A3
RATE=1000 ID=A2 KF=0.707/2*1000
D A 1 3
2
SIN_C
ID=A4
AMPL=5
PHSOFF=0 Deg
OFFFRQ=0 GHz
CTRFRQ=1 GHz
G e t t i n g S t a r t e d G u i d e 12-9
VSS EXAMPLES
12
RX Waveform
2 10000
1.5 8125
ADC output
1 6250
0.5 4375
Sampled output of
INTG_DMP every 1 msec 0 2500
-0.5 625
FM_DSCRM output
-1 -1250
Re(WVFM(TP.TP4,10,1,1)) (R)
-1.5 BFSK -3125
Re(WVFM(TP.TP5,10,1,1)) (L)
-2 BFSK -5000
542000000 544000000 Re(WVFM(TP.TP6,10,1,1))
546000000 548000000
(L) 550000000 552000000
BFSK Time (ns)
G e t t i n g S t a r t e d G u i d e 12-11
VSS EXAMPLES
12
BER
1
.1
BER(BER_EXT.BER1,0,0)
.01
BFSK
FSK_BERREF(BER_EXT.BER1,0,1,1)
BFSK
.001 FSK_BERREF(BER_EXT.BER1,0,0,1)
BFSK
FSK_BERREF(BER_EXT.BER1,0,2,1)
BFSK
.0001
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9
G e t t i n g S t a r t e d G u i d e 12-13
VSS EXAMPLES
12
4 Click the Frequencies tab. Set the frequency Start to “0 ” MHz, the Stop to
“200 ” MHz, and specify the Step as “2 ” MHz, then click Apply and OK .
5 In the Element Browser System Blocks list, expand the Converters
category, then click the Mag/Phase subgroup. Select the C2MP block
(separates complex to magnitude and phase) and place it on the system
diagram.
6 Select the MP2C block (combines magnitude and phase to form complex)
and place/connect it on the system diagram as shown in the following
figure.
7 Expand the Math Tools category, then click the Adders subgroup. Select
the ADD2 block and place/connect it on the system diagram as shown in
the following figure.
8 Expand the Sources category, then click the Noise subgroup. Select the
COLORNS block and place/connect it on the system diagram as shown in
the following figure.
9 Click the Ports category, then place/connect the PORTDIN input data
port and the PORTOUT output data port on the system diagram as shown
in the following figure.
1 2 1 3
3 2
ADD2
COLORNS ID=A3
ID=A2 PRIMINP=Auto
FC=
PWR=0 dBW 1 3
10 Right-click Data Files in the Project Browser and choose Import Data File.
Select Text Data Files as Files of type, then browse to and select the
“Phmask.txt” file located in the Program Files\ AWR\AWR2003\Examples\
Getting Started\VSS\PHNoise directory. This data file contains noise power
information for various frequencies.
11 Set the COLORNS block FC parameter to “Phmask ” (including quotes),
the PWR parameter to “-5 ”, the NFLT parameter to “1024 ”, and the
RSEED parameter to “{0} ”.
12 In the Project Browser, right-click the “Phase Noise Generator” system
diagram and choose Export System Diagram . Name the exported file
“Phase Noise Generator ” and save it to the Program Files\AWR\
AWR2003\Examples\Getting Started\VSS\PHNoise directory. This process
saves the system diagram for future import with a “.sys” extension.
G e t t i n g S t a r t e d G u i d e 12-15
VSS EXAMPLES
12
TP
ID=TP1
DECIM
ID=A4
RATIO=8
PHS=0
QAM_SRC DLY=4 TP TP
ID=A2 ID=TP3
MOD=16-QAM (Gray) MIXER_B ID=TP2
OUTLVL=0 dB FCOUT=
OLVLTYP=Avg. Power (dBW) GCONV=-6 dB
RATE=_DRATE P1DB=130 dBW DECIM
CTRFRQ=0 MHz IP3=140 dBW ID=A3
PLSTYP=Raised Cosine PLOUSE=Spur reference only RATIO=8
ALPHA=0.35 PIN=30 dBW PHS=0
PLSLN= DLY=4
IN OUT
LO
TP
ID=TP4
SUBCKT
SIN_C ID=S1
CTRFRQ=5200 MHz NET="Phase Noise Generator"
1 2
10 Set the MIXER_B block parameters to the values shown in the following
figure, then click OK .
G e t t i n g S t a r t e d G u i d e 12-17
VSS EXAMPLES
12
5 Repeat the previous step and select TP.TP3 as the Test Point (to display the
power spectrum at the output of the mixer), then click OK .
6 Run the simulation. The simulation response in the following graph should
display.
The result is as expected--phase noise results in a rotational pattern more
predominant at a higher amplitude, as seen in the outer corners of the
constellation. This is typically due to the up- or downconverter. Gain
compression is demonstrated by the outer corners of the constellation
being compressed toward the middle of the display. Gain compression is
caused by an active device, which in this case is the upconverter.
G e t t i n g S t a r t e d G u i d e 12-19
VSS EXAMPLES
12
QAM Constellation
15
-5
IQ(TP.TP1,1000,1,0)
QAM System
-15
IQ(TP.TP2,1000,1,0)
-15 -5 5
QAM System 15
DB(PWR_SPEC(TP.TP3,1000,1,10,1,-1,0,-1,1,1,0)) (dBW)
QAM System
DB(PWR_SPEC(TP.TP4,1000,0,10,1,-1,0,-1,1,1,0)) (dBW)
QAM System Graph 2
0
Output signal
Spectrum
-100
-150
1200 2200 3200 4200 5200 6200 7200 8200 9200
Frequency (MHz)
DECIM
ID=A4
RATIO=8 TP MIXER_B
PHS=0 ID=TP1 ID=A2
DLY=4 MODE=Up converter
FCOUT=
QAM_SRC GCONV=-6 dB
ID=A6 P1DB=130 dBW
MOD=16-QAM (Gray) IP3=140 dBW
OUTLVL=0 dB LO2OUT=
OLVLTYP=Avg. Power (dBW) SUBCKT IN2OUT=
RATE=_DRATE ID=S2 PLO=-20 dBW DECIM
CTRFRQ=0 MHz NET="Input Imbalance1" PLOUSE=Spur reference only TP ID=A5 TP
PLSTYP=Raised Cosine DCoffset=0.02 PIN=30 dBW ID=TP3 RATIO=8 ID=TP2
ALPHA=0.35 AMPIMBAL=0.6 NF=6 dB PHS=0
PLSLN= PHAIMBAL=6 NOISE=Off DLY=4
IN OUT
1 2
LO
TP
ID=TP4
SIN_C
ID=A3
AMPL=1 SUBCKT
PHSOFF=0 Deg ID=S1
OFFFRQ=0 MHz NET="Phaise Noise Generator"
CTRFRQ=5200 MHz
1 2
G e t t i n g S t a r t e d G u i d e 12-21
VSS EXAMPLES
12
3 Run the simulation. The simulation response in the following graph should
display.
The constellation at the output is slightly skewed. You can alter the
AMPIMBAL and PHAIMBAL parameters and analyze the effect on the
constellation even further. The system thus simulated has a dirty input
signal (causing imbalance) and a clean LO. You can also build the system
with a clean input signal and a dirty LO (causing imbalance). To do so you
need to remove the INP_IMBAL block and add the LO_IMBAL block
between the SIN_C block and the “LO” terminal of the MIXER_B block.
This also causes the output constellation to skew in a similar pattern.
IQ(TP.TP1,100,1,0) IQ(TP.TP2,1000,1,0)
QAM System Graph 1QAM System
15
Constellation with no
Imbalance
-5
Constellation due to
I/Q Imbalance
-15
-15 -5 5 15
DECIM
ID=A4
RATIO=8 TP MIXER_B
PHS=0 ID=TP1 ID=A2
DLY=4 MODE=Up converter
FCOUT=
GCONV=-6 dB
P1DB=130 dBW
IP3=140 dBW
LO2OUT=
SIN_C SUBCKT IN2OUT=
ID=A6 ID=S2 PLO=-20 dBW DECIM
AMPL=1 NET="Input Imbalance1" PLOUSE=Spur reference only TP ID=A5 TP
PHSOFF=0 Deg DCoffset=0.02 PIN=30 dBW ID=TP3 RATIO=8 ID=TP2
OFFFRQ=100 MHz AMPIMBAL=0.6 NF=6 dB PHS=0
CTRFRQ=5200 MHz PHAIMBAL=6 NOISE=Off DLY=4
IN OUT
1 2
LO
TP
ID=TP4
SIN_C
ID=A3
AMPL=1 SUBCKT
PHSOFF=0 Deg ID=S1
OFFFRQ=0 MHz NET="Phaise Noise Generator"
CTRFRQ=5200 MHz
1 2
G e t t i n g S t a r t e d G u i d e 12-23
VSS EXAMPLES
12
8 Run the simulation. The simulation response in the following graph should
display. Measure the difference between the power spectrums of two IF
frequencies, it is almost 24 dBW.
DB(PWR_SPEC(TP.TP3,10000,1,1,1,0.5,0,-1,1,3,0)) (dBW)
QAM System
IRR
0
10300 MHz 10500 MHz
-49.96 dBW -26.01 dBW
-100
-200
-300
-400
6400 7400 8400 9400 10400 11400 12400 13400 14400
Frequency (MHz)
G e t t i n g S t a r t e d G u i d e 12-25
VSS EXAMPLES
12
4 Click the Frequencies tab. Set the frequency Start to “27.96 ” GHz, the
Stop to “28.04 ” GHz, and specify the Step as “0.0016 ” GHz, then click
Apply and OK .
5 Choose Options > Default System Options and click the Simulator tab.
Select Data rate (_DRATE) and set its value to “4.6698E-3 ” GHz, then select
Oversampling (_SMPSYM) and set its value to “20 ” samples/symbol. Select
Stop after and set it to “2e5 ” ns.
6 Right-click Data Files in the Project Browser and choose Import Data File.
Browse to and select the “Phmask.txt” file located in the Program
Files\AWR\AWR2003\Examples\Getting Started\VSS\64QAM directory.
7 Import the “Phase Noise Generator.sys” system diagram file generated and
exported in the previous section. This file is located in the Program
Files\AWR\AWR2003\Examples\Getting Started\VSS\PhNoise directory.
8 Right-click Circuit Schematics and import the “RX Filter.sch” file located
in the Program Files\AWR\AWR2003\Examples\Getting Started\VSS\
64QAM directory.
9 Expand the Modulation category, then click the QAM subgroup. Select the
QAM_SRC block and place it on the system diagram as shown in the
following figure. Set the MOD parameter to “64-QAM (Gray) ” and the
OUTLVL parameter to “-30 ”.
10 Expand the RF Blocks category, then click the Behavioral subgroup. Select
the MIXER_B block and place/connect it on the system diagram as shown
in the following figure.
11 To create oscillator phase noise, expand the Sources category, then click
the Waveforms subgroup. Select the SIN_C (complex sinusoidal) block and
place it on the system diagram as shown in the following figure. Set the
CTRFRQ parameter to “28 ” GHz.
12 Click the Subcircuits category, then select the “Phase Noise Generator”
subcircuit and connect it to the LO node of the mixer as shown in the
following figure.
13 Expand the RF Blocks category, then click the Behavioral subgroup. Select
the NL_AMP2 block and place/connect it on the system diagram as shown
in the following figure. Set the GAIN parameter to “29 ”, the P1DB
parameter to “28 ”, the IP3 parameter to “35 ”, and the IP2H parameter to
“35 ”. Click Show Secondary and set the S21MAG parameter to “3.162 ”.
14 Click the Signal Processing category, then select the PHASE block and
place/connect it on the system diagram as shown in the following figure.
15 Click the Channels category, then select the AWGN block and place/
connect it on the system diagram as shown in the following figure. Set the
PWR parameter to “-100 ” and the RSEED parameter to “{0} ”.
16 Click the Signal Processing category, then select the ATTEN block and
place/connect it on the system diagram as shown in the following figure.
Set the LOSS parameter to “-22 ”.
17 Expand the RF Blocks category, then click the Simulation Based subgroup.
Select the LIN_S block and place/connect it on the system diagram as
shown in the following figure. Set the NET parameter to “RX Filter ”.
18 Add another NL_AMP2 block, PHASE block, and MIXER_B block and
connect the LO nodes of the two mixers together as shown in the following
figure.
19 Set the copy of the NL_AMP2 block GAIN parameter to “10 ”, the P1DB
parameter to “20 ”, the IP3 parameter to “40 ”, and the IP2H parameter to
“40 ”. Click Show Secondary and set the S21MAG parameter to “3.162 ”.
20 Expand the Modulation category, then click the General Receivers
subgroup. Select and place/connect two RCVR blocks on the system
diagram as shown in the following figure.
21 Expand the Meters category, then click the Network Analyzer subgroup.
Select and place/connect two VSA blocks on the system diagram as shown
in the following figure. Set the NFFT parameters of both blocks to “1024 ”.
22 Add six test points in the same order as shown on the system diagram in
the following figure.
G e t t i n g S t a r t e d G u i d e 12-27
VSS EXAMPLES
12
RC V R
ID= A5
VS A
1 2
R D ID =M2
3
IQ
5 4 SRC MEAS
TP
ID =T P2
TP
TP
TP ID =TP 4
V SA ID= TP 5
ID =TP 3
ID =M1
TP
ID =T P6
SRC MEAS MI XE R _B
ID =A 12
MOD E =U p conve rter
M IXE R _B
ID = A7 F COU T =
M ODE =U p con verter GC ON V= -6 dB
P 1D B= 130 dB m
F C OUT =
QAM _SR C IP 3=14 0 dB m
GC ON V =-6 d B
ID =A 1 LO2 OUT =
P 1D B =130 dB m
MOD =64- QAM (Gra y) IN 2OU T=
IP 3=1 40 dB m N L_A MP 2 NL_ AMP 2
OU TLV L=- 30 dB P LO=- 20 dB m
L O2OU T= ID = A3 ID= A4
OLV LTY P= Avg. P ow er (dB W) P LOU SE =S pur refer ence only
IN 2OU T = GA IN =29 dB GAIN =10 dB
R AT E=_ DR A TE A W GN P IN =30 d Bm
P LO=- 20 dB m P 1D B =28 dB m P1D B =20 dB m
C TR FR Q=0 GHz I D= A6 N F= 3 dB
P LOU S E=S pur refer ence on yl IP 3=3 5 dB m LIN _S IP3= 40 dB m
PL ST YP =R oot R aised C osine PH A SE P W R =-1 00 dB AT TE N PH A SE N OIS E= Off
P IN =30 dBm IP 2H =35 dBm ID =S2 IP2H =4 0 dB m
AL PH A =0.35 ID =A1 1 P W R TY P= Auto ID =S 1 ID= A2
N F =3 dB N F =3 dB NE T= "R X Filter" NF =3 dB
PL SLN = SH FT =180 De g L OSS =0 d B LOS S=- 22 dB SH FT =180 Deg RCV R
N OIS E= Off N OIS E= Off NOIS E =Off
ID = A9
IN OUT IN OUT
1 2
R D
IQ 3
LO TP LO
ID =TP 1 5 4
SIN _C
ID =A8
AMP L=1 SU B CK T
PH S OFF= 0 D eg ID= S3
OFFF R Q=0 GH z NE T= "P hase N oise Gen erator "
CT R FR Q=28 GHz
1 2
IQ(TP.TP6,400,1,0)
RX Constellation
1.5 64QAM System
0.5
-0.5
-1.5
-1.5 -0.5 0.5 1.5
4 Disable and bypass the LIN_S block, then run the simulation again. Notice
the difference in the signal constellation-- the ISI is minimized. Disabling
the AWGN block would further reduce the jitter in the system.
5 Add a rectangular graph named “RX Filter Response ”.
6 Add two Linear/Port Parameters S-parameter measurements for the filter.
Set the To Port Index to “1 ” for the first measurement and to “2 ” for the
second measurement. For both measurements, set the From Port Index to
“1 ”, the Data Source Name to “RX Filter ”, and select the DB check box.
7 Add a power spectrum measurement of the signal at test point TP5 using
the settings in the following figure, then click OK .
G e t t i n g S t a r t e d G u i d e 12-29
VSS EXAMPLES
12
8 Re-enable the LIN_S block and run both the harmonic balance simulator
and system simulator. The simulation response in the following graph
should display after adjusting the left and right axes.
RX Filter Response
0 20
-20 -10
-40 -40
-60 -70
DB(|S(1,1)|) (L)
RX Filter
DB(|S(2,1)|) (L)
-80 RX Filter -100
27.9533 28.0033
DB(PW R_SPEC(TP.TP5,256,1,10,1,-1,0,-1,0,1,0)) (R, dBm) 28.0467
64QAM System
Frequency (GHz)
9 Add a rectangular graph named “EVM ” and add a measurement using the
following settings, then click OK .
Note that the VSA block selected in VSA/Large Signal VNA should be the
block with the receivers connected to it. Your block ID may differ from the
VSA.M2 shown in this dialog box.
10 Run the harmonic balance simulator and system simulator. The simulation
response in the following graph should display.
G e t t i n g S t a r t e d G u i d e 12-31
VSS EXAMPLES
12
EVM
EVM(VSA.M2,0,1,0,1,2,0,1,0,1,0,100,1)
8
64QAM System
0
338773 343773 348773 353773 358773
Time (ns)
11 Add a rectangular graph named “AM to AM ”, and using the settings in the
following figure, add a measurement to analyze the instantaneous AM-to-
AM characteristic of the signal, then click OK .
Note that the VSA block selected in VSA should be the block connected
across the NL_AMP2 block. Your block ID may differ from the VSA.M1
shown in this dialog box.
12 Run the harmonic balance simulator and system simulator. The simulation
response in the following graph should display.
AM to AM
20
10
-10
-20
DB(AMtoAM_INST(VSA.M1,1024,0)) (dBm)
64QAM System
-30
-30.8 -25.8 -20.8 -15.8 -10.8 -5.799 -0.7992 4.201
Power (dBm)
13 Tune the OUTLVL parameter of the QAM_SRC block and view the impact
on the constellation graph.
G e t t i n g S t a r t e d G u i d e 12-33
VSS EXAMPLES
12
Note that the VSA block selected in Vector Signal Analyzer should be the
block connected across the NL_AMP2 block. Your block ID may differ
from the VSA.M1 shown in this dialog box.
2 In the VSA block specified above, set the SWPDUR parameter to “10 ” ns.
3 Start the simulation. The tabulated form displays the ACPR value shown in
the following table.
ACPR
0.028
0.027 ACPR(VSA.M1,28.0e9,2,15.0e6,2,10.0e6,2,15.0e6,2,28.0e9,2,15.0e6,2,0)
64QAM System
0.025
0.023
0.021
0.019
0.017
0.0472 3.05 6.05 9.05 12 15 18 20
Power (dBm)
G e t t i n g S t a r t e d G u i d e 12-35
VSS EXAMPLES
12
3 Choose Options > Default System Options and click the Simulator tab.
Select Data rate (_DRATE) and set its value to “1.0e3 ” MHz, then select
Oversampling (_SMPSYM) and set its value to “10 ” samples/symbol. Select
Stop after and set it to “100 ” ns.
TP
ID=TP1
TP
ID=TP2
MIXER_F
ID=A3
SPURS="mixer1"
SPURFMT=Inp rows x LO columns
LOHTYP=dBc IF
MODE=Up converter
FCOUT=
GCONV=-7.5 dB
P1DB=6 dBm TST2IN
SIN_C IP3=19 dBm ID=T1
ID=A1 PLO=PLO-30 dBW TOL=1e-10
AMPL=VIn PLOUSE=Spur reference only TOLTYP=Absolute
PHSOFF=0 Deg PIN=PIn-30 dBW MXSMP=
OFFFRQ=FIn-FCIn Hz NF=6 dB SKIPA=0
CTRFRQ=FCIn Hz NOISE=Off SKIPB=0
IMPROD= CHKCFRQ=No
IN OUT
1 3
x==y
MIXER_F 2
TP LO ID=A4
ID=TP3 SPURS="mixer1_T"
SPURFMT=LO rows x Inp columns
LOHTYP=dBc IF
MODE=Up converter
SIN_C FCOUT=
ID=A2 GCONV=-7.5 dB
P1DB=6 dBm
AMPL=VLO
IP3=19 dBm
PHSOFF=0 Deg
OFFFRQ=FLO-FCLO Hz PLO=PLO-30 dBW
CTRFRQ=FCLO Hz PLOUSE=Spur ref erence only
PIN=PIn-30 dBW
NF=6 dB
NOISE=Off
IMPROD=
IN OUT
LO
G e t t i n g S t a r t e d G u i d e 12-37
VSS EXAMPLES
12
G e t t i n g S t a r t e d G u i d e 12-39
VSS EXAMPLES
12
3 Add another measurement using the same settings, but set the Test Point to
TP.TP3 .
4 Add another measurement using the same settings, but set the Test Point to
TP.TP2and RBW/#Bins to “400 ”.
5 Run the simulation. The simulation response in the following graph should
display after changing your graph’s trace styles and axes to match those
shown.
DB(PWR_SPEC(TP.TP1,200,1,1,1,-1,0,-1,0,1,0)) (dBm)
Mixer1
Mixer1 Spectrum
DB(PWR_SPEC(TP.TP3,200,1,1,1,-1,0,-1,0,1,0)) (dBm)
100 Mixer1
DB(PWR_SPEC(TP.TP2,400,1,1,1,-1,0,-1,0,1,0)) (dBm)
Mixer1
-100
-200
-3200 -200 2800 5800 8700
Frequency (MHz)
6 Right-click on the graph and choose Marker to measure the values in the
graph and compare them with those given in the previous table of expected
values. Move the “+” cursor to the point you want to measure and click to
display the graph value at that point. The result is as expected, otherwise
TST2IN would generate an error message. Alter any elements in either of
the two text data files and run the simulation; an error message is generated.
G e t t i n g S t a r t e d G u i d e 12-41
VSS EXAMPLES
12
4 Repeat step 3 for the mixer connected between test points 4 and 5.
5 In the third mixer with an A4 ID, set the SPURS parameter to “mixer2_T ”,
SPURFMT to “LO Power(dBm); LO rows x Inp columns ”, and leave PLO
empty.
6 With this setup, the two mixer instances (one connected to TP4 and the
other to TP1) check the proper selection of the Spur table based on LO
power. The mixer connected to TP4 uses the portion of the Spur table with
LO=10 dBm, while the mixer connected to TP1 uses the portion with
LO=13 dBm. The third mixer instance (connected to TP3 and TST2IN)
uses the transpose of the data file with the “LO Power(dBm); LO rows x Inp
columns ” setting, which should produce the same result.
8 Repeat the previous step, but set the Test Point to TP.TP2 .
9 Run the simulation. The simulation response in the following graph should
display after changing your graph’s trace styles and axes to match those
shown.
G e t t i n g S t a r t e d G u i d e 12-43
VSS EXAMPLES
12
DB(PWR_SPEC(TP.TP2,400,1,1,1,-1,0,-1,0,1,0)) (dBm)
Mixer2 Mixer2 Spectrum
100 DB(PWR_SPEC(TP.TP5,400,1,1,1,-1,0,-1,0,1,0)) (dBm)
Mixer2
-100
-200
-1300 -300 700 1700 2700 3700 4700 5700 6700 7700 8700
Frequency (MHz)
10 The results are as expected. Measure the values in the graph and compare
them with the values in the previous table.
11 Save and close the project.
....
A variables 9-9
ACPR 12-33 Currents, animating 7-18
Adding Curve meter 6-4
a chip cap cell 5-18
measurements 8-15 D
ports and wires 3-9 Data file, changing the ground node 5-6
subcircuits to diagrams 3-9 Data types 8-1
subcircuits to schematics 3-8 Database units 5-3
AM modulation 8-6 De-embedding lines 7-11
Animation 7-18 Default
Artwork cell grid size 5-3
adding ports to 5-16 project units 4-2
adding to a schematic element 5-10 Demodulation 12-7
assigning 5-10 Distributed interdigital filter 7-2
creating 5-12 Documentation 1-3
AWR Design Environment 3-1 Dynamic load line measurement 6-21
components 3-2
E
B E-fields, viewing 7-18
Back annotation 6-8 Electromagnetic (EM) simulator 7-1
BER simulation 9-9 Element Browser 3-3
Bias circuit 6-6 Element catalog 8-10
Blocks 8-8 Element symbol, changing 5-6
connecting 8-10, 8-11 Elements, adding to schematics 3-7, 4-3
placing in a diagram 8-9, 8-10, 9-2 EM simulation 7-1
EM structure drawings 3-11
C
EM structures, creating 3-10, 7-2
Cell libraries 3-14
End-to-end 64QAM 12-25
Circuit
End-to-end system 9-1
analyzing 4-9
Exporting layout 5-26
optimizing 4-14, 4-19
Eye diagram 11-10
tuning 4-10
Conductors, adding to layout 7-6 F
Connecting nodes 3-9 Filters 10-2, 10-10
Creating
layout 7-20
layout 3-12
response 11-8